19-5714; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A 6-Channel, Digital Ground-Level Translator Features S Supports Ground Differences Up to 72V S Four Unidirectional Channels: Two In/Two Out S Two Bidirectional Channels S I2C Compatible S Supports I2C Clock Stretching S 30Mbps Unidirectional Data Rates The MAX14842 supports guaranteed data rates up to 30Mbps on the four unidirectional channels and up to 2Mbps on the two bidirectional channels. The bidirectional channels have open-drain outputs, making them suitable for I2C signals. I2C clock stretching and hot swapping is supported on the bidirectional channels. S 2Mbps Bidirectional Data Rates S +3.3V to +5V Level Translation S Undervoltage Lockout S 4mm x 4mm, 16-Pin TQFN Package Undervoltage lockout ensures that the output pins have a defined behavior during power-up, power-down, and during supply transients. For proper operation, ensure that 0V ≤ (VGNDB - VGNDA) ≤ 72V. Note that GNDB must be greater than or equal to GNDA. S -40NC to +125NC Automotive Temperature Range Applications Telecommunication Systems Battery Management The MAX14842 is available in a 16-pin TQFN package and is specified over the -40NC to +125NC automotive temperature range. I2C, SMBusK, SPIK, and MICROWIREK Signals Medical Systems Ordering Information PART MAX14842ATE+ TEMP RANGE PIN-PACKAGE -40NC to +125NC 16 TQFN-EP** Power-Over-Ethernet SMBus is a trademark of Intel Corp. SPI is a trademark of Motorola, Inc. **EP = Exposed pad. +Denotes a lead(Pb)-free/RoHS-compliant package. MICROWIRE is a trademark of National Semiconductor Corp. Typical Operating Circuit 3.3V 0.1µF 0.1µF VDDB VDDA GPIO CS RST IRQ µC SDA SCL RPUA VDDA RPUA VDDA INA1 INA2 OUTA1 OUTA2 I/OA1 5V OUTB1 OUTB2 INB1 INB2 MAX14842 I/OA2 GNDA I/OB1 I/OB2 GNDB WAKE ADDR UV ALARM RPUB VDDB RPUB VDDB PERIPHERAL SDA SCL VGG FOR PROPER OPERATION: 0V ≤ (VGNDB - VGNDA) ≤ 72V ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX14842 General Description The MAX14842 translates digital signals between two domains that have different ground references of up to 72V. The device features six communication channels, two bidirectional and four unidirectional. Two of the four unidirectional channels go in each direction. The device is powered by two supply voltages that independently define the logic levels of each ground domain. MAX14842 6-Channel, Digital Ground-Level Translator ABSOLUTE MAXIMUM RATINGS VDDA to GNDA.........................................................-0.3V to +6V VDDB to GNDB.........................................................-0.3V to +6V GNDB to GNDA......................................................-0.3V to +80V INA1, INA2 to GNDA............................... -0.3V to (VDDA + 0.3V) INB1, INB2 to GNDB............................... -0.3V to (VDDB + 0.3V) OUTA1, OUTA2 to GNDA....................... -0.3V to (VDDA + 0.3V) OUTB1, OUTB2 to GNDB....................... -0.3V to (VDDB + 0.3V) I/OA1, I/OA2 to GNDA.............................................-0.3V to +6V I/OB1, I/OB2 to GNDB.............................................-0.3V to +6V Common-Mode Transients (i.e., Transients Between GNDA and GNDB).......................................... 10V/Fs Short-Circuit Duration (OUTA1, OUTA2 to GNDA; OUTB1, OUTB2 to GNDB)......................................Continuous Continuous Power Dissipation (TA = +70NC) TQFN (derate 25mW/NC above +70NC)......................2000mW Operating Temperature Range......................... -40NC to +125NC Junction Temperature......................................................+150NC Storage Temperature Range............................. -65NC to +150NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC PACKAGE THERMAL CHARACTERISTICS (Note 1) TQFN Junction-to-Ambient Thermal Characteristics (qJA).....40°C/W Junction-to-Case Thermal Characteristics (qJC)............6°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDDA - VGNDA = +3.0V to +5.5V, VDDB - VGNDB = +3.0V to +5.5V, VGNDB - VGNDA = 0 to +72V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT DC CHARACTERISTICS VDDA Relative to GNDA 3.0 5.5 VDDB Relative to GNDB 3.0 5.5 Supply Current IDDA IDDB VDDA - VGNDA = +5.5V; VDDB - VGNDB = +5.5V; VGNDB - VGNDA = +70V; all inputs at VGNDA, VGNDB, or +5.5V; no load Voltage Between GNDB and GNDA VGG VGNDB - VGNDA Supply Voltage Side B Leakage Current Undervoltage-Lockout Threshold 0 IL VDDA - VGNDA, VDDB - VGNDB Undervoltage-Lockout Hysteresis VUVLOHYS VDDA - VGNDA, VDDB - VGNDB LOGIC INPUTS AND OUTPUTS Input Logic Threshold Voltage Input Logic-High Voltage 2 VUVLO VIT VIH I/OA1, I/OA2, relative to GNDA 0.5 INA1, INA2, relative to GNDA 0.7 x VDDA INB1, INB2, relative to GNDB 0.7 x VDDB I/OA1, I/OA2, relative to GNDA 0.7 I/OB1, I/OB2, relative to GNDB 0.7 x VDDB V 7.5 mA 72 V 1 mA 2 V 0.1 V 0.7 V V 6-Channel, Digital Ground-Level Translator (VDDA - VGNDA = +3.0V to +5.5V, VDDB - VGNDB = +3.0V to +5.5V, VGNDB - VGNDA = 0 to +72V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, TA = +25NC.) (Note 2) PARAMETER Input Logic-Low Voltage Output Logic-High Voltage Output Logic-Low Voltage SYMBOL VIL VOH VOL CONDITIONS MIN TYP 0.8 INB1, INB2, relative to GNDB 0.8 I/OA1, I/OA2, relative to GNDA 0.5 I/OB1, I/OB2, relative to GNDB 0.3 x VDDB OUTA1, OUTA2, relative to GNDA, source current = 4mA VDDA 0.4V OUTB1, OUTB2, relative to GNDB, source current = 4mA VDDB 0.4V Input Leakage Current Input Capacitance DVTOL IL CIN UNIT V V OUTA1, OUTA2, relative to GNDA, sink current = 4mA 0.8 OUTB1, OUTB2, relative to GNDB, sink current = 4mA 0.8 I/OA1, I/OA2, relative to GNDA, sink current = 10mA 0.6 0.9 I/OA1, I/OA2, relative to GNDA, sink current = 0.5mA 0.6 0.85 I/OB1, I/OB2, relative to GNDB, sink current = 30mA Input/Output Logic-Low Threshold Difference MAX INA1, INA2, relative to GNDA V 0.4 I/OA1, I/OA2 (Note 3) 50 mV VINA1, VINA2, VDDA = +3.6V, VINB1,VINB2, VDDB = +3.6V -2 +2 VI/OA1, VI/OA2, VDDA = +3.6V, VI/OB1, VI/OB2, VDDB = +3.6V -2 +2 FA INA1, INA2, INB1, INB2, f = 1MHz (Note 4) 4 pF DYNAMIC SWITCHING CHARACTERISTICS Maximum Data Rate Minimum Pulse Width Propagation Delay INA1 to OUTB1, INA2 to OUTB2, INB1 to OUTA1, INB2 to OUTA2 30 I/OA1 to I/OB1, I/OA2 to I/OB2, I/OB1 to I/OA1, I/OB2 to I/OA2 2 PWMIN INA1 to OUTB1, INA2 to OUTB2, INB1 to OUTA1, INB2 to OUTA2 30 tDPLH tDPHL INA1 to OUTB1, INA2 to OUTB2, INB1 to OUTA1, INB2 to OUTA2, VDDA = VDDB = +3.0V, RL = 1MI, CL = 15pF, Figure 1 20 30 tDPLH tDPHL I/OA1 to I/OB1, I/OA2 to I/OB2, VDDA = VDDB = +3.0V, R1 = 1.6kI, R2 = 180I, CL1 = CL2 = 15pF, Figure 2 30 100 tDPLH tDPHL I/OB1 to I/OA1, I/OB2 to I/OA2, VDDA = VDDB = +3.0V, R1 = 1kI, R2 = 120I, CL1 = CL2 = 15pF, Figure 2 60 100 DRMAX Mbps ns ns 3 MAX14842 ELECTRICAL CHARACTERISTICS (continued) MAX14842 6-Channel, Digital Ground-Level Translator ELECTRICAL CHARACTERISTICS (continued) (VDDA - VGNDA = +3.0V to +5.5V, VDDB - VGNDB = +3.0V to +5.5V, VGNDB - VGNDA = 0 to +72V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, TA = +25NC.) (Note 2) PARAMETER Propagation Delay Skew |tDPLH – tDPHL| Channel-to-Channel Skew Rise Time Fall Time SYMBOL tDSKEW tDSKEWCC tR tF CONDITIONS MIN TYP MAX I/OA1 to I/OB1, I/OA2 to I/OB2, VDDA = VDDB = +3.0V, R1 = 1.6kI, R2 = 180I, CL1 = CL2 = 15pF, Figure 2 3 6 I/OB1 to I/OA1, I/OB2 to I/OA2, VDDA = VDDB = +3.0V, R1 = 1kI, R2 = 120I, CL1 = CL2 = 15pF, Figure 2 30 100 OUTB1 to OUTB2 output skew, Figure 1 3 6 OUTA1 to OUTA2 output skew, Figure 1 3 6 I/OB1 to I/OB2 output low skew, Figure 2 3 10 I/OA1 to I/OA2 output low skew, Figure 2 3 10 UNIT ns OUTB1, OUTB2, OUTA1, OUTA2, 10% to 90%, Figure 1 5 OUTB1, OUTB2, OUTA1, OUTA2, 90% to 10%, Figure 1 5 I/OA1, I/OA2, 90% to 10%, VDDA = VDDB = +3.0V, R1 = 1.6kI, R2 = 180I, CL1 = CL2 = 15pF, Figure 2 30 60 I/OB1, I/OB2, 90% to 10%, VDDA = VDDB = +3.0V, R1 = 1kI, R2 = 120I, CL1 = CL2 = 15pF, Figure 2 3 6 ns ns ns Note 2: All units are production tested at TA = +25NC. Specifications over temperature are guaranteed by design. All voltages of side A are referenced to GNDA; all voltages of side B are referenced to GNDB, unless otherwise noted. Note 3: DVTOL = VOL - VIL. This is the minimum difference between the output logic-low voltage and the input logic threshold for the same I/O pin. This ensures that the I/O channels are not latched low when any of the I/O inputs are driven low (see the Bidirectional Channels section). Note 4: Guaranteed by design; not production tested. 4 6-Channel, Digital Ground-Level Translator VDDA 0.1µF VDDA VDDB MAX14842 50Ω INA_ TEST SOURCE 0.1µF VDDB OUTB_ GNDA GNDB CL RL VGG (A) VDDA INA1, INA2 1.5V GNDA 1.5V tDPLH tDPHL VDDB OUTB1 1.5V 1.5V GNDB tDSKEWCC VDDB 90% 1.5V OUTB2 GNDB 10% tR tF (B) Figure 1. Test Circuit (A) and Timing Diagram (B) for Unidirectional Testing 5 MAX14842 Test Circuits/Timing Diagrams MAX14842 6-Channel, Digital Ground-Level Translator Test Circuits/Timing Diagrams (continued) VDDA 0.1µF VDDA 0.1µF VDDB R1 VDDB R2 MAX14842 I/OA_ I/OB_ GNDA CL1 GNDB CL2 TEST SOURCE VGG (A) VDDA I/OA1, I/OA2 VDDB 1.5V GNDA I/OB1, I/OB2 1.5V GNDB tDPLH tDPHL VDDB 1.5V I/OB1 1.5V VOL(min) (B) Figure 2. Test Circuit (A) and Timing Diagrams (B) and (C) for Bidirectional Testing 6 90% I/OA2 10% 1.5V tDSKEWCC VDDA 1.5V tF tDPHL VOL(min) 90% VOL(min) tDPLH 1.5V I/OA1 tDSKEWCC I/OB2 1.5V VDDA 1.5V VOL(min) VDDB 1.5V 1.5V tF (C) 10% 6-Channel, Digital Ground-Level Translator IDDB vs. VDDB 7 3 3.5 4.0 4.5 5.0 5.5 3.0 4.0 4.5 5.0 1.0 5.5 0.1 0.01 1 10 100 IDDB vs. DATA RATE OUTPUT-VOLTAGE HIGH vs. SOURCE CURRENT OUTPUT-VOLTAGE HIGH vs. SOURCE CURRENT OUTA1 5.0 4.5 5.5 MAX14842 toc05 MAX14842 toc04 5.5 4.5 4.0 3.5 2.5 2.5 2.0 2.0 1.5 1.0 1 10 2.5 1.0 1.0 0.5 0.5 0 0 100 VDDA = 3.3V 1.5 0 0.1 VDDA = 5.0V 3.0 2.0 VDDA = 3.3V 1.5 SWITCHING INPUT ON INB1 3.5 VDDA = 5.0V 3.0 VOH (V) SWITCHING INPUT ON INA1 OUTB1 5.0 4.0 VOH (V) 10 20 30 40 50 0 10 20 30 40 SOURCE CURRENT (mA) SOURCE CURRENT (mA) PROPAGATION DELAY vs. SUPPLY VOLTAGE PROPAGATION DELAY vs. SUPPLY VOLTAGE PROPAGATION DELAY vs. CAPACITIVE LOAD 8 VGNDB - VGNDA = 50V 6 VGNDB - VGNDA = 72V 4 VDDA = VDDB INA_ TO OUTB_ LOW-TO-HIGH TRANSITION 2 0 3.5 4.0 4.5 VDDA (V) 5.0 5.5 10 VGNDB - VGNDA = 0V 8 6 VGNDB - VGNDA = 50V 4 VGNDB - VGNDA = 72V VDDA = VDDB INA_ TO OUTB_ HIGH-TO-LOW TRANSITION 2 0 3.0 3.5 4.0 4.5 VDDA (V) 5.0 5.5 50 18 MAX14842 toc09 10 12 LOW TO HIGH 16 PROPAGATION DELAY (ns) VGNDB - VGNDA = 0V PROPAGATION DELAY (ns) 12 MAX14842 toc07 DATA RATE (Mbps) MAX14842 toc08 IDDB (mA) 3.5 SWITCHING INPUT ON INB1 DATA RATE (Mbps) 3.0 PROPAGATION DELAY (ns) 2.0 VDDB (V) SWITCHING INPUT ON I/OB1 3.0 SWITCHING INPUT ON I/OA1 VDDA (V) SWITCHING INPUT ON I/OA1 0.01 2.5 SWITCHING INPUT ON INA1 0 3.0 SWITCHING INPUT ON I/OB1 1.5 TA = -40°C 1 0 3.5 4 2 1 4.0 TA = +25°C 3 TA = -40°C 2 5 3.0 MAX14842 toc06 IDDB (mA) IDDA (mA) 5 4 TA = +125°C 6 IDDA (mA) TA = +25°C 3.5 MAX14842 toc02 MAX14842 toc01 TA = +125°C 6 IDDA vs. DATA RATE 8 MAX14842 toc03 IDDA vs. VDDA 7 14 12 10 HIGH TO LOW 8 6 4 2 INA_ TO OUTB_ 0 10 20 30 40 50 60 70 80 90 100 CL (pF) 7 MAX14842 Typical Operating Characteristics (VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, RPUA = RPUB = 2kI, CL = 15pF, see the Typical Operating Circuit, TA = +25NC, unless otherwise noted.) Typical Operating Characteristics (continued) (VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, RPUA = RPUB = 2kI, CL = 15pF, see the Typical Operating Circuit, TA = +25NC, unless otherwise noted.) PROPAGATION DELAY vs. TEMPERATURE PROPAGATION DELAY vs. SUPPLY VOLTAGE 10 8 HIGH TO LOW 6 4 7 6 3 5.0 PROPAGATION DELAY vs. CAPACITIVE LOAD 7 VGNDB - VGNDA = 50V VGNDB - VGNDA = 72V 4 3 12 VDDA = VDDB INB_ TO OUTA_ HIGH-TO-LOW TRANSITION 1 0 3.5 4.0 4.5 5.0 MAX14842 toc13 VGNDB - VGNDA = 0V HIGH TO LOW 10 8 6 LOW TO HIGH 4 2 INB_ TO OUTA_ 0 10 5.5 20 30 40 50 60 70 80 VDDA (V) CL (pF) PROPAGATION DELAY vs. TEMPERATURE PROPAGATION DELAY vs. SUPPLY VOLTAGE LOW TO HIGH 8 HIGH TO LOW 4 20 PROPAGATION DELAY (ns) MAX14842 toc14 12 INB_ TO OUTA_ -40 -25 -10 5 20 35 50 65 80 95 110 125 TA (°C) 90 100 VGNDB - VGNDA = 0V 16 12 VGNDB - VGNDA = 72V VGNDB - VGNDA = 50V 8 4 2 0 5.5 14 PROPAGATION DELAY (ns) MAX14842 toc12 PROPAGATION DELAY (ns) 4.5 PROPAGATION DELAY vs. SUPPLY VOLTAGE 2 8 4.0 VDDA (V) 8 6 3.5 3.0 TA (°C) 9 3.0 VDDA = VDDB INB_ TO OUTA_ LOW-TO-HIGH TRANSITION 0 10 10 VGNDB - VGNDA = 72V 4 -40 -25 -10 5 20 35 50 65 80 95 110 125 5 VGNDB - VGNDA = 50V 5 1 INA_ TO OUTB_ 0 6 VGNDB - VGNDA = 0V 8 2 2 MAX14842 toc11 LOW TO HIGH 12 9 MAX14842 toc15 PROPAGATION DELAY (ns) 14 10 PROPAGATION DELAY (ns) MAX14842 toc10 16 PROPAGATION DELAY (ns) MAX14842 6-Channel, Digital Ground-Level Translator VDDA = VDDB I/OA_ TO I/OB_ LOW-TO-HIGH TRANSITION 0 3.0 3.5 4.0 4.5 VDDA (V) 5.0 5.5 6-Channel, Digital Ground-Level Translator VGNDB - VGNDA = 50V 8 4 VDDA = VDDB I/OA_ TO I/OB_ HIGH-TO-LOW TRANSITION 0 3.5 4.0 4.5 5.0 10 I/OA_ TO I/OB_ 6 -40 -25 -10 5 20 35 50 65 80 95 110 125 VDDA (V) VGNDB - VGNDA = 0V 6 VGNDB - VGNDA = 72V VDDA = VDDB I/OB_ TO I/OA_ LOW-TO-HIGH TRANSITION 0 3.0 3.5 VGNDB - VGNDA = 72V VGNDB - VGNDA = 0V 52 VGNDB - VGNDA = 50V 48 44 VDDA = VDDB I/OB_ TO I/OA_ HIGH-TO-LOW TRANSITION 40 3.5 4.0 4.5 VDDB (V) 5.0 4.0 4.5 5.0 5.5 VDDB (V) PROPAGATION DELAY vs. TEMPERATURE 60 3.0 VGNDB - VGNDA = 50V 9 TA (°C) PROPAGATION DELAY vs. SUPPLY VOLTAGE 56 12 3 8 5.5 MAX14842 toc18 MAX14842 toc17 LOW TO HIGH 12 5.5 70 60 PROPAGATION DELAY (ns) 3.0 14 15 MAX14842 toc20 VGNDB - VGNDA = 72V 16 MAX14842 toc19 12 HIGH TO LOW PROPAGATION DELAY (ns) 16 PROPAGATION DELAY vs. SUPPLY VOLTAGE 18 MAX14842 toc16 VGNDB - VGNDA = 0V PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 20 PROPAGATION DELAY vs. TEMPERATURE PROPAGATION DELAY (ns) PROPAGATION DELAY vs. SUPPLY VOLTAGE HIGH TO LOW 50 40 30 20 LOW TO HIGH 10 I/OB_ TO I/OA_ 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA (°C) 9 MAX14842 Typical Operating Characteristics (continued) (VDDA - VGNDA = +3.3V, VDDB - VGNDB = +3.3V, VGNDB - VGNDA = +50V, RPUA = RPUB = 2kI, CL = 15pF, see the Typical Operating Circuit, TA = +25NC, unless otherwise noted.) MAX14842 6-Channel, Digital Ground-Level Translator INB1 INB2 I/OB1 TOP VIEW OUTB2 Pin Configuration 12 11 10 9 OUTB1 13 VDDB 14 I/OB2 7 GNDB 6 GNDA 5 I/OA2 MAX14842 VDDA 15 *EP 2 3 4 I/OA1 INA2 1 OUTA2 + OUTA1 INA1 16 8 TQFN (4mm × 4mm) *CONNECT EXPOSED PAD TO GNDA. Pin Description PIN 10 NAME FUNCTION VOLTAGE RELATIVE TO 1 INA2 Logic Input 2 on Side A. INA2 is translated to OUTB2. GNDA 2 OUTA1 Logic Output 1 on Side A. OUTA1 is a push-pull output. GNDA 3 OUTA2 Logic Output 2 on Side A. OUTA2 is a push-pull output. GNDA 4 I/OA1 Bidirectional Input/Output 1 on Side A. I/OA1 is translated to/from I/OB1 and is an opendrain output. GNDA 5 I/OA2 Bidirectional Input/Output 2 on Side A. I/OA2 is translated to/from I/OB2 and is an opendrain output. GNDA 6 GNDA 7 GNDB Ground Reference for Side A. VGNDA must be ≤ VGNDB. Ground Reference for Side B. VGNDB must be ≥ VGNDA. — — 8 I/OB2 Bidirectional Input/Output 2 on Side B. I/OB2 is translated to/from I/OA2 and is an opendrain output. 9 I/OB1 Bidirectional Input/Output 1 on Side B. I/OB1 is translated to/from I/OA1 and is an opendrain output. GNDB 10 INB2 Logic Input 2 on Side B. INB2 is translated to OUTA2. GNDB 11 INB1 Logic Input 1 on Side B. INB1 is translated to OUTA1. GNDB 12 OUTB2 Logic Output 2 on Side B. OUTB2 is a push-pull output. GNDB 13 OUTB1 Logic Output 1 on Side B. OUTB1 is a push-pull output. GNDB 14 VDDB Supply Voltage of Logic Side B. Bypass VDDB with a 0.1FF ceramic capacitor to GNDB. GNDB 15 VDDA Supply Voltage of Logic Side A. Bypass VDDA with a 0.1FF ceramic capacitor to GNDA. GNDA 16 INA1 Logic Input 1 on Side A. INA1 is translated to OUTB1. GNDA — EP Exposed Pad. Connect EP to GNDA. GNDB — 6-Channel, Digital Ground-Level Translator VDDA Unidirectional Channels VDDB MAX14842 INA1 OUTB1 INA2 OUTB2 INB1 OUTA1 GROUND REFERENCE SHIFTER OUTA2 INB2 I/OA1 I/OB1 I/OA2 I/OB2 GNDA greater than or less than (VDDB - VGNDB), as long as each is within the normal operating range. GNDB The device features four unidirectional channels that can each operate independently with a guaranteed data rate of up to 30Mbps. The output driver of each unidirectional channel is push-pull, eliminating the need for pullup resistors. The drivers are also able to drive both TTL and CMOS logic inputs. Bidirectional Channels The device features two bidirectional translation channels that have open-drain outputs. The bidirectional channels do not require a direction input. A logic-low on one side causes the corresponding pin on the other side to be pulled low while avoiding data latching within the translator. To prevent latching of the bidirectional channels, the input logic-low threshold (VIT) of I/OA1 and I/ OA2 is at least 50mV lower than the output logic-low voltages (VOL) of I/OA1 and I/OA2. This prevents an output logic-low on side A from being accepted as an input low and subsequently transmitted to side B and vice versa. The I/OA1, I/OA2, I/OB1, and I/OB2 pins have open-drain outputs, requiring pullup resistors to their respective supplies for logic-high outputs. The output low voltages are guaranteed for sink currents of up to 30mA for side B and 10mA for side A (see the Electrical Characteristics table). The bidirectional channels of the device support I2C clock stretching. Detailed Description The MAX14842 provides both ground-level translation and logic-level shifting needed in systems where there is a difference in ground references of up to 72V. The device is powered by two supply voltages, VDDA and VDDB, which independently set the logic levels on either side of the device. VDDA and VDDB are separately referenced to GNDA and GNDB, respectively. The MAX14842 supports data rates of up to 30Mbps on each of the four unidirectional channels and 2Mbps on the two bidirectional channels. Ground Translation/Level Shifting For proper operation, ensure that 0V P (VGNDB - VGNDA) P 72V. Note that GNDB must be greater than or equal to GNDA. Also ensure that 3.0V P (VDDA - VGNDA) P 5.5V and 3.0V P (VDDB - VGNDB) P 5.5V. (VDDA - VGNDA) can be Separate Ground References The device is designed to translate logic signals to and from domains with isolated and offset ground references. Startup and Undervoltage Lockout The VDDA and VDDB supplies are both internally monitored for undervoltage conditions. Undervoltage events can occur during power-up, power-down, or during normal operation due to a slump in the supplies. When an undervoltage event occurs on either of the supplies, all outputs on both sides are automatically controlled, regardless of the status of the inputs. The bidirectional outputs become high impedance and are pulled high by the external pullup resistor on the open-drain output. The unidirectional outputs are pulled high internally to the voltage of the VDDA or VDDB supply during undervoltage conditions. 11 MAX14842 Functional Diagram 6-Channel, Digital Ground-Level Translator MAX14842 Power-Supply Decoupling VDDA VDDB OUTA1 OUTB1 To reduce ripple and the chance of introducing data errors, bypass VDDA and VDDB with 0.1FF ceramic capacitors to GNDA and GNDB, respectively. Place the bypass capacitors as close to the power-supply input pins as possible. Unidirectional and Bidirectional Level Translator The MAX14842 operates both as a unidirectional device and bidirectional device simultaneously. Each unidirectional channel can only be used in the direction shown in the Functional Diagram. The bidirectional channels function without requiring a direction input. Figure 3. Undervoltage Lockout Behavior Figure 3 shows the behavior of the outputs during power up and power down. Applications Information AC Components on VGG When the ground difference voltage, VGG, has a time varying (AC) component, limit the amplitude to ensure that the MAX14842 operates as specified. The maximum allowable amplitude of an AC signal on VGG is a function of frequency. Power-Supply Sequencing The MAX14842 does not require power-supply sequencing. The logic levels are set independently on either side by VDDA and VDDB. Each supply can be present over the entire specified range regardless of the level or presence of the other. 12 Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 16 TQFN-EP T1644+4 21-0139 90-0070 6-Channel, Digital Ground-Level Translator REVISION NUMBER REVISION DATE 0 12/10 Initial release 3/11 Deleted the MAX14842ETE+ from the Ordering Information, removed the future status from the MAX14842ATE+ in the Ordering Information, added the automotive temperature range to the Features, Absolute Maximum Ratings, and the Electrical Characteristics sections 1 DESCRIPTION PAGES CHANGED — 1–4 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2011 Maxim Integrated Products 13 Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX14842 Revision History