TOSHIBA TA1276AFG

TA1276AFG
TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1276AFG
PAL/NTSC Video Chroma And Deflection IC For CTV
(normal scan/double scan mode)
TA1276AFG provides Video, Chroma and Deflection (sync, when double scan mode) circuit for a PAL/NTSC Color
TV, and suitable for a high picture quality, large screen size, wide
and/or double scanning TV. These functions are integrated in a 80
pin QPF plastic package.
TA1276AFG provides a high-performance video processor in
which a YUV double scanning signal can be applied in Video,
PAL/NTSC auto-detection circuit in Chroma and 50/60 Hz
auto-detection circuit in Sync. PAL demodulation circuit includes
Baseband signal processing system. And this demodulation
circuit does not required any adjustment.
TA1276AFG includes I2C bus interface, so you can adjust
various functions and controls via the bus.
Weight: 1.6 g (typ.)
Features
Video/chroma section
• Y delay line
• Chroma trap
• IQ demodulation for NTSC, UV demodulation for PAL
• BEP (back end processor) section
• Enable to process a YUV signal independently
• Double scanning signal processing capability
(Y processing section)
• Black stretcher (controlled by I2C bus)
• DC restoration circuit (controlled by I2C bus)
• Highbright-color circuit
• D.L. aperture sharpness circuit + super real transcend circuit (LTI)
• Ǆ correction (enable to control binary line, gain/start point)
• Y noise reduction circuit
• Velocity scan modulation output (the first order differential output and phase/amplitude adjustment)
(color difference section)
• Color detail enhancer
• Selectable relative phase and amplitude
• Flesh-color restoration
• Color Ǆ circuit
• Baseband tint color
(text section)
• RGB primary color output
• On screen display interface
• Linear RGB interface
• Fast blanking
• Drive control
• AKB (only black level) or cut-off bus control
• Deflection section
• High performance sync. separation circuit
• Adjustment free H and V oscillation circuit by countdown system
• Horizontal and vertical position adjustment
• Sync separation, HD output
• Horizontal and vertical pulse output in normal mode.
•
1
2002-04-01
TA1276AFG
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
V/I Out
1H DL Cont
4.43 MHz X’tal
M PAL X’tal
NC
3.58 MHz X’tal
APC Filter
VCC1 (5 V)
NC
NC
Chroma In
Chroma GND
Y1 Sync In
NC
V.Sep.
HD Out
NC
Sync Out
DEF GND
AFC Filter
NC
32fH VCO
DEF VCC (9 V)
Horizontal Output (SW)
Pin Assignment
65 U/Q Out
66 NC
67 Y1 Out
Curve odj.
40
(ext CP in)
NC 39
FBP In (BLK in) 38
68 NC
Digital GND 37
69 SECAM Conto
NC 36
70 SCP Out
SDA 35
71 NC
SCL 34
72 fsc Out
NC 33
TA1276AFG
73 Sence In
B S/H 32
74 R S/H
G S/H 31
75 NC
NC 30
76 Color Limiter
VP Out 29
77 NC
NC 28
78 Y2 In
V/I In
Black Peak Hold
APL Det.
NC
VSM Out
YM In
VCC3 (9 V)
ABCL In
TEXT GND 2
TEXT GND 1
R Out
NC
G Out
NC
B Out
NC
VCC2 (9 V)
Analog OSD R In
Analog OSD G In
Analog OSD B In
Ys1 (analog OSD)
Analog R In
NC
Analog G In
Ys2 (analog RGB) 27
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
79 NC
80 U/Q In
2
NC 26
Analog B In 25
2002-04-01
TA1276AFG
Block Diagram
fsc Out 72
Cutoff
fsc out
IK
73 Sense In
R S/H
Cutoff
Hi Bright
Color
SECAM
69
Control
SECAM
Control
Y1 Out 67
SW
Axis G-Y
Matrix
Color Sys
Ident
Clamp
Color γ
Half Tone
Color Peak
Det
CDE
Delay Line
76 Color Limiter
78 Y2 In
Uni-color
U/Q Out 65
74 R S/H
SCP out
SCP Out 70
Delay Line
80 U/Q In
Color
TOF
Tint
V/I Out 64
Delay Line
SW
IQ → UV
Convert
IQ/UV
Clamp
1 V/I In
Flesh Color
2 Black Peak Hold
1H DL
63
Control
1 H DL
Control
Black Peak
Det
Y Clamp
3 APL Det.
4.43 MHz
62
X’tal
M PAL X’tal 61
Filter Auto
Adj.
Chroma
VCO
APC Filter 58
LPF fsc
Trap
CW
Matrix
3.58 MHz
59
X’tal
VSM
Mute
Black Level
Cor
Chroma
Demond.
VSM Amp
APL Det
γ
Correction
P/N
Ident Det
APC Det
Black
Stretch
HPF
Chroma BLK
Sub Color
Chroma GND 53
Delay Line
Y1/Sync In 52
H.V.
Sync Sep.
7 VCC3 (9 V)
8 ABCL In
ABCL Amp
ACC Det
ACC Amp
Chroma In 54
6 YM In
DL SW
DC Restore
VCC1 (5 V) 57
5 VSM Out
TOF
SW
Sharpness
Delay Line
YM SW
RGB out
SRT
Sharpness
Control
fsc
Trap
9 Text GND 2
BLK
10 Text GND 1
R. G. B. S/H
SW
11 R Out
Y NR Amp
IK
Cutoff
Clamp
13 G Out
V-Sep. 50
V Sep
HD Out 49
HD out/
BPP in
V Sync Sep
Sub Cont
100 IRE
= 2.3 Vp-p
Drive
15 B Out
Uni-color
17 VCC2 (9 V)
Sync. Out 47
Sync out
RGB γ
Clamp
OSD Amp
18
Analog OSD
R In
19
Analog OSD
G In
20
Analog OSD
B In
21
Ys1
(analog OSD)
DEF GND 46
Half Tone
AFC Filter 45
Phase Det
<AFC-1>
32fH VCO 43
32fH VCO
SW
ACL
Clamp
WPS
Mode
SW
DEF
42
VCC (9 V)
H Drive
H. Out
41
[SW]
H Phase
Shift
H Count
Down
RGB
Matrix
V Count
Down
Internal Clamp Mode
or
External Clamp Mode
SW
Ys SW
22 Analog R In
Contrast
24 Analog G In
Curve Adjust
[Ext CP/ 40
BPP In]
Phase Det
<AFC-2>
FBP In
38
[H/V BLK In]
H BLK
Clamp
25 Analog B In
(Ext. VBLK)
H parabola
VP out
Registor
D/A
Convert
RGB
Bright
Ys SW
27
Ys2
(analog OSD)
Digital GND 37
29 VP Out
2
SDA 35
I C Bus
Decoder
Cutoff
G S/H
31 G S/H
Cutoff
B S/H
32 B S/H
SCL 34
• Pin 41 connect to VCC: Double Scan mode
Note 1: [
]: for Double Scan mode only (external clamping pulse input mode)
3
2002-04-01
TA1276AFG
Terminal Functions
Pin
No.
Pin Name
Function
Input/Output
Signal
Interface Circuit
7
1
V/I input
80 U/Q input
When Burst: Chroma
= 1:1
360 mVp-p
DC: 5.0 V
The pin through which R-Y
(V)/I and B-Y (U)/Q
signals are input. Input via
clamp capacitor.
1
80
5V
200 Ω
2
4.25 V
20 kΩ
5 kΩ
20 kΩ
3
None connect PIN.
These pins connect to
GND.


7
1 kΩ
Outputs the Y-signal that
routed HPF after it had
been subjected to DC
VSM output restoration.
The output is muted with
the switches of pins 32
and 36.
DC
1 kΩ
35 kΩ
5
NC
7
200 Ω
5
DC
3.5 V
200 Ω
4
APL
detection
200 Ω
3
Connect the filter
correcting DC restoration
ratio.
Opening this pin can
monitor the Y-signal that
was subjected to black
stretching.
DC
1 kΩ
1 kΩ
Black peak
hold
1 kΩ
2
Connect the filter
controlling the black
stretching gain of the
black stretching circuit.
The black stretching gain
varies depending on the
voltage at this pin.
4 kΩ
1 kΩ
7
4
2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
Input/Output
Signal
Interface Circuit
17
Soft AKB
7.0 V
6
YM input
300 Ω
The half-tone switch for
internal RGB signal.
When the voltage at this
pin is set to 7.0 V or more,
the RGB output voltage.
6
Half Tone
0.75 V
15 kΩ
TV
5 kΩ
GND
The VCC pin of picture
quality and color
difference blocks.
Connect 9 V (typ.).


7
VCC3 (9 V)
8
Used to control the
external uni-color,
brightness, and dynamic
ABL.
Use this pin when using
ABCL input
ABL or ACL.
The sensitivity and starting
point of the ABL and
dynamic ABL can be set
by using bus.
9
TEXT GND The GND pin of TEXT
2
block.


10
TEXT GND The GND pin of TEXT
1
block.


17
5 kΩ
ABCL OFF:
6 V or more
30 kΩ
30 kΩ
8
13 G output
Outputs RGB.
200 Ω
100 IRE: 2.3 Vp-p
2.5 V
10 kΩ
100 kΩ
15 B output
11
13
15
100 kΩ
11 R output
1 kΩ
100 Ω
17
GND
At Cont max
BRT Cent.
12 NC
None connect PIN.
These pins connect to
GND.


14 NC
None connect PIN.
These pins connect to
GND.


16 NC
None connect PIN.
These pins connect to
GND.


17 VCC2 (9 V)
The VCC pin of the text
block.
Connect 9 V (typ.).


5
2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
The pin through which the
OSD signal or analog
RGB is input.
18 Analog
OSD R
input
19 Analog
OSD G
input
20 Analog
OSD
B input
(1) When inputting an
OSD signal, input the
ODS signal with a
voltage of 0 to 5 V
(4.1 V or more).
(2) When inputting an
analog RGB, input the
RGB signal via clamp
capacitor.
ACL works on this
input signal only when
the entire screen is
YS1-HI (the entire
screen: OSD).
Input/Output
Signal
Interface Circuit
17
(1)
5V
1 kΩ
18
19
20
0V
1 kΩ
(2)
100 IRE: 0.5 Vp-p
DC: 3.6 V
17
OSD
VSM Mute
0.75 V
1.3 kΩ
21
TV
50 kΩ
21 YS1
2.25 V
Switches between the
internal RGB signal and
OSD/analog RGB (pin 18,
19, 20). When this switch
is on, the VSM output is
muted.
GND
17
22 Analog R
input
24 Analog G
input
25 Analog B
input
100 IRE: 0.5 Vp-p
1 kΩ
The pin through which the
analog RGB is input. Input
the RGB signal via clamp
capacitor.
22
24
25
1 kΩ
3.5 V GND
23 NC
None connect PIN.
These pins connect to
GND.


26 NC
None connect PIN.
These pins connect to
GND.


17
28 NC
A. BGB
0.75 V
1.3 kΩ
TV
27
GND
50 kΩ
27 YS2
Switches between the
internal RGB signal and
analog RGB (pin 33, 34,
35) signal.
When this switch is on, the
VSM output is muted.
None connect PIN.
These pins connect to
GND.

6

2002-04-01
TA1276AFG
31 G S/H
34 SCL
4.25 V
1.5 kΩ
1 kΩ
1 kΩ
AKB
or
Clamp
500 Ω
31
32
74

17
5 kΩ
DC
R/G/B
None connect PIN.
These pins connect to
GND.
Soft
AKB
(bus)


42
100 µF
33 NC
0V

200 Ω
32 B S/H
These pins are to be
connected with a capacitor
for sampling and holding a
bais voltage in the AKB
operation, of for clamping
to set DC voltage of RGB
outputs in the no-AKB
mode.
5 kΩ
5 kΩ
None connect PIN.
These pins connect to
GND.
42
5V
5 kΩ
30 NC
200 Ω
29
200 Ω
29 VP output
Outputs the vertical pulse.
This pin also serves as the
external blanking input.
When current stronger
than
350 µA flows, blanking
takes place due to the
internal blanking and OR
logic circuit.
Input/Output
Signal
Interface Circuit
200 µA
Function
200 Ω
50 kΩ
Pin Name
5 kΩ
Pin
No.
2
The SCL pin of I C bus.

SDA
20 kΩ
3V
34
42
35 SDA
2
The SDA pin of I C bus.

SDA
50 Ω
20 kΩ
ACK
36 NC
None connect PIN.
These pins connect to
GND.

7
3V
35

2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
Interface Circuit
Input/Output
Signal


2
37 Digital GND The GND pin of I L block.
3.5 V
3.5 V
1.0 V
8.25 V


(1)
(2)
42
45 kΩ
AFC-2
(2) Double scan mode
This pin is to input
external CP (clamping
pulse) and BPP
(black peak detection
stopping pulse).
DC 4.5 V
Ext. Clamp Pulse
5V
40
1.5
µs
45 kΩ
45 kΩ
Curve
correction
40 (ext.
CP/BPP
input)
FBP
None connect PIN.
These pins connect to
GND.
(1) Used to correct
distortion of picture in
the case of
high-tension
fluctuation. Input the
AC component of
high-tension
fluctuation.
To disactivate the
distortion correction
feature, connect a
capacitor of 0.01 µF
between this pin and
GND.
3.5 V
(AFC-2)
1.0 V
(H BLK)
200 Ω
45 kΩ
39 NC
38
9V
2.5 V
38 FBP input
The pin through which
FBP is input to generate
pulses for horizontal
AFC2, Y smoothing, and
horizontal blanking.
When double SCAM
mode, input H blanking
pulse (5 V or over).
2.25 V
42
Ext. CP
TH: 3.6 V
Ext BPP
0V
Ext BPP TH: 1.0 V
42
15 kΩ
DEF VCC
(9 V)
The VCC of DEF block.
Connect 9 V (typ.) to this
pin.

8
7.5 V
41
30 kΩ
42
HIGH: 3.2 V
LOW: 0.2 V
1.5 V
5 kΩ
30 kΩ
50 kΩ
Produces the horizontal
output.
Horizontal
Connecting the DEF VCC
to this pin can swich
41 output
(mode SW) Double Scan mode. In this
case, the horizontal output
is not produced.

2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
Input/Output
Signal
Interface Circuit
43 32fH VCO
Connect the ceramic
oscillator for horizontal
oscillation.
The oscillator to be used
is CSBLA503KECZF30,
made by Murata
electronics.
10 kΩ
42
130 mVp-p
47 kΩ 10 kΩ
1 kΩ
43
DC: 5.9 V
1 kΩ
3 kΩ
44 NC
None connect PIN.
These pins connect to
GND.


42
The GND pin of DEF
block.
SYNC.
47
output
Output the synchronizing
signal that was separated
in the synchronous
separation circuit.
This pin is of the open
collector system. Connect
the pull-up resistor.
49 HD output
7.5 V

42
5V
200 Ω
47
GND
None connect PIN.
These pins connect to
GND.
(1) When BUS HD-OUT
=0
Output the HD pulse
(pulse duration: 1 µs)
together with AFC.
This pin also serves
as the external input
pin that accepts BPP
(black peak detection
stopping pulse)
signal.
DC



(1)
42
1 kΩ
48 NC
30 kΩ
200 Ω
HD
5V
1 µs
Ext BPP
Ext. BPP
6.5 V
46 DEF GND
300 Ω
45
0V
BPP TH: 1.0 V
49
5 kΩ
45 AFC filter
Connect the filter for
horizontal AFC.
The frequency of the
horizontal output varies
depending on the voltage
at this pin.
(2) When BUS HD-OUT
=1
When AKB mode is
ON, the pulse which
covers AKB reference
period is output.
HD
(2)
5V
0V
9
2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
Input/Output
Signal
Interface Circuit
42
500 Ω
50 V-Sep.
Connect the filter
separating the vertical
synchronization.
51 NC
None connect PIN.
These pins connect to
GND.
50
DC6.4 V


57
The pin through which the
composite video signal or
Y signal is input. Input via
clamp capacitor.
52
2.5 V
1 kΩ
53
Chroma
GND
The GND pin of the
chroma processing block.
GND
6 kΩ
18 kΩ
Y1/SYNC
input
30 kΩ
52
1 kΩ
1 Vp-p


Chroma
input
Burst level:
300 mVp-p
1 kΩ
54
2.5 V 10 kΩ
54
The pin through which the
chroma is input. Input the
chroma signal that was
subjected to Y/C
separation.
10 kΩ
57
2.5 V
GND
55 NC
None connect PIN.
These pins connect to
GND.


56 NC
None connect PIN.
These pins connect to
GND.


57 VCC1 (5 V)
The VCC of the chroma
and I2C Bus blocks.
Connect 5 V (typ.)


10
2002-04-01
TA1276AFG
Pin Name
Function
Input/Output
Signal
Interface Circuit
57
600 Ω
Pin
No.
1 kΩ
60 NC
None connect PIN.
These pins connect to
GND.
3 kΩ
DC
58
2 kΩ
58 APC filter
Connect APC filter
demodulating the chroma.
The oscillation frequency
of VCXO varies depending
on the voltage at this pin.


57
Connect X’tal. In the case
of series capacity, the
oscillation frequency (f0)
can be changed. In the
61 M PAL X’tal
case of parallel capacity,
the changeable range of
59 3.58 MHz
frequency can be
X’tal
changed.
R
62 4.43 MHz
X’tal
DC
4.0 V
90 mVp-p
500 Ω
R
Pin 62 1.5 kΩ
Pin 61 2.5 kΩ
Pin 59 2.5 kΩ
3 kΩ
62
61
59
1H DL
control
5 kΩ
42
8.4 V: PAL
4.3 V: SECAM
0 V: NTSC
500 Ω
63
89 kΩ
63
Outputs the result of
whether the signal is PAL,
SECAM or NTSC.
Connect the output to the
1H DL IC.
In the case of
discrimination between
white or black, the voltage
just before that is retained.
The voltage immediately
after turning-on is not
fixed.
30 kΩ
64
400 µF 1 kΩ
64 V/I output
Outputs R-Y (V) or Q
signal. It includes LPF that
can remove carrier.
The chroma signal that
routed ACC and TOF
circuits (before demo
input) can be monitored by
pulling up this pin at 10
kΩ.
1 kΩ
57
11
DC
2.5 V
Rainbow
color bar
: 360 mVp-p
2002-04-01
TA1276AFG
Pin
No.
Pin Name
Function
Interface Circuit
Input/Output
Signal
1 kΩ
57
None connect PIN.
These pins connect to
GND.
30 kΩ
66 NC
DC
2.5 V
65
Rainbow
color bar
: 360 mVp-p
400 µF 1 kΩ
65 U/Q output
Outputs B-Y (U) or I
signal.
It includes LPF that can
remove carrier.


57
1 Vp-p
68 NC
300 Ω
67
2V
1 mA
67 Y1 output
Outputs the Y signal that
routed the fsc TRAP
(TRAP can be turned on
or off with bus.) and the Y
delay line circuit.
None connect PIN.
These pins connect to
GND.
GND


SECAM
control
When
PAL/NTSC
4.0 V
500 Ω
When SECAM
0.75 V
69
71 NC
42
8.3 V
4.8 V
200 Ω
2.5 V
70
8 kΩ
Outputs SCP (sand castle
pulse).
The output signal consists
of clamp pulse, horizontal
70 SCP output
blanking pulse, and
vertical blanking.
The minimum load
resistance is 3 kΩ.
200 Ω
10 kΩ
69
The input/output pin that is
used to control the
SECAM demodulation IC.
When current stronger
than 250 µA flows from
this pin, that is recognized
as SECAM.
2 kΩ
42
None connect PIN.
These pins connect to
GND.

12
GND

2002-04-01
TA1276AFG
72 fsc output
Function
Outputs oscillation
waveform of VCXO.
When 3.58 NTSC killer-off
this pin voltage sets 3.2 V.
When B/W or other
systems killer-off, this pin
voltage sets 1.4 V.
Input/Output
Signal
Interface Circuit
57
200 Ω
Pin Name
DC
3.58 NTSC
: 3.2 V
B/W or Others system
: 1.4 V
200 Ω
72
1 mA
Pin
No.
AC
0.6 Vp-p
17
SENSE
73
input
This pin is to sense IK
voltage feed-back from a
CRT Drive circuit.
74 R S/H
The same as pin 31 and
32.
75 NC
None connect PIN.
These pins connect to
GND.
SENSE
R
G
B
1.5 V
500 Ω
73
The same as pin 31 and 32.
DC


7
10 kΩ
77 NC
Color the filter detecting
the color limit.
76
None connect PIN.
These pins connect to
GND.
DC
2 kΩ
Color
limiter
5 V 30 kΩ
76
5 kΩ


78 Y2 input
The pin through which B-Y
(V)/I and R-Y (U)/Q
signals are input. Input via
clamp capacitor.
5 kΩ
5 kΩ
7
1 Vp-p (both signals)
1 kΩ
1 kΩ
78
6.3 V
GND
79 NC
None connect PIN.
These pins connect to
GND.

13

2002-04-01
TA1276AFG
Bus Control Map
Write Mode
Slave Address: 88H (10001000)
Sub
Address
D7
MSB
00
P-MUTE
D6
D5
D4
D3
D2
D1
D0
LSB
UNI-COLOR
01
BRIGHTNESS
Preset
MSB
LSB
1000
0000
1000
0000
02
COLOR
Y-MUTE
1000
0000
03
TINT
YM-SW
1000
0000
04
SHARPNESS
YNR
1000
0000
05
RGB BRIGHTNESS
WPS L
1000
0000
1000
0000
06
HI BRT
RGB CONTRAST
07
SUB COLOR
COLOR γ
CLT
1000
0000
08
SUB CONTRAST
Y-γ CURVE
FLESH
1000
0000
09
G (R) DRIVE
DR-SW
1000
0000
0A
B DRIVE
CDE
1000
0000
H-BLK
1000
0000
0B
HORIZONTAL POSITION
HV-SepL
V-OFF
0C
R CUT OFF
1000
0000
0D
G CUT OFF
1000
0000
0E
B CUT OFF
1000
0000
0000
0000
TX-ACL
0000
0000
VSM-PB
0000
0000
0F
R-Y PHASE
10
11
R/B GAIN
COLOR SYSTEM
P/N-ID
VSM PHASE
DC RESTORATION POINT
13
BLACK STRETCH POINT
SHR-TRACKING
BB SW
VSM GAIN
12
14
G/B GAIN
TEST
G-Y PHASE
OSD-SL
OS-ACL
APACON PEAK f0
DC RESTORATION RATE
APL VS BSP
RGB-γ
B.L.C.
Y-γ PNT
B.S.G.
DC REST. LIMIT
0000
0000
VSM-H.PB FREQ
0000
0000
B.D.L.
0000
0000
BS-ARE
15
DYNAMIC ABL POINT
DYNAMIC ABL GAIN
AKB MODE
0000
0000
16
ABL POINT
ABL GAIN
RGB OUT MODE
0000
0000
17
HD-OUT
V-BLK
VERTICAL FREQUENCY
VERTICAL POSITION
0000
0000
18
Y-DL
C-TRAP
TOF f0
TOF-Q
0000
0000
Read Mode
Slave Address: 89H (10001001)
D7
0
PORSET
1
N-DET
D6
D5
D4
COLOR SYSTEM
RGBOUT
Y1-IN
D3
X’tal
IQ-IN
Y2-IN
14
D2
D1
D0
V-FREQ
V-STD
H-LOCK
H-OUT
VP-OUT
IK-IN
2002-04-01
TA1276AFG
Bus Control Feature
Write Mode
Item
Explain
Preset
P-MUTE
Picture mute SW; (0): OFF, (1): ON
ON
UNI-COLOR
Uni-color adjustment; −18dB to 0dB
Center
BRIGHTNESS
Brightness adjustment (including sub adjustment); −40 IRE to +40 IRE
Center
COLOR
Color adjustment; −20dB (color mute) to +4dB
0dB
Y-MUTE
Y mute SW; (0): ON, (1): OFF
ON
TINT
Hue adjustment; −32° to +32°
0°
TM-SW
Half-tone SW (YUV input); (0): OFF, (1): ON
OFF
SHARPNESS
Sharpness adjustment; −20dB to +14dB
+8dB
YNR
Y Noise Reduction SW; (0): OFF, (1): ON
OFF
RGB BRIGHTNESS
RGB Brightness Adjustment; −20 IRE to +20 IRE
0 IRE
WPS L
White Peak Suppression Level; (0): 130 IRE, (1): 110 IRE
HI BRT
High-bright color; (0): OFF, (1): ON
RGB CONTRAST
RGB Contrast; −18dB to 0dB
SUB COLOR
Sub-color; −4dB to 0dB to +3dB
0dB
COLOR γ
Color γ correction point;
(00): OFF, (01): 0.2 Vp-p, (10): 0.4 Vp-p, (11): 0.6 Vp-p
OFF
CLT
Color Limiter Level; (0): 1.8 Vp-p, (11): 2.2 Vp-p
SUB CONTRAST
Sub-contrast adjustment; −3dB to +3dB
0dB
Y-γ CURVE
Y-γ curve switching;
(00): OFF, (01): −2.5dB, (10): −5.6dB, (11): −7dB
OFF
FLESH
Flesh color; (0): OFF, (1): ON
OFF
G (R)/B DRIVE
R (G)/B drive gain adjustment; −5dB to 0dB to +3dB
DG-SW
Drive gain base axis switching; (0): G, (1): R
CDE
Color Detail Enhancer;
(0): ON (foced OFF when sharpness go through), (1): OFF
ON
HORIZONTAL POSITION
Horizontal position adjustment; −3 µs to +3 µs
0 µs
HV-SepL
Sync separation level; (from SYNC TIP) (0): 35%, (1): 40%
35%
V-OFF
Vertical output SW; (0): ON, (1): OFF
ON
H-BLK
Horizontal blanking SW; (0): ON, (1): OFF
ON
R/G/B CUTOFF
R/G/B cut-off adjustment;
• When AKB-OFF: RGB output 2 V to 2.5 V to 3 V
• When AKB-ON: SENS input
1 Vp-p to 1.5 Vp-p to 2 Vp-p (±5 IRE)
R-Y PHASE
R-Y relative phase switching;
(00): 90°, (01): 92°, (10): 94°, (11): 112°
90°
R/B GAIN
R/B relative amplitude switching;
(00): 0.56, (01): 0.68, (10): 0.79, (11): 0.86
0.56
G/B GAIN
G/B relative amplitude switching;
(00): 0.3, (01): 0.34, (10): 0.4, (11): 0.45
0.3
G-Y PHASE
G-Y relative phase switching;
(00): 236°, (01): 240°, (10): 244°, (11): 253°
15
130 IRE
OFF
−18dB
1.8 Vp-p
0dB (40h)
G
Center
(80h)
236°
2002-04-01
TA1276AFG
Item
Explain
Preset
Color system;
System
COLOR SYSTEM
(000): NTSC
(001): NTSC
(010): NTSC
(011): PAL
(100): PAL
(101): SECAM
(110): MULTI
(111): Trinorma
X’tal
Color
difference
mute
Color
difference
input
TINI
control
3.58
3.58
4.43
4.43 (N)
M
4.43
3.58/4.43
3.58/M/N
Forced OFF
Forced OFF
Forced OFF
Forced OFF
Forced OFF
Forced OFF
Forced OFF
Forced OFF
I/Q
U/V
U/V
U/V
U/V
U/V
U/V
U/V
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
NTSC
(000)
P/N ID
PAL/NTSC ident sensitivity switching;
(0): LOW (when digital comb filter used), (1): Normal
LOW
BB SW
Blue Back SW; (0): OFF, (1): ON
OFF
OSD-SL
OSD peak suppressing level switching; (0): 96 IRE, (1): 76 IRE
OS-ACL
OSD ACL SW; (0): ON, (1): OFF
TX-ACL
RGB ACL SW; (0): Gain 1/2, (1): Normal
Gain1/2
VSM PHASE
VSM output phase switching;
(00): −40 ns, (01): −20 ns, (10): 0 ns, (11) +20 ns
−40 ns
VSM GAIN
VSM output gain switching;
(00): 0dB, (01): −6dB, (10): −9dB, (11): OFF
0dB
APACON PEAK f0
Apacon peak frequency switching;
(000): Through (apacon off), (001): 4.0 MHz,
(010): 3.3 MHz, (011): 2.5 MHz,
(100): Through (apacon off), (101): 13 MHz,
(110): 10 MHz, (111): 8 MHz
(000)
Through
VSM PB
VSM output horizontal parabolic modulation SW;
(0): Parabolic modulation OFF,
(1): ON (nearby sharpness −3dB)
DC RESTORATION POINT
DC restoration start point; (000): 0% to (111): 42%
DC RESTORATION RATE
DC restoration rate; (000): 100% to (111): 130%
100%
DC REST. LIMIT
DC restoration limit point; (APL)
(00): 100%, (01): 87%, (10): 73%, (11): 60%
100%
BLACK STRETCH POINT (BSP)
Black stretcher start point; When APL 0%
(000): 22 IRE to (111): 56 IRE
22 IRE
APL VS BSP (AVS)
APL level vs. black stretcher start point;
(00): 0dB to (11): 1.5dB, BSP + APL × BSP × AVS
Y-γ PNT
Y-γ point switching; (0): 100 IRE, (1): 95 IRE
VSM-H. PB FREQ
VSM output horizontal parabolic frequency;
(00): 15.7 kHz, (01): 24.8 kHz, (10): 31.5 kHz, (11): 33.75 kHz
SHR-TRACKING
Sharpness tracking; (00): HIGH, (11): LOW
TEST
Test mode; (0): NORMAL
(1): Test mode (for factory test)
Switched by sub-address 17H
<during gate-pulse> D2 (0): during V-BLK, (1): NORMAL
Y/RGB smoothing OFF, Monitor of DAC at HD output
96 IRE
ON
Parabolic
modulation
OFF
0%
0dB
100 IRE

HIGH
NORMAL
RGB-γ
RGB-γ SW; (0): OFF, (1): ON
OFF
B.L.C.
Block level automatic correction (priority over black stretcher);
max 7.5 IRE (0): OFF, (1): ON
OFF
B.S.G.
Black stretcher gain SW; (0) ON, (1): OFF
ON
B.D.L.
Black detection SW; (0): 3 IRE, (1): 0 IRE
3 IRE
BS-ARE
Black area reinforcement SW;
For wide TV (when using time axis compression IC)
(0): ON, (1): OFF
ON
DYNAMIC ABL POINT
Dynamic ABL detection voltage; (000): min to (111): max
min
16
2002-04-01
TA1276AFG
Item
Explain
Preset
DYNAMIC ABL GAIN
Dynamic ABL sensitivity; (000): min to (111): max
AKB MODE
AKB MODE; Only black level
(00): AKB OFF + S/H LOW, (01): AKB OFF + Cutoff BUS
(10): AKB ON + I-DET NORMAL, (11): AKB ON + I-DET × 3
ABL POINT
ABL detect voltage; (000): min to (111): max
min
ABL GAIN
ABL GAIN; (000): min to (111): max
min
RGB OUT MODE
RGB output mode SW;
(00): NORMAL, (01): Only R, (10): Only G, (11): Only B
NORMAL
HD-OUT
HD output SW; (0): HD output, (1): AKB period pulse
HD output
V-BLK
Vertical Blanking SW; (0): ON, (1): OFF
VERTICAL FREQUENCY
Vertical Frequency;
(000): AUTO (50, 60 Hz),
(001): AUTO (50, 60 Hz/V MASK OFF),
(010): 60 Hz,
(011): 60 Hz (V MASK OFF),
(100): Forced 262.5H,
(101): Forced 263H,
(110): Forced 312.5H,
(111): Forced 313H,
When (100), (101), (110), (111): AFC Free-run
VERTICAL POSITION
Vertical position; (000): 0H to (111): 7H (1H STEP)
Y-DL
Y-DL SW; (0) OFF, (1): ON (+80 ns)
OFF
C-TRAP
Chroma Trap SW; (0): OFF, (1): ON
OFF
TOF-f0
Selectable TOF Peak Frequency;
(000): 0.8fsc + TOF OFF to (111): 1.5fsc
TOF-Q
Selectable TOF Q; (000): 0.6 to (111): 1.2
17
min
(00)
AKB OFF +
S/H LOW
ON
(000)
AUTO
0H
TOF OFF
0.6
2002-04-01
TA1276AFG
Delay Time From Y1 Input (PIN 52) to Y1 Output (PIN 67)
Color
Trap
Y-DL
Delay Time
B/W

OFF
ON
295 ns
375 ns
OFF
OFF
OFF
ON
ON
295 ns (4.43)
295 ns (3.58/M/N)
375 ns (4.43)
375 ns (3.58/M/N)
ON
OFF
OFF
ON
ON
295 ns (4.43)
310 ns (3.58/M/N)
375 ns (4.43)
390 ns (3.58/M/N)

OFF
ON
495 ns
575 ns
PAL/NTSC
SECAM
Read Mode
Characteristic
Explain
PORSET
Power On Reset; (0): RESISTER PRESET, (1): NORMAL
COLOR SYSTEM
Color system; Receiving system (judgement of ID ON/OFF)
(00): B/W, (01): SECAM, (10): PAL, (11): NTSC
X’tal
X’tal Mode; (00): , (01): 4.43 (N), (10): M, (11): 3.58
V-FREQ
Vertical frequency; (0): 50 Hz, (1): 60 Hz
V-STD
Vertical Standard ident; (0) NON-STANDARD, (1): STANDARD
H-LOCK
Horizontal Lock ident; (0): LOCK, (1): UN-LOCK
N-DET
Noise ident result; (0): FEW, (1): MANY
RGBOUT, Y1-IN, IQ-IN, Y2-IN,
H-OUT, VP-OUT
Self-ident result; (0): NG, (1): OK
IK IN
IK input ident result; (0): NG, (1): OK
18
2002-04-01
TA1276AFG
2
I C Bus Transmission/Receiving
Slave Address: 88H
A6
A5
A4
A3
A2
A1
A0
W/R
1
0
0
0
1
0
0
0/1
Start/Stop Condition
SDA
SCL
S
P
Start condition
Stop condition
Bit Transmission
SDA
SCL
SDA is not allowed to changed.
SDA is not allowed to changed.
Confirmation Response
SDA from
Transmitter
High impedance at 9th bit
SDA from
Receiver
SCL from
Master
High impedance
S
1
Low impedance only at 9th bit
8
19
9
2002-04-01
TA1276AFG
Data Transmit Format 1
S
Slave address
0 A
Sub address
7 bit
A
Transmit data
8 bit
MSB
S: Start condition
A P
8 bit
MSB
A: Acknowledge
MSB
P: Stop condition
Data Transmit Format 2
S
Slave address
0 A
Sub address
A
------ A
Transmit data 1
Sub address
A
A
------
Transmit data n
A P
Data Receive Format
S
Slave address
1 A
Receive data 01
7 bit
A
Transmit data 02
A P
8 bit
MSB
MSB
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave
receiver becomes a slave transmitter. This acknowledge is still generated by the slave.
The STOP condition is generated by the master.
Optional Data Transmit Format: Automatic Increment Mode
S
Slave address
0 A 1
7 bit
MSB
Sub address
A
Transmit data 1
7 bit
MSB
------
8 bit
MSB
Transmit data n
A P
8 bit
MSB
In this transmission method, data is set on automatically incremented sub-address from the specified
sub-address.
Purchase of TOSHIBA I2C components conveys a license under the Phillips I2C Patent Rights to use
these components in an I2C system, provided that the system conforms to the I2C standard Specification as
defined by Phillips.
20
2002-04-01
TA1276AFG
Pin 41 H-out (mode SW)
You can select the Double Scan Mode (external CP (clamping pulse) input mode), by connecting Pin 41 to
DEF VCC. (the threshold of pin 23: 8.7 V = DEF VCC − 0.3 V)
When Double Scan Mode, function of Pin 38 and 40 are changed.
• Normal Scan (internal CP) Mode: Pin 41  H-out
The function of Pin 40 is curve correction input, that of Pin 38 is FBP (flay back pulse) input.
The input signals of Y2, U/I and V/I inputs (pin 1, 2 and 3), Analog OSD inputs (pin 18, 19 and 20),
Analog RGB inputs (pin 22, 24 and 25) are clamped of the internal CP based on the Y1/Sync input (pin
52).
• Double Scan (external CP input) Mode: Pin 41  H-out
The function of Pin 40 is EXT/BPP (Note 2) input, that of Pin 38 is H/V BLK (blanking) input.
The input signals of Y2, U/I and V/I inputs (pin 1, 78 and 80), Analog OSD inputs (pin 18, 19 and 20),
Analog RGB inputs (pin 22, 24 and 25) are clamped of the external CP based on Pin 40.
In case of Double Scan Mode, bus “V-BLK” should be set (1); OFF.
Terminal Functions
Mode
Normal Scan Mode
(internal CP)
Double Scan Mode
(external CP input)
Pin 41
H-out
DEF VCC (9 V)
Pin 40
Curve correction signal input
EXT CP/BPP input
Pin 38
FBP input (for AFC-2 detection, H BKL)
H/V BLK input (for RGB H/V BLK, AKB)
Clamping by internal CP
(based on pin 52)
Clamping by external CP
(based on pin 40)
Pin No.
Pin 1, 78, 80
Pin 18, 19, 20
Pin 22, 24, 25
Pin 52
Normal scan; Y/Sync signal input
Pin 49
Normal scan; HD pulse output (based on pin 52)
Pin 29
Normal scan; VP output (based on pin 52)
Note 2: BPP: Black Peak detection stopping Pulse
21
2002-04-01
TA1276AFG
Maximum Ratings (Ta = 25°C)
Characteristics
Supply voltage
Input terminal voltage
Symbol
Rating
Unit
VCCmax
12
V
einmax
9
Vp-p
2500
mW
PD
Power dissipation
(Note 3)
Power dissipation reduction rate
1/θja
20.0
mW/°C
Operating temperature
Topr
−20 to 70
°C
Storage temperature
Tstg
−55 to 150
°C
Note 3: Refer to the figure below. (with device mounted on a PCB whose dimensions are 114.3 mm
76.2 mm × 1.6 mm and whose surface is 20% copper.
mount the device on a PCB of at least these dimensions and whose surface is at
least 20% copper.)
Note 4: Short pins 9 and 10 together on the PCB.
Power dissipation PD
(mW)
2500
1600
25
70
150
Ambient temperature Ta (°C)
Figure 1
Power Dissipation Reduction Against Higher Temperature
22
2002-04-01
TA1276AFG
Recommended Condition In Use
Characteristic
Supply Voltage
Y1/Sync, Y2 Input Signal Level
Description
Min
Typ.
Max
Pin 65
4.3
5.0
5.3
Pin 42, Pin 17, Pin 7
8.7
9.0
9.3
White: 100%, including,
synchronization
(synchronization: minus)
0.9
1.0
1.1
When TOF OFF (burst level)
200
300
400
When TOF ON (burst level)
100
200
300
B:C = 1:1

300

mVp-p
When OSD input (DC coupling)
4.2

5.0
V
When analog RGB input (AC coupling)
0.4
0.5
0.6
Chroma Input Signal Level
I/Q, U/V Input Level
OSD/Analog RGB Input Level
Analog RGB Input Level

0.4
0.5
0.6
FBP Width

11
12
13
FBP Input Current



1.5
RGB Output Current


1.0
2.0
H. OUT Output Current


3.0
10.0
Pin 47 Input Current


0.5
1.0
Unit
V
Vp-p
mVp-p
Vp-p
µs
mA
Electrical Characteristics
(VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25°C, unless otherwise specified)
Supply Current
Symbol
Test
Circuit
VCC1
ICC1

34.0
40.5
50.0
VCC2
ICC2

33.0
40.0
49.0
VCC3
ICC3

32.0
39.5
48.0
DEF VCC
ICC4

9.5
12.8
18.0
Pin Name
Min
23
Typ.
Max
Unit
mA
2002-04-01
TA1276AFG
Terminal Voltage
Pin No.
Pin Name
Symbol
Test
Circuit
Min
Typ.
Max
1
V/I INPUT
V1

4.8
5.0
5.2
2
BLACK PEAK HOLD
V2

4.2
4.4
4.6
3
APL DET
V3

4.8
5.0
5.2
5
VM OUTPUT
V5

3.2
3.5
3.8
8
ABCL INPUT
V8

5.85
6.10
6.35
18
OSD/ANALOG R INPUT
V18

3.3
3.6
3.9
19
OSD/ANALOG G INPUT
V19

3.3
3.6
3.9
20
OSD/ANALOG B INPUT
V20

3.3
3.6
3.9
21
Ys1
V21

0
0.1
0.3
22
ANALOG R INPUT
V22

3.5
3.8
4.1
24
ANALOG G INPUT
V24

3.5
3.8
4.1
25
ANALOG B INPUT
V25

3.5
3.8
4.1
27
Ys2
V27

0
0.1
0.3
40
CURVE CORRECTION
V40

4.3
4.5
4.7
43
32fH VCO
V43

5.4
5.7
6.0
49
SYNC. IN
V49

2.60
2.85
3.10
50
V SEP.
V50

5.7
6.1
6.5
52
Y1 INPUT
V52

2.7
3.0
3.3
54
CHROMA INPUT
V54

2.2
2.5
2.8
59
3.58 MHz X’tal
V59

3.7
4.0
4.3
61
M PAL X’tal
V61

3.7
4.0
4.3
62
4.43 MHz X’tal
V62

3.7
4.0
4.3
64
V/I OUTPUT
V64

2.2
2.5
2.8
65
U/Q OUTPUT
V65

2.2
2.5
2.8
67
Y1 OUTPUT
V67

1.7
2.0
2.3
69
SECAM CONT.
V69

3.7
4.0
4.3
76
COLOR LIMITER
V76

6.6
6.9
7.2
78
Y2 INPUT
V78

6.1
6.3
6.5
80
U/Q INPUT
V80

4.8
5.0
5.2
24
Unit
V
2002-04-01
TA1276AFG
AC Characteristic
Video Section
Characteristics
Y2 input dynamic range
Black level shift
Black stretching amplifier maximum
gain
Black stretching start point (1)
Black stretching start point (2)
D.ABL detection voltage
D.ABL sensitivity
Black level correction
Y γ correction point
Y γ correction gain
Black peak detection level
Symbol
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
DR53


0.7
1.0
1.5
Vp-p
VB

−5
0
5
VB3

35
42
49
GBS

1.30
1.40
1.50
PBST1

17
22
27
PBST2

51
56
61
PBS1


0
4
PBS2

14
20
26
∆V001

30
50
70
∆V010

90
110
130
∆V100

220
240
260
SDAMIN


0
0.04
SDAMAX

0.280
0.295
0.310
BLC

6.5
7.0
7.5
Pγ0

95
100
105
Pγ100

2
5
8
Gγ01

−3.5
−2.5
−1.5
Gγ10

−5.8
−4.8
−3.8
Gγ11

−7.5
−6.5
−5.5
∆VBP

−15
0
15
ADT100

0.9
1.0
1.1
1.25
1.35
1.45
−3
0
3
42
47
51
59
63
67
71
75
79
83
87
91
DC restoration gain
DC restoration start point
DC restoration limit point
Sharpness peak frequency
Sharpness control range
Sharpness control center gain
(Note V1)
(Note V2)
(Note V3)
(Note V4)
(Note V5)
(Note V6)
(Note V7)

mV
IRE
IRE
(Note V8)
(Note V9)
V/V
IRE

VDT0

VDT48

PDTL60

PDTL73

PDTL87

PDTL100

95
99
103
FAPL01

3.3
4.2
5.1
FAPL10

2.6
3.3
4.0
FAPL11

2.0
2.5
3.0
FAPH01

11.2
14.5
17.4
FAPH10

9.5
11.9
14.3
FAPH11

6.5
8.1
9.7
GMAXL

11
14
17
GMINL

−11
−8
−5
GMAXH

11
14
17
GMINH

−9
−6
−3
GCENL

7
10
13
GCENH

7
10
13
(Note V10)
(Note V11)

dB
mV
times
ADT130
%
%
MHz
(Note V12)
25
mV
IRE


times
dB
dB
2002-04-01
TA1276AFG
Characteristics
YNR characteristic
SRT response to 2T pulse input
VSM peak frequency
VSM gain
VSM parabolic modulating gain
Threshold voltage of VSM muting
Response time for VSM high speed
muting
Between Y2 input and R output delay
time
Symbol
Test
Circuit
GYL

GYH

TSL1

Test Condition
(Note V13)
TSRTL

TSH1

TSRTH

FVL

When normal mode
FVH

When double scan mode
GVL00
Min
Typ.
Max
−11
−8
−5
−9
−6
−4
100
120
140
40
60
80
160
180
200
20
30
45
7
9
11
12.5
16
19.5

11
13
15
GVL01

−7.5
−6
−4.5
GVL10

−11
−9
−8
GVL11

−∞
−35
−29
GVH00

11
13
15
GVH01

−7.5
−6
−5
GVH10

−11
−9
−7
GVH11

−∞
−32
−26
GVRL

−4
−3
−2
GVLL

−4
−3
−2
GVRH

−4
−3
−2
GVLH

VSR36

TVML1
(Note V14)
Unit
dB
ns
MHz
(Note V15)
(Note V16)
−4
−3
−2
0.65
0.75
0.85

0
50
100
TVML2

0
50
100
TVML3

0
50
100
TVML4

0
50
100
TVMH1

0
50
100
TVMH2

0
50
100
TVMH3

0
50
100
TVMH4

0
50
100
TY2RD

When through
26
36
46
TY2RL

When normal mode
200
220
240
TY2RH

When double scan mode
85
100
115
Pin 21, Pin 27
(Note V17)
26
dB
dB
V
ns
ns
2002-04-01
TA1276AFG
Chroma Section
Characteristics
ACC characteristic
Symbol
Test
Circuit
F600

F300

F30

Typ.
Max
0.300
0.355
0.410
0.300
0.355
0.410
0.290
0.343
0.400

0.090
0.113
0.135
A

0.90
0.97
1.05
es+

2.0
3.0
4.0
es−

−6.0
−4.3
−2.0
β3

0.70
1.20
1.70
β4

0.70
1.20
1.70
βM

0.70
1.20
1.70
f3PH

250
500
2000
f3HH

250
500
2000
f3PL

−2000
−500
−250
f3HL

−2000
−500
−250
f4PH

250
500
2000
f4HH

250
500
2000
f4PL

−2000
−500
−250
f4HL

−2000
−500
−250
fMPH

250
500
2000
fMHH

250
500
2000
fMPL

−2000
−500
−250
fMHL

−2000
−500
−250
f03

f0 = 3.579545 MHz
−200
0
200
f04

f0 = 4.433619 MHz
−200
0
200
f0M

f0 = 3.575611 MHz
−200
0
200
f3c

When 3.58 NTSC
0.54
0.78
0.96
f4c

When 4.43 PAL
0.52
0.72
0.90
fMc

When M-PAL
0.54
0.78
0.96
V1a

When 3.58 NTSC
2.80
3.20
3.50
V1b

Except for 3.58 NTSC
1.15
1.55
1.75
Q Axis
vBN

290
355
415
I Axis
vRN

290
355
415
vRN/vBN

0.94
1.00
1.15
Q Axis
θBN

29.0
33.0
37.0
I Axis
θRN

118.0
123.0
126.0
Relative
θBRN

87.0
90.0
93.0
B-Y
vBP

290
355
415
R-Y
vRP

290
355
415
vRP/vBP

0.94
1.00
1.10
B-Y
θBP

−5.0
0.0
3.0
R-Y
θRP

85.0
90.0
93.0
Relative
θBRP

87.0
90.0
93.0
APC frequency control sensitivity
APC pull-in/hold range
3.58 MHz/4.43 MHz free run
frequency
fsc output amplitude
fsc output DC level
IQ color difference signal
output level
IQ signal demodulation ratio
IQ demodulation angle
UV color difference
signal output level
UV signal demodulation ratio
UV demodulation angle
UV demodulation angle
(Note C1)
Min
F10
Sub color control characteristic
IQ demodulation angle
Test Condition

(Note C2)
(Note C3)
Unit
Vp-p
times
dB
Hz/mV
Hz
Hz
Vp-p
V
When B:C = 1:1 signal
R-Y/B-Y

I-Q
When B:C = 1:1 signal
R-Y/B-Y


27
mVp-p

°
°
mVp-p

°
°
2002-04-01
TA1276AFG
Characteristics
Residual carrier level
Symbol
Test
Circuit
vBNe

vRNe

vBPe

Test Condition
fsc level
Min
Typ.
Max

1.90
4.00

1.90
4.00

1.90
4.00
vRPe


1.90
4.00
vBHNe


1.90
4.00
vRHNe


1.90
4.00
vBHPe


1.90
4.00
vRHPe


1.90
4.00
VBN

B-Y output
1.80
2.15
2.50
VRN

R-Y output
1.90
2.24
2.60
VBP

B-Y output
1.80
2.15
2.50
VRP

R-Y output
1.90
2.25
2.60
PAL
VDLP

8.00
8.30
8.60
NTSC
VDLS

4.00
4.30
4.60
SECAM
VDLN

0.01
0.50
0.20
CP
SCH

7.50
7.80
8.10
HD
SCM

3.95
4.20
4.45
VD
SCL

2.25
2.50
2.75
SEN

3.70
4.00
4.30
SEP

3.70
4.00
4.30
SES

0.40
0.70
1.00
vNCL

3.80
5.83
7.87
vNCH

2.52
3.88
5.24
vNBL

3.73
5.74
7.75
vNBH

2.44
3.75
5.06
vPCL

4.80
6.83
8.87
vPCH

3.52
4.88
6.24
vPBL

4.73
6.74
8.75
vPBH

3.44
4.75
6.06
GFH3

20.7
22.7
24.7
GFC3

20.2
22.2
24.2
GFL3

18.2
20.2
22.2
GFH4

19.1
21.1
23.1
GFC4

19.4
21.4
23.4
GFL4

18.8
20.8
22.8
Through
GYs

−1.21
0.00
1.06
Normal
GYd

−1.21
0.00
1.06
Double
GYt

−1.21
0.00
1.06
Y1 in to Y1 out frequency bandwidth
GfY1

−4.0
−1.0
0.0
3.58
GTC3


−25
−20
4.43
GTC4


−25
−20
3.58 NTSC
VD3

1.30
1.60

4.43 PAL
VD4

1.30
1.60

Residual higher harmonics level
3.58 NTSC
Color difference output
DC voltage
4.43 NTSC
1HDL output DC level
Sand castle pulse height
SECAM output DC level
NTSC ident sensitivity
PAL ident sensitivity
TOF characteristic
Y1 in to Y1 out AC gain
Trap filter gain
Y1 input dynamic range
fsc × 2 level
Unit
mVp-p
mVp-p
V
Output from pin

(Note C4)
(Note C5)
(Note C6)
(Note C7)
20 Ɛog
(output level/input level)



28
V
V
V
mVp-p
mVp-p
dB
dB
dB
dB
Vp-p
2002-04-01
TA1276AFG
Text Section
Symbol
Test
Circuit
GR

GG

GB

GG/R

GB/R

R
GfR

G
GfG

B
GfB
Characteristics
AC gain
AC gain axial difference
Output bandwidth
Uni-color control characteristic
Brightness control characteristic
Brightness control sensitivity
Min
Typ.
Max
2.95
3.30
3.70
2.95
3.30
3.70
2.95
3.30
3.70
0.94
1.00
1.06
0.94
1.00
1.06
25
30

25
30


25
30

vuMAX

0.59
0.66
0.74
vuCNT

0.34
0.39
0.44
vuMIN

0.09
0.11
0.13
∆vu

14
15
16
VbrMAX

4.1
4.4
4.7
VbrCNT

3.25
3.55
3.85
VbrMIN

2.4
2.7
3.0
Gbr

5.7
6.6
7.5
Vwps1

2.75
2.95
3.15
2.30
2.50
2.70
2.10
2.26
2.42

−58
−49

−58
−49

−58
−49
0.45
0.50
0.55
0.45
0.50
0.55
0.65
0.85
1.05
0.3
0.8
1.3
0.3
0.8
1.3
White peak slice level
Black peak slice level
R
Signal-to-noise ratio of
RGB output
VBPS

N41


at −3dB point
(Note T2)
(Note T3)
(Note T4)
(Note T5)
(Note T6)

N42

B
N43

GHT1

GHT2

VHT

R
VVR

G
VVG

B
VVB

0.3
0.8
1.3
R
VHR

0.3
0.8
1.3
G
VHG

0.3
0.8
1.3
B
VHB

0.3
0.8
1.3
tdON


0.1
0.3
tdOFF


0.15
0.3
∆VSU+

2.0
2.5
3.0
∆VSU−

−3.8
−3.3
−2.8
V#41

2.25
2.50
2.75
V#42

2.25
2.50
2.75
V#43

2.25
2.50
2.75
∆Vout


0
150
CUT+

0.45
0.50
0.55
0.45
0.50
0.55
Half-tone ON voltage
H-BLK pulse output level

(Note T1)
G
Half-tone gain
V-BLK pulse output level
Vwps2
Test Condition
Blanking pulse delay time
Sub-contrast control range
RGB output voltage
RGB output voltage triaxial difference
Cut-off voltage control range
CUT−
(Note T7)
Pin 6


(Note T8)

(Note T9)

(Note T10)

29
Unit
times

MHz
Vp-p
dB
V
mV
Vp-p
V
dB
times
V
V
V
µs
dB
V
mV
V
2002-04-01
TA1276AFG
Characteristics
Drive adjustment control range
Symbol
Test
Circuit
DRG+
Min
Typ.
Max

2.35
2.85
3.35
DRG−

−5.75
−5.00
−4.25
DRB+

2.35
2.85
3.35
DRB−

−5.75
−5.00
−4.25
DRR+

2.35
2.85
3.35
DRR−

−5.75
−5.00
−4.25
MURD

2.1
2.26
2.42
2.1
2.26
2.42
2.1
2.26
2.42
2.1
2.26
2.42
1.15
1.30
1.45
−5
−3
−1
−14.5
−13
−11.5
Output voltage of muting
Output voltage of blue back
MUGD

BBR

BBG

BBB

ACL1

ACL characteristic
ABL point
ABL gain
RGB output mode
ACB pulse phase/amplitude
Test Condition
(Note T11)
(Note T12)
Unit
dB
V
V
(Note T13)
(Note T14)
ACL2

ABLP1

0.12
0.17
0.22
ABLP2

0.04
0.09
0.14
ABLP3

−0.05
0.00
0.05
ABLP4

−0.15
−0.10
−0.05
ABLP5

−0.24
−0.19
−0.14
ABLP6

−0.34
−0.29
−0.24
(Note T15)
ABLP7

−0.43
−0.38
−0.33
ABLP8

−0.50
−0.45
−0.40
ABLG1

−0.04
0.00
0.00
ABLG2

−0.09
−0.04
0.00
ABLG3

−0.24
−0.19
−0.14
ABLG4

−0.40
−0.35
−0.30
ABLG5

−0.56
−0.51
−0.46
ABLG6

−0.73
−0.68
−0.63
ABLG7

−0.90
−0.85
−0.80
ABLG8

−0.10
−0.92
−0.87
V43R

2.25
2.5
2.75
V42R

0.3
0.8
1.3
V41R

0.3
0.8
1.3
V43G

0.3
0.8
1.3
V42G

2.25
2.5
2.75
V41G

0.3
0.8
1.3
V43B

0.3
0.8
1.3
V42B

0.3
0.8
1.3
V41B

2.25
2.5
2.75
θACBR


1

θACBG


2

θACBB


3

VACBR

0.1
0.125
0.15
VACBG

0.1
0.125
0.15
VACBB

0.1
0.125
0.15
(Note T16)
(Note T17)
(Note T18)
30
Vp-p
dB
V
V
V
H
Vp-p
2002-04-01
TA1276AFG
Characteristics
IKR

IKG

IKB
Typ.
Max
1.45
1.65
1.85
1.45
1.65
1.85

1.45
1.65
1.85
γ1R

40
50
60
γ2R

60
70
80
∆1R

0.75
1.50
2.25
∆2R

−0.75
0.00
0.75
∆3R

−4.05
−3.30
−2.55
γ1G

40
50
60
γ2G

60
70
80
∆1G

0.75
1.50
2.25
∆2G

−0.75
0.00
0.75
∆3G

−4.05
−3.30
−2.55
γ1B

40
50
60
γ2B

60
70
80
∆1B

0.75
1.50
2.25
∆2B

−0.75
0.00
0.75
∆3B

−4.05
−3.30
−2.55
GTXR

4.0
4.5
5.0
GTXG

4.0
4.5
5.0
GTXB

4.0
4.5
5.0
GTXG/R

0.94
1.00
1.06
GTXB/R

0.94
1.00
1.06
R
GfTXR

25
30

G
GfTXG

25
30

B
GfTXB

25
30

R
DR35

0.6
1.0
1.5
G
DR34

0.6
1.0
1.5
B
DR33

0.6
1.0
1.5
VTXWPSR

2.30
2.55
2.80
VTXWPSG

2.30
2.55
2.80
VTXWPSB

2.30
2.55
2.80
VBPSR

2.10
2.26
2.42
VBPSG

2.10
2.26
2.42
VBPSB

2.10
2.26
2.42
RGB γ correction characteristic
Analog RGB gain
Analog RGB gain triaxial difference
Analog RGB input
dynamic range
Test
Circuit
Min
IK input level
Analog RGB bandwidth
Symbol
Analog RGB white peak slice level
Analog RGB black peak limiter level
Test Condition
Pin 73 input level
Unit
V
IRE
dB
IRE
(Note T19)
dB
IRE
(Note T20)

at −3dB point

(Note T21)
(Note T22)
31
dB
times

dB
Vp-p
Vp-p
V
2002-04-01
TA1276AFG
Characteristics
Symbol
Test
Circuit
vuTXRMAX
Test Condition
Min
Typ.
Max

0.8
0.9
1.0
vuTXGMAX

0.8
0.9
1.0
vuTXBMAX

0.8
0.9
1.0
Unit
vuTXRCNT

0.45
0.52
0.59
vuTXGCNT

0.45
0.52
0.59
vuTXBCNT

0.45
0.52
0.59
vuTXRMIN

0.10
0.12
0.14
vuTXGMIN

0.10
0.12
0.14
vuTXBMIN

0.10
0.12
0.14
∆vuTXR

15.5
17.0
18.5
∆vuTXG

15.5
17.0
18.5
∆vuTXB

15.5
17.0
18.5
VbrTXMAX

3.3
3.5
3.7
VbrTXCNT

2.85
3.05
3.25
VbrTXMIN

2.45
2.65
2.85
Analog RGB brightness control
sensitivity
GbrTX

6.0
6.8
7.6
mV
Analog RGB mode ON voltage
VTXON

0.65
0.85
1.05
V
TXACL1

−2
−1
−0.05
TXACL2

−6.5
−4.5
−2.5
−6.5
−4.5
−2.5
−16.5
−15.0
−13.5
4.1
4.8
5.4
4.1
4.8
5.4
RGB contrast control characteristic
Analog RGB brightness control
characteristic
Text ACL characteristic
Analog OSD gain
Analog OSD gain triaxial difference
Analog OSD band width
Analog OSD white peak slice level
Analog OSD black peak limiter level
Analog OSD output DC voltage
Analog OSD mode ON voltage
TXACL3

TXACL4

GOSDR

GOSDG

(Note T23)
(Note T24)
(Note T25)
Pin 27
(Note T26)
(Note T27)
GOSDB

4.1
4.8
5.4
GOSDG/R

G/R
0.94
1.00
1.06
GOSDB/R

B/R
0.94
1.00
1.06
GfOSDR

25
30

GfOSDG

25
30

GfOSDB

25
30

VOSD1R

1.80
2.00
2.20
VOSD1G

1.80
2.00
2.20
VOSD1B

1.80
2.00
2.20
VOSD2R

1.45
1.65
1.85
VOSD2G

1.45
1.65
1.85
VOSD2B

1.45
1.65
1.85
VOSD3R

2.10
2.26
2.42
VOSD3G

2.10
2.26
2.42
VOSD3B

2.10
2.26
2.42
VOSDDCR

2.3
2.5
2.7
VOSDDCG

2.3
2.5
2.7
VOSDDCB

2.3
2.5
2.7
VOSDON

2.05
2.30
2.55
at −3dB point
(Note T28)
(Note T29)
(Note T30)
Pin 21
32
Vp-p
dB
V
dB
times

dB
Vp-p
V
V
V
2002-04-01
TA1276AFG
Characteristics
Symbol
Test
Circuit
OSDACL1

OSDACL2

OSDACL3

OSDACL4

GCT


Symbol
Test
Circuit
Test Condition
vuCYMAX

vuCYCNT

vuCYMIN

∆vuCY
Min
Typ.
Max

0


0

−6.5
−4.5
−2.5
−16.5
−15
−13.5

−50
−45
dB
Min
Typ.
Max
Unit
1.5
1.8
2.13
0.85
1.0
1.2
0.24
0.29
0.355

14.0
15.5
17.0
vuCYMAX

1.18
1.4
1.68
vuCYCNT

0.73
0.86
1.04
vuCYMIN

0.076
0.090
0.108
∆vuCY+

3
4
5
∆vuCY−

−20
−18
−16
00
θR90

88
90
92
01
θR93

90
92
94
10
θR96

92
94
96
11
θ112

109
111
113
00
vR56/vB

0.55
0.58
0.61
01
vR68/vB

0.67
0.7
0.73
10
vR76/vB

0.78
0.81
0.84
11
vR84/vB

0.85
0.88
0.91
00
θG236

234
237
240
01
θG240

238
241
244
10
θG244

242
245
248
11
θG253

251
254
257
00
vG30/vB

0.275
0.300
0.325
01
vG325/vB

0.300
0.325
0.350
10
vG35/vB

0.325
0.350
0.375
11
Gv375/vB

0.350
0.375
0.400
OSD ACL characteristic
Crosstalk of RGB inputs
Test Condition
(Note T31)
Unit
dB
Color Difference Section
Characteristics
Color difference signal contrast
control characteristic
Color control characteristic
R-Y relative phase
R-Y relative amplitude
G-Y relative phase
G-Y relative amplitude
Color difference
half-tone gain
Color γ characteristic
R
GHTRY

G
GHTGY

B
GHTBY
(Note A2)




0.53
0.53

0.47
0.50
0.53
Vγ1

0.09
0.23
0.37
Vγ2

0.23
0.37
0.51
0.38
0.52
0.66
0.65
0.75
0.85
1.45
1.65
1.85
1.8
2.0
2.2
0.02
0.04
0.06

CLT0

CLT1

HBC1

(Note A3)
(Note A4)
(Note A5)
(Note A6)
33
dB
times
0.50
∆γ
Vp-p
°
0.50

dB
times
0.47
Vγ3
Vp-p
°
0.47
Color limiter characteristic
High bright color gain
(Note A1)
times
Vp-p

Vp-p
times
2002-04-01
TA1276AFG
Characteristics
Max
Base band tint control
characteristic
Min
Flesh color characteristic
Color difference signal input dynamic
range
Symbol
Test
Circuit
θTRMAX

θTBMAX
θTRMIN
Min
Typ.
Max
R
29
33
37

B
29
33
37

R
−37
−33
−29
θTBMIN

B
Fa33

DRR-Y

DRB-Y

GCD0

Color detail emphasis characteristic
Phase shift at IQ → UV conversion
Test Condition
(Note A7)

(Note A8)
GCD1

θI → U

θQ → V

Symbol
Test
Circuit
VVCO

VHON23

T23

Pin 41

Unit
°
−37
−33
−29
0.38
0.48
0.58
0.9
1.2
1.5
0.9
1.2
1.5
15.0
18.0
21.0

−15.0
0.0
31
33
35
31
33
35
Min
Typ.
Max
Unit
3.1
3.4
3.7
V
4.7
5.0
5.3
V
38.5
40.5
42.5
%

Vp-p
Vp-p
°
DEF Section
Characteristics
32fH VCO oscillation start voltage
Horizontal output start voltage
Horizontal output duty cycle
Test Condition
DEF VCC Voltage
fH050

Vertical freq.; Auto
15475
15625
15775
fH060

Vertical freq.; 60 Hz
15585
15734
15885
fHMIN

14700
15000
15300
fHMAX

16500
16700
16900
βH

180
230
280
VH23

2.7
3.0
3.3
VL23


0.15
0.30
SPH1

11.1
11.3
11.5
SPH2

0.35
0.45
0.55
SPH3

0.11
0.21
0.31
∆H24

(Note D3)
2.3
2.5
2.7
V
∆HSFT

(Note D4)
5.7
6.2
6.7
V
CPS

2.8
2.9
3.1
V
CPW

1.0
1.2
1.4
V
Threshold of external clamp pulse
input
CPV30

Pin 40
3.3
3.6
3.9
V
Threshold of external clamp mode
switching
CPMV23

Pin 41
8.5
8.7
8.9
V
Horizontal output free-run frequency
Variable range of horizontal output
frequency
Horizontal output frequency control
sensitivity
High level
Horizontal output voltage
Low level
Horizontal output phase
Curve correction characteristic
Variable range of horizontal picture
position
Clamp pulse start phase
Clamp pulse width
Threshold of external black peak hold
stopping pulse
SPC gate pulse start phase
SPC gate pulse width
Hz
Variable pin 45 voltage
(Note D1)
Pin 40
(Note D2)
(Note D5)
Hz
Hz/
0.1 V
V
V
BPv17

Pin 49, at normal scan
0.9
1.1
1.3
BPv24

Pin 40, at doble scan
0.9
1.1
1.3
GPS

1.9
2.1
2.3
µs
GPW

1.9
2.1
2.3
µs
(Note D6)
34

2002-04-01
TA1276AFG
Symbol
Test
Circuit
HPS

HPW50

HPW60
HD output start phase
Characteristics
Min
Typ.
Max
Unit
4.6
4.8
5.0
µs
9.9
10.4
10.9

10.5
11.0
11.5
HDS

0.7
0.9
1.1
µs
HD output pulse width
HDW

0.7
0.9
1.1
µs
HD output voltage
VHD

4.5
4.8
5.1
V
Threshold of AFC-2 detection
VHBLK1

Pin 38, at
normal scan
3.2
3.5
3.8
V
Threshold of horizontal timing
VHBLK2

Pin 38, at
doble scan
3.2
3.5
3.8
V
Threshold of blanking pulse
VHBLK3

Pin 38,
H/V blanking
0.8
1.1
1.4
V
Vertical blanking pulse start phase
VP50S1

46
48
50
µs
Vertical blanking pulse stop phase
VP50S2


23

H
Vertical blanking pulse start phase
VP60S1

46
48
50
µs
Vertical blanking pulse stop phase
VP60S2


21

H
External blanking threshold current
ABLK

Pin 30 input current
150
300
400
µA
Vertical output start voltage
VON

DEF VCC voltage
4.7
5.0
5.3
V
Vertical output
fV050

Vertical freq.; Auto
40
45
50
Free-run frequency
fV060

Vertical freq.; 60 Hz
48
53
58
VVH

4.7
5.0
5.3
VVL


0.0
0.3
SPC horizontal blanking pulse start
phase
SPC horizontal blanking pulse pulse
width
Vertical output voltage
Test Condition
(Note D7)
(Note D8)
(Note D9)
(Note D10)
µs
Hz
Pin 29
V
fPL1


224.5

fPH1


353

fPL2


224.5

fPH2


297

Vertical pull-in range (3)
f50P


288.5

H
Vertical pull-in range (4)
f60P


288

H
VR50S1

44
46
48
VG50S1

44
46
48
VB50S1

44
46
48
VR50S2


19

VG50S2


19

VB50S2


19

VR60S1

44
46
48
VG60S1

44
46
48
VB60S1

44
46
48
VR60S2


17

VG60S2


17

VB60S2


17

Vertical pull-in range (1)
Vertical pull-in range (2)
RGB vertical blanking pulse start
phase (1)
RGB vertical blanking pulse stop
phase (1)
RGB vertical blanking pulse start
phase (2)
RGB vertical blanking pulse stop
phase (2)
(Note D11)
(Note D12)
(Note D13)
35
H
H
µs
H
µs
H
2002-04-01
TA1276AFG
Test Conditions
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
SW 49
SW 50
SW 53
Video block common test conditions
1)
SW 13: A, SW 18: ON, SW20: ON, SW 23: ON, SW33: A, SW34: A, SW35: A, SW37: A, SW38: A, SW39: A, SW46: ON,
SW 51: B, SW 52: B
2)
For testing, see the picture sharpness AC characteristics testing circuit diagram. After using the preset values to
transmit the BUS control data, set ACB operation switching to ACB off (01).
3)
Ensure the composite signal is always input to pin 52 (Y1/sync input).
1)
Set the BUS control data to the preset value.
2)
Connect pin 78 to an external power supply (PS) and observe pin 2.
3)
Turn the Y mute off (1), turn the black stretch gain off (1), and set the black detect level to 0 IRE (1).
4)
Increase the PS voltage from 5 V and measure the DC differential VB of pin 3 where the picture period (high period) of
pin 2 goes low.
5)
Set the black detect level to 3 IRE (0).
6)
As in 4), measure the DC differential VB3 of pin 3.
Video Block
V1
Black Detect Level Shift
C
OFF
C
C
Pin 3
VB.VB3
Pin 38
V2
Black Stretch Amp Maximum
Gain
↑
↑
A
A
1)
Set the BUS control data to the preset value.
2)
Set SW50 to A (maximum gain) and input a 500 kHz sine wave to TP78.
3)
Use pin 78 to adjust the signal amplitude to 0.1 Vp-p.
4)
Turn the Y mute off (1), turn the black stretch gain off (1), and measure the amplitude VA of pin 3.
5)
Turn the black stretch gain on (0) and measure the amplitude VB of pin 3.
6)
Calculate the GBS using the following formula.
GBS = VB ÷ VA
36
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V3
Black Stretch Start Point (1)
C
SW 49
OFF
SW 50
A
SW 53
1)
Set the BUS control data to the preset value.
2)
Set SW50 to A (maximum gain), turn the Y mute off (1), and turn the black stretch gain off.
3)
Connect pin 78 to an external power supply (PS), increase the voltage from V53, and plot the resulting change in
voltage S1 of pin 3.
4)
Next, turn the black stretch gain on (0), set the black stretch point 1 to the minimum (000), increase the PS voltage
from V53 as in 3), and plot the resulting change in voltage S2 of pin 3.
5)
Set the black stretch point 1 to the maximum (111), increase the PS voltage from V53 as in 3), and plot the change in
voltage S3 of pin 3.
6)
Use the diagram below to calculate the intersections VBST1 and VBST2 of S1, S2, and S3. Use the following formulas
to calculate PBST1 and PBST2.
PBST1 [(IRE)] = ((VBST1 [V] − V49 [V] ÷ 1.4 [V]) × 100 [(IRE)]
PBST2 [(IRE)] = ((VBST2 [V] − V49 [V] ÷ 1.4 [V]) × 100 [(IRE)]
Pin
C
S3
VBST2
S1
VBST1
S2 (asymptotic line)
V49
Pin
37
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V4
Black Stretch Start Point (2)
C
SW 49
ON
SW 50
A
SW 53
A
1)
Set the BUS control data to the preset value.
2)
Turn the black stretch gain off (1), turn the Y mute off (1), and turn the video mute off (0).
Input the TG7 linearity to TP53, use pin 78 to adjust the amplitude as in the diagram, set unicolor to the center
(1000000), and measure the resulting amplitude (V43) of pin 11 (R OUT).
3)
Turn the black stretch gain on (0), connect pin 3 to an external power supply (PS), and measure pin 11 (R OUT).
4)
When the black stretch start point 2 data are at the minimum (000), calculate as in the diagram the black stretch start
point differential ∆V000 for when P is V49 (APL 0%) and for when P is V49 + 1.0 [V] (APL 100%).
5)
Next, when the black stretch start point 2 data are maximum (111), calculate differential ∆V111 in the same way.
6)
Calculate the following formulas.
PBS1 = (∆V000/V43) × 100
PBS2 = (∆V111/V43) × 100
LINEARITY
APL 100%
0.7 Vp-p
∆V***
APL 0%
0.3 Vp-p
Pin 78 waveform
Pin 11 (R
38
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V5
D.ABL Detect Voltage
C
SW 49
OFF
SW 50
A
SW 53
C
1)
Set the BUS control data to the preset value.
2)
Turn the Y mute off (1), set the ABL sensitivity to the minimum (000), set the D.ABL sensitivity to the maximum (111),
and turn the black stretch gain off (1).
3)
Connect pin 8 to an external power supply (PS) and decrease the voltage from 6.5 V.
4)
Repeat 3) when the D.ABL detect voltage bus data are 000, 001, 010, and 100 respectively. Measure PS voltages
V000, V001, V010, and V100 when the picture period of pin 3 changes to low. (enlarge the range before measuring.)
5)
Next, calculate the ∆V001, ∆V010, and ∆V100 voltage differentials from V000 and V001, V010, and V100.
∆V*** = V000 − V001 (V010, V100)
Pin 3 Undetected
Pin 3 Detected
Pin 38
39
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
SW 49
SW 50
SW 53
1)
Set the BUS control data to the preset value.
2)
Turn the Y mute off (1), turn the black stretch gain off (1), and connect pin 8 to an external power supply.
3)
With the D.ABL detect voltage at the minimum (000), plot the voltage characteristics of pin 3 in relation to the voltage
of pin 8 when D.ABL sensitivity is at the minimum (000) and the maximum (111).
4)
From the diagram, calculate the SDAMIN and SDAMAX gradients.
SDAMIN, SDAMAX = ∆Y/∆X
Pin 3
10%
V6
D.ABL Sensitivity
C
ON
A
C
100%
∆Y
10%
Pin 8
∆X
V7
Black Level Compensation
↑
OFF
↑
1)
Set the BUS control data to the preset value.
2)
Turn the Y mute off (1), turn the black stretch gain off (1), and observe pin 3.
3)
Turn the black level compensation on (1), measure ∆V1 [mV], and calculate the following formula.
BLC = (∆V1/1.4 × 103) × 100 (IRE)
↑
Picture period
∆V1 [mV]
40
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V8
V9
Black Peak Detect Level
DC Transmission Rate
Compensation Gain
C
↑
SW 49
ON
↑
SW 50
C
B
SW 53
C
1)
Set the BUS control data to the preset value.
2)
Measure the DC voltage V49 of pin 3.
3)
Connect pin 78 to an external power supply (PS).
4)
Turn the Y mute off (1), the black stretch gain off (1), and set the black detect level shift to 0 IRE (1).
5)
Increase the PS from 0 V and measure the voltage VBP of pin 3 where the DC level of the picture period of pin 2 shifts
from high to low.
6)
Calculate ∆VBP from the following formula.
∆VBP = VBP − V49
1)
Set the BUS control data to the preset value.
2)
Turn the Y mute off (1), turn the video mute off (0), and connect pin 78 to an external power supply (PS).
3)
Measure the amplitude V43 of pin 11, set the PS to V53 + 0.7 V, and adjust V43 to 0.7 Vp-p using unicolor.
4)
With the DC transmission rate compensation gain at the minimum (000), measure ∆V1 and ∆V2 as in the diagram
below.
5)
Next, with the DC transmission rate compensation gain at the maximum (111), measure ∆V3 and ∆V4.
6)
Calculate ADT100 and ADT130 from the following formula.
ADT100 = (∆V2 [V] − ∆V1 [V]) ÷ 0.1 [V]
ADT130 = (∆V4 [V] − ∆V3 [V]) ÷ 0.1 [V]
↑
V53 + 0.1 [V]
∆V1 (∆V3)
Picture period
V53 + 0.2 [V]
∆V2 (∆V4)
Pin 11 waveform
41
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V10
DC Transmission
Compensation Start Point
C
SW 49
ON
SW 50
B
SW 53
1)
Repeat steps 1) and 2) of V21.
2)
Measure the amplitude V43 of pin 11, set the PS to V53 + 0.7 V, and adjust V43 to around 1.0 Vp-p using unicolor.
3)
With the DC transmission compensation rate at the minimum (000), increase PS from V53 and plot the relationship
between the voltages of pins 3 and 11.
4)
Next, with the DC transmission compensation rate at the maximum (111), increase PS from V53 and plot the
relationship between the voltages of pins 3 and 11.
5)
With the DC transmission compensation rate at the maximum (111), increase the PS from V53 when the DC
transmission compensation start point reaches the maximum (111) and plot the relationship between the voltages of
pins 3 and 11.
6)
Calculate VDT0 and VDT42 from the following formula.
VDT0 = ((VSP0 − V49)/1 [V]) × 100 [%]
VDT42 = ((VSP42 − V49)/1 [V]) × 100 [%]
C
Pin
DC transmission
compensation start point
DC transmission
compensation start point
VSP0
DC transmission compensation rate 000
VSP42
VPC
42
Pin
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V11
DC Transmission
Compensation Limit Point
SW 49
SW 50
SW 53
1)
Set the BUS control data to the preset value.
2)
Turn the Y mute off (1), turn the video mute off (0), and with the unicolor set at maximum (1111111), connect pin 3 to
an external power supply (PS).
3)
Set the DC transmission compensation rate to the maximum (111).
4)
Increase the PS from 5 V, observe pin 11, and plot the DC transmission compensation rate.
5)
Repeat 4) above but change the DC transmission compensation limit point data. Calculate PDTL60, PDTL73, PDTL87,
and PDTL100 from the measured data and the following formulas.
PDTL60 = ((VL60 − V49)/1.0) × 100 [%]
PDTL73 = ((VL73 − V49)/1.0) × 100 [%]
PDTL87 = ((VL87 − V49)/1.0) × 100 [%]
PDTL100 = ((VL100 − V49)/1.0) × 100 [%]
Pin
C
ON
B
C
100% (00)
87% (01)
73% (10)
60% (11)
Pin
VL100
VL60
VL73
43
VL87
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V12
V13
Picture Sharpness Control
Range
YNR Characteristics
C
↑
SW 49
OFF
↑
SW 50
B
↑
SW 53
A
1)
Set the BUS control data to the preset value.
2)
Input a sine wave to TP78.
3)
Set the amplitude of pin 78 to 20 mVp-p.
4)
Set the unicolor to the maximum (1111111), set SHR tracking to SRT-gain low (11), and set the aperture compensator
peak frequency to 4.2M (001).
5)
Turn the Y mute off (1), the video mute off (0), connect TP11 and TP15b, and observe TP15a.
6)
Set the picture sharpness to the maximum (1111111). When the frequencies are 100 kHz and FAPL01, measure the
V100 and VL amplitudes respectively and calculate GMAXL by the formula shown below.
7)
Next, set the picture sharpness to the minimum (0000000). As in 6), when the frequencies are 100 kHz and 2.4 MHz,
measure the V100 and VL amplitudes respectively and calculate GMINL by the formula shown below.
8)
Set the aperture compensator peak frequency to 7.7M (111) and the picture sharpness to the maximum (1111111).
When the frequencies are 100 kHz and FAPH11, measure the V100 and VH amplitudes respectively and calculate
GMAXH by the formula shown below.
9)
Next, set the picture sharpness to the minimum (0000000). When the frequencies are 100 kHz and 4 MHz, measure
the V100 and VH amplitudes respectively and calculate GMINH by the following formula.
G**** [dB] = 20 × Log (VL (H) ÷ V100)
1)
Repeat steps 1) to 5) of V12.
2)
With YNR on (1) and the picture sharpness at minimum (0000000), measure the TP15a amplitudes V100 and VL when
the input signal frequencies are 100 kHz and 2.4 MHz respectively.
3)
Next, set the aperture compensator peak frequency to 7.7M (111). When the input signal frequencies are 100 kHz and
4 MHz, measure the V100 and VH amplitudes respectively and calculate GYL and GYH by the following formula.
GYL (H) [dB] = 20 × Log (VL (H) ÷ V100)
↑
44
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V14
2T Pulse Response SRT
Control
C
SW 49
ON
SW 50
B
SW 53
A
1)
Set the BUS control data to the preset value.
2)
Input a 2T pulse (STD) signal to TP78, turn the Y mute off (1), turn the video mute off (0), set unicolor to maximum
(1111111), and set SHR tracking to SRT-gain low (11).
3)
Set the sharpness control to the center (1000000), set the aperture compensator peak frequency to 4.2M (001),
connect TP11 and TP15b, and observe TP15a.
4)
Measure TSL1 as in the diagram below.
5)
Set SHR tracking to SRT-gain high (00) and measure TSL2.
6)
Next, set the aperture compensator peak frequency to 7.7M (111) and measure TSH1 and TSH2 as above.
7)
Calculate the following formula.
TSRTL = TSL1 − TSL2
TSRTH = TSH1 − TSH2
10%
100%
10%
TS**
45
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
V15
VSM Gain
C
SW 49
ON
SW 50
B
SW 53
1)
Set the BUS control data to the preset value.
2)
Input the frequency FVL sine wave to TP78.
3)
Turn the Y mute off (1), turn the video mute off (0), set the aperture compensator peak frequency to 4.2M (001), and
set the amplitude of pin 78 to 0.1 Vp-p.
4)
Measure the TP5 amplitudes VL00, VL01, VL10, and VL11 in the following cases.
VSM gain
0dB (00) → VL (H) 00
−6dB (01) → VL (H) 01
−9dB (10) → VL (H) 10
OFF (11) → VL (H) 11
5)
Input the sine wave of frequency FVH to TP78, set the aperture compensator peak frequency to 7.7M (111), and
measure the TP5 amplitudes VH00, VH01, VH10, and VH11 as above.
6)
Calculate the following formulas.
GVL (H) 00 = 20 × Log (VL (H) 00/0.1) [dB]
GVL (H) 01 = 20 × Log (VL (H) 01/0.1) [dB] − 20 × Log (VL (H) 00/0.1) [dB]
GVL (H) 10 = 20 × Log (VL (H) 10/0.1) [dB] − 20 × Log (VL (H) 00/0.1) [dB]
GVL (H) 11 = 20 × Log (VL (H) 00/0.1) [dB]
A
46
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
SW 49
SW 50
SW 53
1)
Repeat steps 1) to 3) of V15.
2)
Turn on the VSM output horizontal parabola modulation (1) and set the VSM gain to 0dB (00).
3)
As in the diagram, measure the picture period amplitudes VCL, VRL, and VLL of TP5.
4)
Next, input the sine wave of frequency FVH to TP78, set the aperture compensator peak frequency to 7.7M (111), set
the VSM horizontal parabola frequency to 31.5k (10), and measure the picture period amplitudes VCH, VRH, and VLH
of TP5 as above.
5)
Calculate GVRL, GVLL, GVRH, and GVLH from the following formulas.
GVRL (H) = 20 × Log (VRL (H)/VCL (H))
GVLL (H) = 20 × Log (VLL (H)/VCL (H))
VCL (H)
V16
VSM Horizontal Parabola
Modulation Gain
C
ON
B
A
VRL (H)
VLL (H)
50%
6)
In 3) and 4) above, turn the VSM output horizontal parabola modulation off (0) and check that no parabola modulation
is generated on the picture period signal. (VPOFL, VPOFH)
47
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 15
SW 49
SW 50
SW 53
1)
Repeat steps 1) to 3) of V15, then observe pin 5.
2)
Input a pulse like that shown below to pin 27 and measure the response time TVML1 (2) at that input.
3)
Similarly, input the pulse to pin 21 and measure the response time TVML3 (4) at that input.
4)
Input the sine wave of frequency FVH to TP78, set the aperture compensator peak frequency to 7.7M (111), and
measure the response time TVMH1 (2) as in 2) above.
5)
Similarly, input the pulse to pin 21 and measure the response time TVMH3 (4) at the input.
Square wave (50 kHz, 2 Vp-p)
2 [V]
V17
VSM High-Speed Mute
Response Time
C
ON
B
A
VSR36 [V]
Pin 27 (pin)
0 [V]
TVML1 (3), TVMH1 (3)
TVML2 (4), TVMH2 (4)
Pin 5 Waveform
Mute time
48
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Subaddress
Switching Mode
Test Conditions
07
10
17
18
SW 5
SW 6
SW 13
SW 15
Chroma block common test conditions
SW 13: B, SW 15: C, SW18: ON, SW20: ON, SW 23: ON, SW24: ON, SW 25: ON,
SW 33: A, SW 34: A, SW 35: A, SW37: A, SW38: A, SW 39: A, SW 46: ON
Chroma Block
C1
C2
C3
C4
ACC Characteristics
APC Frequency Control
Sensitivity
APC Pull-In and Hold Range
SECAM Output DC Level
Change
80
↑
↑
↑
00
↑
↑
C0
00
↑
↑
00
or
30
or
60
00
↑
↑
↑
OPEN
↑
↑
↑
OPEN
↑
↑
↑
B
A
↑
↑
49
A
↑
1)
Input 3.58-NTSC rainbow signal (C-4 signal) burst/chroma signals with the same
burst/chroma amplitude to the chroma input pin (TP54).
2)
Measure the output amplitudes F10, F30, F300, and F600 of the UQ output pin 65
when the chroma input amplitude levels are set to 10, 30, 300, and 600 mVp-p.
3)
Calculate A = F30/F300.
1)
Connect SW 13 to A.
2)
Switch the color system mode (10) to 3.58 NTSC (00), 4.43 PAL (60), and M-PAL
(80) and measure the following for each of those cases.
3)
Connect external voltage source (V11) to APC filter pin 58.
4)
Vary the voltage of the external voltage source (V11) and observe the fsc output pin
72 using a frequency counter.
5)
Measure the free-run sensitivity β for the V11 + ∆V11 (100 mV) near the fc.
(3.5 NTSC = β 3, 4.3; PAL = β4; M-PAL = β M)
1)
Input 3.579545 MHz, 4.433619 MHz, and 3.575611 MHz continuous waves (200
mVp-p to the chroma input pin (TP54).
2)
Switch the color system mode (10) to 3.58 NTSC (00), 4.43 PAL (60), and M-PAL
(80), and measure the following for each of those cases.
3)
Vary the input signal frequency in 10 Hz-steps within a range of ±3 kHz.
4)
Clamp B/W → color mode (f*P*). While holding color → B/W mode (f*H*),
measure the ± deviations from the frequency at each continuous wave input.
↑
↑
1)
Connect SW 13 to A.
2)
Measure the output DC level of the SECAM control pin 3 when the color system
mode (10) is switched to 3.58 NTSC (00), 4.43 PAL (30), and SECAM (60).
(3.58 NTSC mode: SEN)
(4.43 PAL mode: SEP)
(SECAM mode: SES)
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Subaddress
Switching Mode
Test Conditions
07
C5
C6
C7
NTSC Ident Sensitivity
PAL Ident Sensitivity
TOF Characteristics
80
↑
↑
10
C0
or
D0
↑
00
or
60
17
00
↑
↑
18
00
↑
38
SW 5
OPEN
↑
↑
SW 6
OPEN
↑
↑
SW 13
B
↑
↑
50
SW 15
A
↑
↑
1)
Input a 3.58-NTSC rainbow (C-4 signal) burst/chroma signal with the same
burst/chroma amplitudes to the chroma input pin (TP54).
2)
Observe the BUS READ mode (5th and 6th bits of the 1st byte).
3)
Switch the Indent sensitivity (set the subaddress (10) data low (C0) and high (D0))
and perform the following measurements.
4)
Increase the input signal amplitude from 0 and measure the input signal amplitude
at the switch to 3.58 NTSC mode.
(LOW (C0): vNCL, High (D0): vNCH)
5)
Lower the input signal amplitude from 100 mVp-p and measure the input signal
amplitude at the deviation from 3.58 NTSC mode.
(LOW (C0): vNBL, High (D0): vNBH)
1)
Input a 4.43-PAL rainbow (C-4 signal) burst/chroma signal with the same
burst/chroma amplitude to the chroma input pin (TP54).
2)
Observe the BUS READ mode (5th and 6th bits of the 1st byte).
3)
Switch the Indent sensitivity (set the subaddress (10) data low (C0) and high (D0))
and perform the following measurements.
4)
Increase the input signal amplitude from 0 and measure the input signal amplitude
at the switch to 4.43 PAL mode.
(LOW (C0): vPCL, High (D0): vPCH)
5)
Lower the input signal amplitude from 100 mVp-p and measure the input signal
amplitude at the deviation from 4.43 PAL mode.
(LOW (C0): vPBL, High (D0): vPBH)
1)
Input the signal C-1 to the chroma input pin (TP54).
(signal amplitude = 50 mVp-p).
2)
When the subaddress (10) data are f0 = 3.58 MHz (00) and f0 = 4.43 MHz (60), and
subaddress (18) data are (38), connect 1.5 kΩ between the VI output pin 6 and the
5 V-VCC and observe the VI output pin 64.
3)
Measure the output amplitude when f0 = 3.58 MHz and calculate the gain in
decibels from the input (GFC3).
4)
Measure the output amplitude when f0 = 3.58 MHz ± 500 kHz and calculate the
gain in decibels from the input
(+500 kHz: GFH3, −500 kHz: GFL3).
5)
Measure the output amplitude when f0 = 4.43 MHz and calculate the gain in
decibels from the input (GFC4).
6)
Measure the output amplitude when f0 = 4.43 MHz ± 500 kHz and calculate the
gain in decibels from the input
(+500 kHz: GFH4, −500 kHz: GFL4).
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
SW 34
SW 35
SW 37
SW 38
SW 39
SW 51
SW 52
SW 53
Text block common test conditions
SW 13: A, SW 15: C, SW18: ON, SW20: ON,
SW 23: ON, SW24: ON, SW 25: ON
Text Block
T1
T2
AC Gain
Unicolor Adjustment
Characteristics
A
↑
A
↑
A
↑
A
↑
A
↑
A
↑
B
↑
B
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
T4
Brightness Sensitivity
↑
↑
↑
↑
↑
↑
↑
↑
↑
T6
Black Peak Slice Level
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
51
↑
↑
2)
Measure the picture period amplitude of pins 15, 13, 11 (V41, V42, and
V43).
3)
GR = V43/0.2
GG = V42/0.2
GB = V41/0.2
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78.
2)
Set the unicolor data to maximum (7F), center (40), and minimum (00) and
measure the pin 11 picture period amplitudes for each case.
(vuMAX, vuCNT, vuMIN)
3)
Calculate the unicolor maximum and minimum amplitude ratios using
digital conversion. (∆vu)
1)
Input signal 2 to pin 78 and adjust the picture period amplitude output of
pin 11 to 1 Vp-p.
2)
Measure the voltage of pin 11 when the brightness is changed to
maximum (FF), center (80), and minimum (00). (VbrMAX, VbrCNT,
VbrMIN)
1)
Using the results obtained from T3, calculate the brightness sensitivity
from the following formula.
2)
Gbr = (VbrMAX − VbrMIN)/256
1)
Change the bus data and set the sub-contrast to maximum.
2)
Connect an external power supply to pin 78 and increase the voltage
gradually from 5.8 V.
3)
Measure the picture period amplitude voltage of pin 11 when pin 11°s
picture period is clipped (Vwps1).
4)
Change the subaddress (05) data to (81) and repeat steps 1) to 3) above.
(Vwps2)
1)
Repeat step 1) of T5.
2)
Connect an external power supply to pin 78 and decrease the voltage
gradually from 5.8 V.
3)
Measure the voltages of pins 11, 13, and 15 when their picture periods are
clipped.
↑
Brightness Adjustment
Characteristics
White Peak Slice Level
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78.
A
T3
T5
1)
↑
C
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T7
Half Tone Characteristics
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
B
SW 52
B
SW 53
A
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78.
2)
Measure the picture period amplitude of pin 15 (V41A).
3)
Apply 1.5 V from an external power supply to pin 6.
4)
Measure the picture period amplitude of pin 15 (V41B).
5)
GHT1 = V41B/V41A
6)
Halt the voltage applied to pin 6, set the subaddress (03) data to (81), and
measure the picture period amplitude of pin 15 (V41C).
7)
GHT2 = V41C/V41A
1)
Calculate tdON, tdOFF from the signal applied to pin 25 (H.BLK input) (A
below) and the output signals from pins 11, 13, and 15 (B below).
(A) Signal applied to pin 25
63.5 µs
T8
BLK Pulse Delay Time
↑
↑
↑
↑
↑
↑
↑
↑
C
(B) Output signals from pins
11, 13, 15
tdON
tdOFF
t
T9
T10
RGB Output Voltage
Cutoff Voltage Variable
Range
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
52
↑
↑
↑
1)
Measure the picture period voltages for pins 11, 13, and 15.
1)
Set the subaddress (17) data to (07).
2)
Measure the picture period voltage of pin 11 when the cutoff (subaddress
0C) data are changed to maximum (FF), center (80), and minimum (00),
and calculate the amount of change of maximum and minimum from the
center. (CUT+, CUT−).
3)
In steps 1) and 2) above, make the following changes and remeasure:
Change the subaddress (0D) data and measure pin 13,
Change the subaddress (0E) data and measure pin 15.
↑
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T11
Drive Adjustment Variable
Range
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
B
SW 52
B
SW 53
A
T12
Output Voltage During Muting
↑
↑
↑
↑
↑
↑
↑
↑
C
T13
Output Voltage at Blue Back
↑
↑
↑
↑
↑
↑
↑
↑
↑
T14
ACL Characteristics
↑
↑
↑
↑
↑
↑
↑
53
↑
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78.
2)
Measure the picture period amplitude of pin 13 when the drive
(subaddress-09) data are changed to maximum (FE), center (80), and
minimum (00).
3)
Calculate the maximum and minimum amplitude ratios for the drive center
using decibel conversion. (DRG+, DRG−)
4)
In steps 1) to 3) above, change the subaddress (0A) data, measure pin 15,
and repeat the calculations. (DRB+, DRB−)
5)
In steps 1) to 3) above, set data of the LSB of subaddress (09) to 1,
measure pin 11, and repeat the calculations. (DRR+, DRR−)
1)
Set the subaddress (00) data to (FF).
2)
Measure the picture period voltages of pins 11, 13, and 15. (MURD,
MUGD, MUBD)
1)
Set the subaddress (10) data to (08).
2)
Measure the picture period voltages of pins 11 and 13 and the picture
period amplitude of pin 15. (BBR, BBG, BBB)
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78.
2)
Measure the picture period amplitude of pin 11 (vACL1).
3)
Measure the picture period amplitude of pin 11 when −0.5 V DC is applied
to pin 8 from an external power supply. (vACL2)
4)
Measure the picture period amplitude of pin 11 when −1 V DC is applied to
pin 8 from an external power supply. (vACL3)
5)
ACL1 = −20 × Ɛog (vACL2/vACL1)
ACL2 = −20 × Ɛog (vACL3/vACL1)
A
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T15
T16
T17
ABL Point
ABL Gain
RGB Output Mode
A
↑
↑
SW 34
A
↑
↑
SW 35
A
↑
↑
SW 37
A
↑
↑
SW 38
A
↑
↑
SW 39
A
↑
↑
SW 51
B
↑
↑
54
SW 52
B
↑
↑
SW 53
C
↑
↑
1)
Measure the DC voltage of pin 8. (VABL1)
2)
Set the subaddress (16) data to (1C).
3)
Applying external voltage to pin 8, lower the pin voltage from 6.5 V.
Measure the voltage of pin 8 when the voltage of pin 11 starts to change.
(VABL2)
4)
Change the data of subaddress (16) to (3C), (5C), (7C), (9C), (BC), (DC),
and (FC), and repeat step 3) for each of these data. (VABL3, VABL4,
VABL5, VABL6, VABL7, VABL8, VABL9)
5)
ABLP1 = VABL2 − VABL1, ABLP5 = VABL6 − VABL1
ABLP2 = VABL3 − VABL1, ABLP6 = VABL7 − VABL1
ABLP3 = VABL4 − VABL1, ABLP7 = VABL8 − VABL1
ABLP4 = VABL5 − VABL1, ABLP8 = VABL9 − VABL1
1)
Apply 6.5 V from an external power supply to pin 8.
2)
Set the subaddress (16) data to (00). Set the brightness to the maximum.
3)
Measure the voltage of pin 11. (VABL10)
4)
Apply 4.5 V from an external power supply to pin 8.
5)
Change the data of subaddress (16) to (00), (04), (08), (0C), (10), (14),
(18), and (1C), and repeat step 3) for each of these data.(VABL11,
VABL12, VABL13, VABL14, VABL15, VABL16, VABL17, VABL18)
6)
ABLG1 = VABL11 − VABL10, ABLG5 = VABL15 − VABL10
ABLG2 = VABL12 − VABL10, ABLG6 = VABL16 − VABL10
ABLG3 = VABL13 − VABL10, ABLG7 = VABL17 − VABL10
ABLG4 = VABL14 − VABL10, ABLG8 = VABL18 − VABL10
1)
Adjust the brightness so that the picture period voltage of pin 11 is set to
2.5 V.
2)
Set the subaddress (16) data to (01).
3)
Measure the picture period voltages of pins 11, 13, and 15.
(V43R, V42R, V41R)
4)
Change the subaddress (16) data to (02) and repeat step 3).
(V43G, V42G, V41G)
5)
Change the subaddress (16) data to (03) and repeat step 3).
(V43B, V42B, V41B)
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
SW 34
SW 35
SW 37
SW 38
SW 39
SW 51
SW 52
SW 53
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78
2)
and adjust the drive adjustment data so that the picture period amplitudes
of pins 13 and 15 are equal to that of pin 11.
Set SW53 to C.
3)
Measure the voltages of pins 31, 32, and 74. From an external power
supply, apply the measured voltages to these pins.
4)
Set subaddress (15) data to (D2).
5)
From pins 11, 13, and 15, calculate the phase of the ACB insertion pulse
in accordance with Figure 2 below.
Note 5: After the completion of V.BLK, the video period following the falling
edge of the FBP input is regarded as 1H and the periods at each
completion of H.BLK are counted as 2H, 3H, 4H···.
6)
T18
ACB Insertion Pulse Phase
and Amplitude
A
A
A
A
A
A
B
B
A
or
C
Measure the ACB insertion pulse amplitude (the level from the picture
period amplitude at no input) of pins 11, 13, and 15.
ACB insertion pulse amplitude
V.BLK period
Figure 2
2H
3H
4H
RGB Output
Figure 3
55
1H
FBP Input (No.38)
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T19
RGB γ Characteristics
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
B
SW 52
B
SW 53
1)
Input a ramp waveform to pin 78 and adjust the input amplitude so that the
picture period amplitude of pin 11 is 2.3 Vp-p.
2)
Adjust the drive adjustment data so that the picture period amplitudes of
pins 13 and 15 are equal to that of pin 11.
3)
Set the subaddress (14) data to (10).
4)
From pins 13, 15, and 11, calculate the RGB γ start point and its gradient
(decibel conversion) in relation to the off point in accordance with Figure 2.
Output amplitude
100
IRE
∆ (gradient 3)
A
γ2
γ1
∆ (gradient 2)
∆ (gradient 1)
2.5 Vp-p
Input amplitude
T20
Analog RGB Gain
A
or
B
A
or
B
A
or
B
↑
↑
↑
↑
56
↑
↑
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78
2)
and adjust the drive adjustment data so that the picture period amplitudes
of pins 13 and 15 are equal to that of pin 11.
Apply 5 V from an external power supply to pin 27.
3)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 22.
4)
Measure the picture period amplitude of pin 11. (V43R)
5)
As in steps 2) and 3) above, input to pin 24 and measure pin 13, then input
to pin 25 and measure pin 15. (V42G, V41B)
6)
GTXR = V43R/0.2
GTXG = V42G/0.2
GTXB = V41B/0.2
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T21
T22
T23
Analog RGB White Peak Slice
Level
Analog RGB Black Peak
Limiter Level
RGB Contrast Adjustment
Characteristics
A
↑
A
or
B
SW 34
A
↑
A
or
B
SW 35
A
↑
A
or
B
SW 37
A
↑
↑
SW 38
A
↑
↑
SW 39
A
↑
↑
SW 51
B
↑
↑
57
SW 52
B
↑
↑
SW 53
A
↑
1)
Repeat step 1) of T20.
2)
Apply 5 V from an external power supply to pin 27.
3)
Set the RGB contrast data to the maximum (7F).
4)
Connect an external power supply to pin 22, increase the voltage gradually
from 3.0 V, and measure the picture period amplitude voltage when pin 11
is clipped.
5)
As in steps 3) and 4) above, input to pin 24 and measure pin 13, then input
to pin 25 and measure pin 15.
1)
Repeat step 1) of T20.
2)
Apply 5 V from an external power supply to pin 27.
3)
Set the RGB contrast data to the maximum (7F).
4)
Connect an external power supply to pin 22, decrease the voltage
gradually from 4.5 V, and measure the voltage when pin 11 is clipped.
5)
As in steps 3) and 4) above, input to pin 24 and measure pin 13, then input
to pin 25 and measure pin 15.
1)
Repeat step 1) of T20.
2)
Apply 5 V from an external power supply to pin 27.
3)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 22.
4)
Measure the picture period amplitude of pin 11 when the RGB contrast
data change to the maximum (7F), the center (40), and the minimum (00).
(vuTXRMAX, vuTXRCNT, vuTXRMIN)
5)
Calculate the maximum and minimum amplitude ratios using decibel
conversion. (DRG+, DRG−)
6)
As in steps 3), 4) and 5) above, input to pin 24 and measure pin 13, then
input to pin 25 and measure pin 15.
↑
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T24
T25
T26
Analog RGB
Brightness Adjustment
Characteristics
Analog RGB Brightness
Sensitivity
Text ACL Characteristics
A
or
B
↑
A
SW 34
A
or
B
↑
A
SW 35
A
or
B
↑
B
SW 37
A
↑
↑
SW 38
A
↑
↑
SW 39
A
↑
↑
SW 51
B
↑
↑
58
SW 52
B
↑
↑
SW 53
A
1)
Repeat step 1) of T20.
2)
Input signal 2 to pins 22, 24, and 25.
3)
Apply 5 V from an external power supply to pin 27.
4)
Adjust the signal 2 amplitude A so that the picture period amplitude of pin
11 is 0.5 Vp-p.
5)
Measure the picture period voltage of pins 11, 13, and 15 when the RGB
brightness change to the maximum (7F), the center (40), and the minimum
(00).
(VbrTXMAX, VbrTXCNT, VbrTXMIN)
1)
Using the results obtained from T24, calculate the RGB brightness
sensitivity for pins 11, 13, and 15.
↑
2)
GbrTX = (VbrTXMAX − VbrTXMIN)/128
1)
Repeat step 1) of T20.
2)
Apply 5 V from an external power supply to pin 27.
3)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 22.
4)
Measure the picture period amplitude of pin 11. (vTXACL1)
5)
Measure the picture period amplitude of pin 11 when −0.5 V DC is applied
to pin 8 from an external source. (vTXACL2)
6)
Measure the picture period amplitude of pin 11 when −1 V DC is applied to
pin 8 from an external source. (vTXACL3)
7)
TXACL1 = −20 × Ɛog (vTXACL2/vTXACL1)
TXACL2 = −20 × Ɛog (vTXACL3/vTXACL1)
8)
Set the subaddress (10) data to (01) and repeat the calculations in steps
5) and 6). (TXACL3, TXACL4)
↑
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T27
T28
T29
T30
Analog OSD Gain
Analog OSD White Peak Slice
Level
Analog OSD Black Peak
Limiter Level
Analog OSD Output DC
Voltage
A
↑
↑
↑
SW 34
A
↑
↑
↑
SW 35
A
↑
↑
↑
SW 37
A
or
B
A
↑
↑
SW 38
A
or
B
A
↑
↑
SW 39
A
or
B
A
↑
↑
SW 51
B
↑
↑
↑
59
SW 52
B
↑
↑
↑
SW 53
A
1)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 78
2)
and adjust the drive adjustment data so that the picture period amplitudes
of pins 13 and 15 are equal to that of pin 11.
Apply 5 V from an external power supply to pin 21.
3)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 18.
4)
Measure the picture period amplitude of pin 11. (V43R)
5)
As in steps 3) and 4) above, input to pin 19 and measure pin 13, then input
to pin 20 and measure pin 15. (V42G, V41B)
6)
GOSDR = V43R/0.2
GOSDG = V42G/0.2
GOSDB = V41B/0.2
1)
Repeat step 1) of T27.
2)
Apply 5 V from an external power supply to pin 21.
3)
Apply external voltage to pin 18, increase the voltage gradually from 0.0 V,
and measure the picture period amplitude voltage when pin 11 is clipped.
(VOSD1R)
4)
As in step 3) above, input to pin 19 and measure pin 13. Input to pin 20
and measure pin 15.
5)
Set the subaddress (10) data to (04) and repeat the measurements in
steps 3) and 4).
(VOSD2R, VOSD2G, VOSD2B)
1)
Repeat step 1) of T27.
2)
Apply 5 V from an external power supply to pin 21.
3)
Apply external voltage to pin 18, decrease the voltage gradually from 4.5
V, and measure the voltage when pin 11 is clipped.
4)
As in step 3) above, input to pin 19 and measure pin 13. Input to pin 20
and measure pin 15.
1)
Repeat step 1) of T27.
2)
Apply 5 V from an external power supply to pin 21.
3)
Measure the picture period voltages of pins 11, 13, and 15.
(VOSDDCR, VOSDDCG, VOSDDCB)
↑
↑
↑
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
T31
OSD ACL Characteristics
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
B
SW 51
B
60
SW 52
B
SW 53
A
1)
Repeat step 1) of T27.
Set the subaddress (10) data to (02).
2)
Apply 5 V from an external power supply to pin 21.
3)
Input signal 1 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 18.
4)
Measure the picture period amplitude of pin 11. (vOSDACL1)
5)
Measure the picture period amplitude of pin 11 when −0.5 V DC is applied
to pin 8 from an external source. (vOSDACL2)
6)
Measure the picture period amplitude of pin 11 when −1 V DC is applied to
pin 8 from an external source. (vOSDACL3)
7)
OSDACL1 = −20 × Ɛog (vOSDACL2/vOSDACL1)
OSDACL2 = −20 × Ɛog (vOSDACL3/vOSDACL1)
8)
Change the subaddress (10) data to (00) and repeat the measurements in
steps 1) to 7). (OSDACL3, OSDACL4)
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
SW 34
SW 35
SW 37
SW 38
SW 39
SW 51
SW 52
SW 53
Color difference block common test conditions
SW 13: A, SW 15: C, SW18: ON, SW20: ON,
SW 23: ON, SW24: ON, SW 25: ON
Color Difference Block
A1
A2
Color Difference Contrast
Adjustment Characteristics
Color Adjustment
Characteristics
A
↑
A
↑
A
↑
A
↑
A
↑
A
↑
A
or
B
↑
61
A
or
B
↑
C
1)
Change the G and B drive data to the value resulting from the adjustment
in step 1) of T20.
2)
Set the brightness to maximum, set the subaddress (0F) data to (30), and
set the subaddress (10) data to (20).
3)
Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.23 Vp-p) to pin 1.
4)
Measure the picture period amplitude of pin 11 when the unicolor data
change to the maximum (7F), the center (40), and the minimum (00).
(vuCYMAX, vuCYCNT, vuCYMIN)
5)
Calculate the unicolor maximum and minimum amplitude ratios using
decibel conversion. (∆vuCY)
6)
Repeat steps 3), 4), and 5) above, inputting the picture period amplitude
0.2 Vp-p to pin 80 and measuring pin 15.
1)
Measure the voltage of pin 1.
Set the brightness to maximum, set the subaddress (0F) data to (30), and
set the subaddress (10) data to (20).
2)
Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.115 Vp-p) to pin 1.
3)
Measure the picture period amplitude of pin 11 when the color data are
changed to the maximum (7F), the center (40), and the minimum (01).
(vcCYMAX, vcCYCNT, vcCYMIN)
4)
Calculate the color maximum and minimum amplitude ratios for the center
using decibel conversion.
(∆vcCY+, ∆vcCY−)
5)
Repeat steps 2) to 4) above, inputting the picture period amplitude 0.1
Vp-p to pin 80 and measuring pin 15.
↑
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
A3
Color Difference Half Tone
Characteristics
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
A
or
B
62
SW 52
A
or
B
SW 53
C
1)
Set the subaddress (10) data to (20).
2)
Input signal 3 (f0 = 100 kHz, picture period amplitude = 0.2 Vp-p) to pin 1.
3)
Measure the picture period amplitude of the waveform output from pin 11.
(vHTARY)
4)
Apply 1.5 V from an external power supply to pin 6.
5)
Measure the picture period amplitude of the waveform output from pin 11.
(vHTBRY)
6)
GHTRY = vHTBRY/vHTARY
7)
Repeat steps 1) to 5) above with pin 13.
GHTGY = vHTBGY/vHTAGY
8)
Repeat steps 1) to 5) above, inputting signal to pin 80 and measuring pin
15.
GHTBY = vHTBBY/vHTABY
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
A4
Color γ Characteristics
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
B
SW 52
B
SW 53
1)
Set the subaddress (10) data to (20).
2)
Input signal 2 to pin 1.
3)
When the subaddress (07) data are:
(80) − γOFF
(82) − γ1ON
(84) − γ2ON
(86) − γ3ON
measure the changes in the amplitude level of the pin 43 output signal at
an increase the amplitude A of signal 2 and plot the characteristics.
4)
Calculate the γON gradient ∆, using Vγ, which represents the point at
which the γ characteristics become effective, and the gradient of the linear
section with γOFF as (1).
C
γOFF
Vγ
γON
Pin 1 input
1)
A5
Color Limiter Characteristics
↑
↑
↑
↑
↑
↑
↑
63
A
↑
Measure the voltage of pin 1.
2)
Set the subaddress (10) data to (20).
3)
Input signal 2 (picture period amplitude = 0.4 Vp-p) to pin 80.
4)
Measure the picture period amplitude of the pin 11 output signal when the
subaddress (07) data are (80) and (81). (CLT0, CLT1)
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
A6
High-Brightness Color Gain
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
B
SW 52
A
SW 53
1)
Set subaddress (10) data to (20).
2)
Input signal 2 (picture period amplitude = 0.2 Vp-p) to pin 80.
3)
Adjust the color control so that the picture period amplitude output from pin
15 is 1.2 Vp-p.
4)
Measure the picture period amplitude of the pin 15 output signal when the
subaddress (06) data are (FF). (V41)
5)
HBC1 = (1.2 − V41)/1.2
1)
Input IQ demodulated flesh-bar signals (15°-step rainbow signals in the
range −30° to +240°) to pin 80 (Q signal) and pin 1 (I signal) as 0.2 Vp-p.
Set the brightness to maximum.
Set subaddress (10) data to (00).
C
2)
A7
Flesh Color Characteristics
↑
↑
↑
↑
↑
↑
A
↑
3)
Measure the signals output from pins 11 and 15 and switch to subaddress
(10) data to (06). Measure the output signals and calculate the variation
characteristics of the color vector phase.
4)
Draw the vector variation characteristics curve showing the on state from
the off state and calculate the gradient in the vicinity of the I axis as Fa33.
Subaddress (08)
Data (80) off
Data (81) on
↑
Color vector phase [°]
OFF
ON
Fa
Chroma input phase [°]
64
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 33
A8
Color Detail Emphasis
A
SW 34
A
SW 35
A
SW 37
A
SW 38
A
SW 39
A
SW 51
A
SW 52
B
SW 53
A
1)
Connect SG to Y-IN and input a 4 MHz frequency sine wave at 20 mVp-p.
2)
Set the subaddress (02) data to (01).
3)
Set the subaddress (10) data to (20).
4)
Set the subaddress (11) data to (02).
5)
Read the 4 MHz amplitude output to pin 11.
(VCDE0)
6)
Input signal 2 (picture period amplitude = 0.3 Vp-p) to pin 1.
7)
Set the subaddress (02) data to (81).
8)
Read the 4 MHz amplitude output to pin 11.
(VCDE1) (mVp-p)
9)
Set the subaddress (0A) data to (81) and read the amplitude of frequency
Fp output to pin 11.
(VCDE2) (mVp-p)
10) GCD0 = 20 × Ɛog (VCDE1 − VCDE0/20)
GCD1 = 20 × Ɛog (VCDE2 − VCDE0/20)
65
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
DEF Block common test conditions
SW 13: A, SW 33: A, SW 34: A, SW35: A, SW37: A, SW 38: A,
SW 39: A, SW 48: ON, SW49: ON, SW 51: B, SW 52: B,
SW 56: ON, BUS Data = power on reset
DEF Block
D1
Horizontal Oscillation Control
Sensitivity
D
B
ON
OFF
A
ON
Calculate the pin 41 (H.out) frequency variation rate when the voltage on pin 45 is varied by ±0.05 V with
a horizontal oscillation frequency of 15.734 kHz.
TP52
52
M
○
Measure the phase difference SPH1 of the pin 41 (H.out)
waveform in relation to the pin 49 (HD.out) waveform
when a 50 Hz composite video signal is applied to TP52.
Measure the phase difference SPH2 of the pin 45
waveform in relation to the center of the input signal’s
horizontal sync signal Also, apply a 60 Hz composite
video signal to pin 52 and measure SPH3.
TG7
(sync input)
Pin 52
45
38
Pin 45
(AFC1 filter pin)
63.5 µs
Pin 38
(H.BLK input)
4.7 µs
Pin 52 Input Signal a
D2
Horizontal Sync Phase
↑
C
↑
ON
↑
0.25 V
a/2
SPH2, SPH3
↑
Pin 45 Waveform
0.8 µs
Pin 49 Waveform
41%
59%
Pin 41 Signal
SPH1
63.5 µs
66
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
Vary the voltage by 1.5 V to 3.5 V, apply a 50 Hz
composite video signal to pin TP52, and measure the
phase variation of the pin 41 (H.out) waveform.
TP52
52
M
○
TG7
(sync input)
Pin 52
Pin 49 Waveform
40
D3
Range of Curve Correction
D
C
ON
ON
A
Pin 40
(curve correction pin)
ON
Pin 40 = 3.5 V
41
Pin 41
(H.OUT)
Pin 41
Input
Signal
∆H24
Pin 40 = 1.5 V
Under the same conditions as those for D3, measure phase variation of the pin 41 (H.out) waveform
when subaddress (0B) data D7 to D3 are varied by (00000) to (11111).
Pin 49 Waveform
D4
Horizontal Screen Phase
Adjustment Range
↑
↑
↑
↑
↑
↑
When (00000)
Pin 41
Input Signal
∆HSFT
When (11111)
67
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
SW 35
Apply a 50 Hz composite video signal to TP52, then
measure the phase difference CPS and the pulse width
CPW of the pin 22 (R in) waveform in relation to the pin
49 (HD.out) waveform.
TP52
52
M
○
TG7
(sync input)
Pin 52
63.5 µs
49
Pin 49 Pin 52
(HD.OUT) Input Signal
4.7 µs
0.25 V
Clamp Pulse Start Phase
D5
D
C
ON
ON
A
ON
OPEN
Pulse Width of Clamp Pulse
22
Pin 22
(rin)
Pin 49
Waveform
CPS
TP52
M
○
5.0 V
Pin 22
Waveform
5V
52
CPW
TG7
([illegible] input)
Pin 52
3.5 V
Apply a 50 Hz composite video signal to TP52, then
measure the phase difference CPS and the pulse width
CPW of the pin 70 (SCP) waveform in relation to the pin
49 (HD.out) waveform.
63.5 µs
49
Gate Pulse Start Phase
D6
Pulse Width of Gate Pulse
↑
↑
↑
↑
↑
↑
Pin 52
Pin 49
(HD.OUT) Input Signal
4.7 µs
0.25 V

70
Pin 70
(SCP)
Pin 49
Waveform
CPS
CPW
8.3 V
Pin 70 Output
Waveform
4.5 V
0V
68
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
Under the same conditions as those for D6, measure the phase difference HPS and HPW50 of the
horizontal blanking pulse.
Also measure HPW60 at 60 Hz.
Pin 49
Waveform
Horizontal Blanking Pulse
Start Phase
D7
Pulse Width of Horizontal
Blanking Pulse
D
C
ON
ON
A
ON
8.3 V
Pin 70
Output Waveform
4.5 V
0V
HPS
TP52
52
M
○
TG7
([illegible] input)
HPW
Apply a 50 Hz composite video signal to TP52, then
measure the phase difference HPS and the pulse width
HPW /VHD of the pin 49 (HD out) waveform in relation to
the pin 45 (AFC1 filter) waveform.
Pin 52
45
Pin 45
(AFC1 filter)
Pin 52 Input
Waveform
HD Output Start Phase
D8
HD Output Pulse Width
HD Output Amplitude
↑
↑
↑
↑
↑
63.5 µs
↑
49
Pin 49
(HD output)
4.7 µs
Pin 45
Waveform
HPS
Pin 49 Output
Waveform
69
0.25 V
HPW
VHD
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Note
Parameter
Switching Mode
Test Conditions
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
TP52
52
M
○
TG7
(sync input)
Apply a 50 Hz composite video signal to TP52, then
measure the phase difference VP50S1 and the pulse
width VP50S2 of the pin 70 (SCP) waveform in relation to
the pin 49 (sync input) waveform.
Pin 52
Vertical Blanking Pulse Start
Phase (1)
D9
Vertical Blanking Pulse End
Phase (1)
Vertical Blanking Pulse Start
Phase (2)
D10
D11
Vertical Blanking Pulse End
Phase (2)
D
↑
C
↑
ON
↑
ON
↑
A
↑
ON
↑
47
Pin 47
(sync input)
70
Pin 70
(SCP)
Apply the same conditions as those for D9 except change the input signal to a 60 Hz comp. video signal
and measure the phase difference VP60S and pulse width VP60W .
Vertical Pull-In Range (1)
Input a 50 Hz composite video signal to pin TP52, vary the vertical frequency of this signal in 0.5H-steps,
and measure the vertical pull-in range.
Vertical Pull-In Range (2)
Set D5 to D3 of subaddress (17) to (001), vary the vertical frequency of a 60 Hz composite video signal
input to pin TP52 in 0.5H-steps, and measure the vertical pull-in range.
Vertical Pull-In Range (3)
Vertical Pull-In Range (4)
↑
↑
↑
↑
↑
↑
Input a 50 Hz composite video signal to pin TP52, vary the vertical frequency of this signal in 0.5H-steps,
and measure the number of Hs when D2 of the 1st byte changes from 0 to 1 in bus read mode. Also check
that D1 of the 1st byte is 0 when 1 V = 312.5H, when D1 is 1 in bus read mode, and 1 V < 311.5 or 1 V >
313.5H.
Input a 60 Hz composite video signal to pin TP52, vary the vertical frequency of this signal in 0.5H-steps,
and measure the number of Hs when D2 of the 1st byte changes from 1 to 0 in bus read mode when. Also
check that D1 of the 1st byte is 0 when 1 V = 262.5H, D1 is 1 in bus read mode, and 1 V < 261.5 or 1 V >
263.5H.
70
2002-04-01
TA1276AFG
Test Conditions (unless otherwise stated, VCC1 = 5 V, VCC2/VCC3/DEF VCC = 9 V, Ta = 25 ± 3°C)
Switching Mode
Note
Parameter
SW 16
SW 17
SW 18
SW 20
SW 23
SW 25
SW 33
SW 34
SW 35
SW 37
SW 38
SW 39
#6
#21
#27
Test Conditions
TP52
52
M
○
Pin 52
RGB Output
Vertical Blanking Pulse Start
Phase (1)
D12
D
D13
C
ON
ON
A
ON
A
RGB Output
Vertical Blanking Pulse End
Phase (1)
RGB Output
Vertical Blanking Pulse Start
Phase (2)
RGB Output
Vertical Blanking Pulse End
Phase (2)
TG7
(sync input)
↑
↑
↑
↑
↑
↑
↑
71
Ground
↑
11
Apply a 50 Hz composite video signal to TP52,
then measure the phase difference VR50S1 and
the pulse width VR50S2 of the pin 11 (R.out)
waveform in relation to the pin 52 (sync input)
waveform.
Similarly, measure pins 13 and 15.
Pin 11
(R output)
Apply the same conditions as those for D12 except change the input signal to a 60 Hz
comp. video signal and measure the phase difference VP60S1 and pulse width VP60S2.
2002-04-01
TA1276AFG
Chroma Test Signals
1)
Text/Color Difference Test Signals
Input Signal C-1
1)
Video Signal
VO
Frequency f0
sine wave
2)
63.5 µs
Input Signal C-2
2)
Input Signal 1
Frequency f0 sine
wave
Amplitude A
3)
Input Signal C-3
3)
C signal
Input Signal 2
Y signal
1 Vp-p
Amplitude A
Burst signal
Input Signal C-4
4)
Burst signal
4)
180° 150° 120° 90° 60° 30°
Input Signal 3
Frequency f0 sine
wave
0° −30° −60° −90°
72
2002-04-01
TA1276AFG
Vertical Output Pulse Width/Vertical Output Pulse Phase Variation/Vertical Output Pulse Phase Range
0H
1H
2H
3H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
1H
2H
3H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
50 Hz Video Signal
1st Field
2nd Field
60 Hz Video Signal
1st Field
2nd Field
TD
Pin 29 Waveform
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
Pin 29 Waveform
VPUN
TW
VPL1
73
2002-04-01
TA1276AFG
RGB Vertical Blanking Pulse Start Phase/End Phase
2nd field
50 Hz
307H
308H
309H
310H
311H
1st field
312H
1H
2H
3H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
20H
21H
22H
23H
24H
25H
26H
Video Signal
VR 50 , VG50 , VB 50
51
51
51
2.1 V
Pin 11/13/15
Waveform
0.8 V
1st field
307H
308H
309H
310H
311H
312H
2nd field
313H
1H
2H
3H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
20H
21H
22H
23H
24H
25H
26H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
20H
21H
22H
23H
24H
25H
26H
27H
28H
Video Signal
VR 50 , VG50 , VB 50
51
51
51
Pin 11/13/15
Waveform
2nd field
60 Hz
258H
259H
260H
261H
1st field
262H
1H
2H
3H
4H
5H
6H
Video Signal
VR
50
50
50
, VG , VB
51
51
51
Pin 11/13/15
Waveform
1st field
259H
260H
261H
262H
263H
2nd field
1H
2H
3H
4H
5H
6H
7H
8H
9H
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
20H
21H
22H
23H
24H
25H
26H
27H
Video Signal
VR 50 , VG50 , VB 50
51
51
51
Pin 11/13/15
Waveform
74
2002-04-01
TA1276AFG
TP 43
5.1 kΩ 3.9 kΩ
75 Ω
390 Ω
0.01 µF
TP 41
SW 41
Pin 40
A
B 10 µF
NC 39
Pin 38
A
FBP In (BLK in) 38
1
16
Digital GND 37
2
15
NC 36
3
14
B 5.1 kΩ
5 kΩ 5 kΩ
68 NC
Pin 69
100 Ω
70 SCP Out
SDA 35
Pin 70
71 NC
100 Ω
SCL 34
TA1276AFG
Pin 72
72 fsc Out
7.5 kΩ
60 kΩ
10 µF
NC 33
4
5
TC4538P
10 kΩ
51 kΩ 51 kΩ
69 SECAM Conto
1000 pF
67 Y1 Out
Curve odj.
40
(ext CP in)
1200 pF
DEF VCC (9 V)
32fH VCO
66 NC
Pin 67
7.5 kΩ
2N
Pin 43 Pin 42 Pin 41
44
43
42
41
NC
AFC Filter
1 kΩ
Pin 45
46
45
91 Ω
360 Ω
6.2 kΩ 1 µF
0.012 µF
Pin 47
48
47
DEF GND
10 kΩ
SW 45
Sync Out
TP53b
TP 45
SW 47
NC
2.2 µF
V.Sep.
49
HD Out
NC
Pin 50
51
50
NC
NC
Pin 52
53
52
Y1 Sync In
56
SW 52
Chroma In
57
0.1 µF
A BC
0.01 µF
B
Pin 54
55
54
APC Filter
TP 52
Chroma GND
100 µF 0.01 µF
A
SW 54
VCC1 (5 V)
2200 pF
30 kΩ 0.22 µF
12 pF
10 µF
TP 54
Horizontal Output (SW)
SW5
Pin 59 Pin 58
60
59
58
3.58 MHz X’tal
Pin 65
SW6
M PAL X’tal
V/I Out
65 U/Q Out
4.43 MHz X’tal
Pin 62 Pin 61
63
62
61
1H DL Cont
Pin 64
64
12 pF
Pin 63
NC
12 pF
VCC = 5 V
2 kΩ
Test Circuit
13
12
6 NC
11
7
10
8
NC 9
Pin 32
Pin 73
10 µF
2 kΩ
3.9 kΩ
5.1 kΩ
TP78
75 Ω
73 Sence In
2.2 µF
B S/H 32
Pin 31 2.2 µF
74 R S/H
G S/H 31
2.2 µF
Pin 74
75 NC
2.2 µF
NC 30
Pin 29
76 Color Limiter
VP Out 29
Pin 76
77 NC
0.1 µF
20 kΩ
NC 28
A
78 Y2 In
Ys2 (analog RGB) 27
B
0.1 µF C Pin 78
79 NC
75
Analog G In
0.1 µF
0.1 µF
SW 24
B
A
2 kΩ
A
2 kΩ
SW 22
B
Pin 25
2 kΩ
A
24
Pin 23
2 kΩ
SW 18 SW 19 SW 20
BA
BA
B
NC
Analog R In
Pin 21
23
0.1 µF
0.1 µF
Ys1 (analog OSD)
Analog OSD B In
Analog OSD G In
0.1 µF
0.1 µF
22
Pin 22
2 kΩ
TP15b
TP15a
A
21
TP18
TP19
TP20
TP22
TP24
TP24
SW 24
B
2 kΩ
2 kΩ
1.2 kΩ
18
19
20
Pin 18 Pin 19 Pin 20
Analog B In 25
2 kΩ
TP15
Analog OSD R In
VCC2 (9 V)
17
100 µF
15
Pin 15
0.01 µF
16
B Out
NC
14
100 Ω
100 Ω
NC
G Out
NC
100 Ω
TP13
510 Ω
2 kΩ
330 pF
TP73b
13
Pin 13
TP11
2 kΩ
0.01 µF
100 kΩ
TP8
12
1.2 kΩ
TP5
0.01 µF
Pin 6
SW 5
11
Pin 11
510 Ω
10
R Out
TEXT GND 1
9
2 kΩ
2 kΩ
8
Pin 8
100 Ω
C 20 kΩ
1 µF
B
TEXT GND 2
VCC3 (9 V)
7
ABCL In
YM In
6
SW 3
30 pF
100 kΩ
A 1 µF
VCC = 9 V
5
Pin 5
100 µF
B
0.1 µF
0.033 µF
4
Pin 3
10 µF
SW 1
A
3
2
Pin 2
2 kΩ
V/I In
1
Pin 1
VSM Out
80 U/Q In
0.1 µF B
Pin 80
NC
0.033 µF A
APL Det.
Black Peak Hold
Pin 27
NC 26
2002-04-01
TA1276AFG
Application Circuit 1-Normal Scan (3.58 NTSC)
CTl
WAC
FBP In (BLK in) 38
SCL
72 fsc Out
10 kΩ
100 Ω
NC 33
73 Sence In
B S/H 32
74 R S/H
G S/H 31
2.2 kΩ
TA1276AFG
IK In
2.2 µF
2.2 µF
GND
10 µF
C In
GND
2.2 µF
75 NC
2.2 µF
Y In
75 Ω
SCL 34
10 µF
75 Ω
71 NC
100 Ω
10 kΩ
SDA 35
2.2 kΩ
70 SCP Out
10 kΩ
NC 36
SCP
GND
VCC 5 V
SDA
Digital GND 37
69 SECAM Conto
VCC 9 V
FBP
10 kΩ
68 NC
5.1 kΩ
Curve
NC 39
67 Y1 Out
fsc
47 µF
0.01 µF
Curve odj.
40
(ext CP in)
0.1 µF
Reg.
47 µF
0.01 µF
390 Ω
0.01 µF
66 NC
41
Horizontal Output (SW)
42
620 Ω
100 µF
43
DEF VCC (9 V)
390 Ω
44
32fH VCO
45
5.1 kΩ
3.3 kΩ 2.2 µF
10 kΩ
0.022 µF
46
M : mylar capacitor
○
Horizontal Output
NC
47
AFC Filter
48
Sync Out
49
DEF GND
HD Out
NC
2.2 µF
50
Sync Out
HD Out
51
NC
M
○
52
Y1 Sync In
53
V.Sep.
0.1 µF
0.01 µF
54
Chroma GND
55
NC
56
Chroma In
0.01 µF
100 µF
57
VCC1 (5 V)
58
NC
2200 pF
59
APC Filter
NC
60
3.58 MHz X’tal
1H DL Cont
61
M PAL X’tal
62
4.43 MHz X’tal
V/I Out
65 U/Q Out
63
12 pF
converter)
64
M
○
30 kΩ 0.22 µF
(wide aspect
NC 30
76 Color Limiter
VP Out 29
77 NC
VP
NC 28
0.1 µF ○
M
78 Y2 In
VCC3 (9 V)
ABCL In
TEXT GND 2
TEXT GND 1
R Out
NC
G Out
NC
B Out
NC
VCC2 (9 V)
Analog OSD R In
Analog OSD G In
Analog OSD B In
Ys1 (analog OSD)
Analog R In
NC
Analog G In
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
OSD- OSD- OSDR In
G In
B In
Ys1
R In
0.1 µF
Analog B In 25
B In
0.1 µF
B Out
Ys2
NC 26
0.1 µF
G Out
0.01 µF
R Out
100 µF
0.01 µF
1 kΩ
VSM Out
YM
0.01 µF
100 µF
1 µF
0.1 µF
M
○
0.1 µF
YM In
5
0.1 µF
VSM Out
4
0.1 µF
NC
3
0.01 µF
APL Det.
2
100 Ω
Black Peak Hold
1
79 NC
0.1 µF ○
M
80 U/Q In
4.7 µF
V/I In
Ys2 (analog RGB) 27
G In
ABL
76
2002-04-01
TA1276AFG
Application Circuit 2-Normal Scan (4.43 PAL/4.43 NTSC/3.58 NTSC)
V.Sep.
HD Out
NC
3.3 kΩ 2.2 µF
0.01 µF
0.022 µF
10 kΩ
100 µF
43
42
41
66 NC
Reg.
0.01 µF
Curve odj.
40
(ext CP in)
FBP In (BLK in) 38
72 fsc Out
B S/H 32
2.2 µF
B-Y OUT 29
3
0.1 µF
28
4
R-Y IN 27
5
B-Y IN 26
0.01 µF
47 µF
0.1 µF
2.2 µF
74 R S/H
0.1 µF
2.2 µF
76 Color Limiter
VP Out 29
0.1 µF ○
M
78 Y2 In
0.47 µF
13
18
14
17
15
16
0.01 µF
47 µF
1 µF
1 µF
WAC
(wide aspect
converter)
VSM Out
75 Ω
10 kΩ
VP
Ys2
OSD- OSDR In
G In
OSDB In
Analog G In
21
22
23
24
Ys1
R In
0.1 µF
Analog B In 25
B In
0.1 µF
20
NC
19
Analog R In
18
NC 26
0.1 µF
Analog OSD B In
17
Ys1 (analog OSD)
Analog OSD G In
16
0.1 µF
Analog OSD R In
15
B Out
0.1 µF
VCC2 (9 V)
14
0.1 µF
13
G Out
NC
12
B Out
11
R Out
NC
10
G Out
9
NC
8
R Out
TEXT GND 1
7
0.01 µF
CTI
6
YM
100 µF
M
○
1 kΩ
TEXT GND 2
5
ABCL In
4
0.01 µF
3
VCC3 (9 V)
2
0.01 µF
1 µF
YM In
19
0.47 µF
0.01 µF
100 µF
12
1
0.1 µF ○
M
80 U/Q In
100 Ω
20
VSM Out
21
11
NC
10
APL Det.
22
79 NC
0.47 µF
2.2 µF
0.1 µF
10 µF 1 kΩ
9
23
Ys2 (analog RGB) 27
0.1 µF
0.1 µF
8
TA8772AN
0.1 µF
GND
1 kΩ
1 µF
24
C In
1 kΩ
11 kΩ
1 kΩ
7 SCP
10 µF
NC 28
Black Peak Hold
25
GND
NC 30
V/I In
6
Y In
2.2 µF
75 NC
0.1 µF
10 µF
G S/H 31
77 NC
0.1 µF
10 kΩ
NC 33
TA1276AFG
IK In
73 Sence In
2
100 Ω
10 kΩ
SCL 34
2.2 kΩ
71 NC
100 Ω
75 Ω
R-Y OUT 30
SDA 35
2.2 kΩ
fsc
1
SCL
NC 36
70 SCP Out
GND
VCC 5 V
SDA
Digital GND 37
69 SECAM Conto
VCC 9 V
FBP
10 kΩ
68 NC
0.1 µF
Curve
NC 39
67 Y1 Out
47 µF
NC
44
0.01 µF
Y1 Sync In
45
0.1 µF
Chroma GND
46
5.1 kΩ
Chroma In
47
47 µF
48
5.1 kΩ
49
620 Ω 390 Ω
50
Horizontal Output (SW)
51
DEF VCC (9 V)
52
390 Ω
53
32fH VCO
54
NC
55
AFC Filter
56
Sync Out
57
M : mylar capacitor
○
Horizontal Output
DEF GND
2.2 µF
0.1 µF
0.01 µF
58
NC
0.01 µF
100 µF
59
NC
2200 pF
30 kΩ 0.22 µF
HD Out
VCC1 (5 V)
NC
M
○
APC Filter
60
12 pF
61
M
○
Sync Out
3.58 MHz X’tal
62
M PAL X’tal
V/I Out
65 U/Q Out
12 pF
63
3.58 MHz
X’tal
4.43 MHz X’tal
64
1H DL Cont
4.43 MHz
X’tal
G In
ABL
1 kΩ
0.47 µF
77
2002-04-01
TA1276AFG
Application Circuit 3-Normal Scan (4.43 PAL/4.43 NTSC/3.58 NTSC/SECAM)
82 pF
1000 pF
1 SCP
C IN 24
1000 pF 1 kΩ
48
46
45
44
43
42
41
66 NC
15
10 kΩ
DAC
11 R-Y OUT
390 Ω
0.01 µF
620 Ω
Reg.
0.01 µF
Curve odj.
40
(ext CP in)
Cuver
NC 39
67 Y1 Out
14
FBP In (BLK in) 38
47 µF
390 Ω
100 µF
3.3 kΩ 2.2 µF
10 kΩ
0.022 µF
47
0.01 µF
49
VCC 9 V
VCC 5 V
0.1 µF
50
5.1 kΩ
51
47 µF
52
M : mylar capacitor
○
5.1 kΩ
53
Horizontal Output (SW)
54
DEF VCC (9 V)
65 U/Q Out
55
32fH VCO
56
NC
57
AFC Filter
58
Horizontal
Output
Sync Out
59
NC
60
HD Out
V.Sep.
12 pF
61
M
○
M
○
DEF GND
10 B-Y OUT
62
NC
91 pF
63
VCC1 (5 V)
16
64
APC Filter
9
M 0.022 pF
○
3.58 MHz X’tal
17
NC
8
M PAL X’tal
2.2 µF
15 pF
4 MHz
X’tal
(NR18)
12 pF
18
1 kΩ 2.2 µF
510 Ω
4.43 MHz X’tal
7
47 µF
19
V/I Out
6
1H DL Cont
TA1229N
91 pF
0.01 µF
Sync Out
HD Out
3.58 MHz
X’tal
0.1 µF
4.43 MHz
X’tal
0.68 pF ○
M
2.2 µF
Bell
NC
20
Y1 Sync In
5
4.7 MΩ
0.02 µF○
M
0.01 µF
4 SCL
Chroma GND
22
Bell
Moni 21
NC
3 SDA
0.056 µF
Chroma In
100 Ω
27 µH
10 µF
100 µF
100 Ω
24 kΩ
23
0.01 µF
2
2200 pF
10 kΩ
30 kΩ 0.22 µF
92 pF
SDA
FBP
SCL
70 SCP Out
SDA 35
71 NC
SCL 34
TA1276AFG
72 f sc Out
1
R-Y OUT 30
2
B-Y OUT 29
3
28
4
R-Y IN 27
100 Ω
B S/H 32
74 R S/H
G S/H 31
2.2 µF
0.1 µF
0.01 µF
5
B-Y IN 26
47 µF
0.1 µF
6
25
7 SCP
24
2.2 µF
0.1 µF
2.2 µF
0.1 µF
C In
NC 30
76 Color Limiter
VP Out 29
77 NC
0.1 µF ○
M
1 kΩ
10 µF
2.2 µF
75 NC
0.1 µF
Y In
100 Ω
NC 33
73 Sence In
10 µF
75 Ω
NC 36
75 Ω
69 SECAM Conto
0.1 µF
10 kΩ
0.1 µF
10 kΩ
M
○
10 kΩ
13
10 kΩ
12 R-Y IN
2.2 kΩ
0.1 µF
Digital GND 37
2.2 kΩ
M
○
68 NC
VP
NC 28
78 Y2 In
Ys2 (analog RGB) 27
Ys2
17
15
16
47 µF
ABCL In
TEXT GND 2
TEXT GND 1
R Out
NC
G Out
NC
B Out
NC
VCC2 (9 V)
Analog OSD R In
Analog OSD G In
Analog OSD B In
Ys1 (analog OSD)
Analog R In
NC
Analog G In
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1 µF
1 µF
VSM Out
WAC
(wide aspect
converter)
YM
R Out
G Out
B Out
OSD- OSD- OSDR In
G In
B In
NC 26
Ys1
R In
Analog B In 25
0.1 µF
B In
0.1 µF
0.1 µF
0.01 µF
100 Ω
M
○
CTI
0.1 µF
VCC3 (9 V)
7
0.1 µF
YM In
6
0.1 µF
VSM Out
5
0.01 µF
14
4
100 µF
18
3
0.01 µF
13
0.01 µF
2
100 µF
0.47 µF
19
1
0.01 µF
1 µF
1 kΩ
12
NC
20
APL Det.
11
0.47 µF
80 U/Q In
1 µF
21
0.1 µF ○
M
0.47 µF
2.2 µF
22
Black Peak Hold
9
10
79 NC
1 kΩ
0.1 µF
10 µF 1 kΩ
23
V/I In
0.1 µF
8
1 kΩ
0.1 µF
0.1 µF
TA8772AN
11 kΩ
G In
ABL
1 kΩ
0.47 µF
78
2002-04-01
TA1276AFG
NC
Chroma In
Chroma GND
Y1 Sync In
390 Ω
0.01 µF
620 Ω
45
44
43
42
41
66 NC
Reg.
0.01 µF
Curve odj.
40
(ext CP in)
Cuver
NC 39
67 Y1 Out
FBP In (BLK in) 38
47 µF
390 Ω
100 µF
3.3 kΩ 2.2 µF
10 kΩ
0.022 µF
46
0.01 µF
NC
47
0.1 µF
VCC1 (5 V)
48
5.1 kΩ
APC Filter
49
47 µF
3.58 MHz X’tal
50
M : mylar capacitor
○
5.1 kΩ
NC
51
Horizontal Output (SW)
52
DEF VCC (9 V)
53
32fH VCO
54
NC
55
AFC Filter
56
Horizontal
Output
Sync Out
57
M
○
DEF GND
58
NC
59
V.Sep.
60
HD Out
HD Out
61
Sync Out
NC
62
65 U/Q Out
2.2 µF
0.1 µF
0.01 µF
63
M PAL X’tal
100 µF
2200 pF
30 kΩ 0.22 µF
64
4.43 MHz X’tal
M
○
V/I Out
12 pF
12 pF
3.58 MHz
X’tal
1H DL Cont
1 pF
12 pF
N-PAL M-PAL
X’tal
X’tal
0.01 µF
Application Circuit 4-Normal Scan (3.58 NTSC/M-PAL/N-PAL)
VCC 9 V
GND
VCC 5 V
SDA
FBP
NC 36
71 NC
0.1 µF
1
R-Y OUT 30
2
B-Y OUT 29
3
28
4
R-Y IN 27
IK In
SCL 34
TA1276AFG
72 f sc Out
NC 33
73 Sence In
B S/H 32
74 R S/H
G S/H 31
2.2 µF
0.1 µF
0.01 µF
5
B-Y IN 26
6
25
47 µF
0.1 µF
2.2 µF
0.1 µF
2.2 µF
0.1 µF
10 µF
C In
GND
NC 30
76 Color Limiter
VP Out 29
77 NC
0.1 µF ○
M
1 kΩ
GND
2.2 µF
75 NC
0.1 µF
Y In
100 Ω
2.2 kΩ
fsc
10 µF
75 Ω
SDA 35
10 kΩ 10 kΩ
70 SCP Out
100 Ω
2.2 kΩ
69 SECAM Conto
75 Ω
Digital GND 37
10 kΩ 10 kΩ
SCL
68 NC
VP
NC 28
78 Y2 In
Ys2 (analog RGB) 27
Ys2
13
18
14
17
15
16
47 µF
TEXT GND 2
TEXT GND 1
R Out
NC
G Out
NC
B Out
NC
VCC2 (9 V)
Analog OSD R In
Analog OSD G In
Analog OSD B In
Ys1 (analog OSD)
Analog R In
NC
Analog G In
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1 µF
WAC
(wide aspect
converter)
YM
R Out
G Out
B Out
0.01 µF
1 µF
VSM Out
OSD- OSDR In
G In
OSDB In
NC 26
Ys1
R In
Analog B In 25
0.1 µF
B In
0.1 µF
0.1 µF
0.01 µF
M
○
CTI
0.1 µF
ABCL In
7
0.1 µF
VCC3 (9 V)
6
0.1 µF
YM In
5
100 µF
0.47 µF
4
0.01 µF
1 µF
1 kΩ
0.01 µF
3
100 µF
19
2
100 Ω
12
1
0.01 µF
20
VSM Out
11
NC
21
APL Det.
10
0.47 µF
80 U/Q In
2.2 µF
22
79 NC
0.1 µF ○
M
0.47 µF
1 µF
9
Black Peak Hold
23
1 kΩ
0.1 µF
10 µF 1 kΩ
24
0.1 µF
0.1 µF
8
TA8772AN
7 SCP
0.1 µF
1 kΩ
V/I In
11 kΩ
G In
ABL
1 kΩ
0.47 µF
79
2002-04-01
TA1276AFG
43
42
41
32fH VCO
DEF VCC (9 V)
Horizontal Output (SW)
66 NC
NC 39
67 Y1 Out
FBP In (BLK in) 38
SCL 34
TA1276AFG
NC 33
B S/H 32
74 R S/H
G S/H 31
VP Out 29
VSM Out
YM In
VCC3 (9 V)
ABCL In
TEXT GND 2
TEXT GND 1
R Out
NC
G Out
NC
B Out
NC
VCC2 (9 V)
Analog OSD R In
Analog OSD G In
Analog OSD B In
Ys1 (analog OSD)
Analog R In
NC
Analog G In
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
100 µF
0.01 µF
10 µF
C In
GND
VP (1H)
OSD- OSD- OSDR In
G In
B In
Ys2
NC 26
Ys1
R In
Analog B In 25
0.1 µF
B In
0.1 µF
0.1 µF
0.01 µF
0.01 µF
100 Ω
YM
100 µF
VSM Out
0.01 µF
V/I In
(2H)
0.1 µF
NC
3
0.1 µF
APL Det.
2
1 µF
M
○
0.1 µF
Black Peak Hold
1
80 U/Q In
1 kΩ
0.1 µF
2.2 µF
V/I In
Ys2 (analog RGB) 27
0.1 µF
M
○
GND
NC 28
78 Y2 In
79 NC
U/Q In
(2H)
Y In
NC 30
76 Color Limiter
77 NC
0.1 µF
10 µF
2.2 µF
75 NC
M
○
2.2 kΩ
2.2 µF
Y2 In
(2H)
47 µF
10 kΩ
100 Ω
10 kΩ
72 fsc Out
100 Ω
75 Ω
71 NC
73 Sence In
2.2 µF
SDA
75 Ω
SDA 35
10 kΩ
70 SCP Out
IK In
2.2 µF
VCC 5 V
SCL
NC 36
SCP
VCC 9 V
GND
Digital GND 37
69 SECAM Conto
fsc
Ext
H/V BLK
(2H)
10 kΩ
68 NC
Reg.
2.2 kΩ
Y1 Out
(1H)
Curve odj.
40
(ext CP in)
Ext
CP/BPP
(2H)
0.1 µF
44
5.1 kΩ
45
47 µF
46
5.1 kΩ
47
0.01 µF
0.01 µF
48
NC
390 Ω
100 µF
3.3 kΩ 2.2 µF
0.022 µF
49
AFC Filter
Y1 Sync In
50
DEF GND
Chroma In
51
NC
52
Sync Out
53
HD Out
54
V.Sep.
55
M : mylar capacitor
○
NC
56
M
○
10 kΩ
2.2 µF
0.1 µF
0.01 µF
0.01 µF
100 µF
2200 pF
57
Chroma GND
M PAL X’tal
58
NC
4.43 MHz X’tal
59
NC
1H DL Cont
60
VCC1 (5 V)
61
APC Filter
62
NC
63
Sync Out
HD Out
M
○
3.58 MHz X’tal
64
V/I Out
U/Q Out
(1H)
65 U/Q Out
12 pF
V/I Out
(1H)
30 kΩ 0.22 µF
Application Circuit 5-Double Scan (3.58 NTSC)
G In
ABL
R Out
G Out
B Out
80
2002-04-01
TA1276AFG
AKB Application Circuit
+B
CRT
R
G
CRT
CRT
B
B
20 to 51 kΩ
G
51 pF to 330 pF
1 to 2 V
R
3.3 V Z
Sence In 73
81
2002-04-01
TA1276AFG
Package Dimensions
Weight: 1.6 g (typ.)
82
2002-04-01
TA1276AFG
RESTRICTIONS ON PRODUCT USE
000707EBA
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other
rights of the third parties which may result from its use. No license is granted by implication or otherwise under
any intellectual property or other rights of TOSHIBA CORPORATION or others.
• The information contained herein is subject to change without notice.
83
2002-04-01

Open as PDF

Similar pages: TOSHIBA TA1310ANG; TOSHIBA TA1270BFG; SANYO LV766106F; SANYO LV76223A3F; TOSHIBA TA1383AFG; TOSHIBA TA1276AN; TOSHIBA TA1316AN; TOSHIBA TA1360AFG; an1953; TISP4SxxxBJ; an9918