19-2255; Rev 0; 12/01 MAX3873 Evaluation Kit Component List DESCRIPTION Features ♦ SMA Connections for All System I/Os ♦ Test Point for Monitoring Loss-of-Lock (LOL) ♦ Single 3.3V Power-Supply Operation ♦ Fully Assembled and Tested Ordering Information PART TEMP RANGE MAX3873EVKIT -40°C to +85°C IC PACKAGE 20 QFN-EP (4mm x 4mm) Detailed Description DESIGNATION QTY C1–C6, C10–C22 19 0.1µF ±10% ceramic capacitors (0402) C7 1 0.01µF ±10% ceramic capacitor (0402) • 3.3V power supply with 300mA current capability C8 1 33µF ±20% tantalum capacitor • Signal-source, 2.7Gbps minimum capability C9 1 2.2µF ±10% ceramic capacitor (1206) • Jitter analyzer capable of 2.7Gbps performance C23–C26 0 Not installed D1 1 Red LED J1–J6 6 SMA connectors (edge-mount) J9–J12 0 Not installed R1 1 392Ω ±1% resistor (0402) L1–L4 4 56nH inductors JU1–JU5, JU9, JU11 0 Not installed JU6–JU8, JU10 4 3-pin headers (0.1in centers) JU6–JU8, JU10 4 Shunts VCC, GND 2 Test points U1 1 MAX3873EGP (20-pin QFN) 4mm x 4mm None 1 MAX3873 evaluation kit None 1 MAX3873 data sheet The MAX3873 EV kit is fully assembled and factory tested. It enables testing of all MAX3873 functions. Test Equipment Required • Oscilloscope with at least 3GHz performance Connections The serial data inputs (SDI+, SDI-) have on-board ACcoupling capacitors. All the MAX3873 data and clock outputs (SDO+, SDO-, SCLKO+, SCLKO-) are internally terminated to 50Ω and have on-board AC-coupling capacitors. Configured in this way, these outputs can be directly connected to the 50Ω inputs of a highspeed oscilloscope for analysis. Setup 1) Select either 2.488Gbps or 2.67Gbps with JU10 (RATESET). 2) Enable/Disable FASTRACK capture mode with JU6 (FASTRACK). 3) Enable/Disable Clock output with JU8 (SCLKEN). 4) Select amplitude of CML outputs to high/medium/low with JU7 (MODE). 5) Connect a 2.488Gbps/2.67Gbps PRBS NRZ signal to (SDI+, SDI-) inputs with 50Ω cables. 6) Connect the (SDO+, SDO-, SCLKO+, SCLKO-) outputs to a 50Ω high-speed oscilloscope. Terminate unused outputs with 50Ω. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX3873 General Description The MAX3873 evaluation kit (EV kit) simplifies evaluation of the MAX3873, a low-power 2.488Gbps/2.67Gbps clock recovery and data retiming IC. The EV kit enables testing of all the MAX3873 functions. SMA connectors are provided for the differential CML-compatible data and clock outputs. The differential data and clock outputs have on-board AC-coupling capacitors to allow direct connection to a high-speed oscilloscope. The MAX3873 EV kit is configured for 3.3V operation and consumes up to 150mA. Jitter analysis and product performance can also be observed by appropriately interfacing the EV kit with a bit-error-rate tester (BERT) and a jitter analyzer. quency design techniques, including minimizing ground inductances and using controlled-impedance transmission lines on the data and clock signals. Layout Considerations The MAX3873’s performance can be greatly affected by circuit board layout and design. Use good high-fre- Jumpers and Test Points NAME TYPE DESCRIPTION VCC GND JU10 3-pin Sets VCO frequency JU6 3-pin Enables quick phase lock 2.67Gbps 2.488Gbps N/A Enabled Disabled N/A JU7 3-pin Sets amplitude of CML outputs Medium Low High JU8 3-pin Enables clock output Enabled Disabled N/A L1 56nH J7 VCC C8 33µF J8 GND C10 0.1µF L2 56nH C9 2.2µF OPEN VCC_TTL C11 0.1µF L3 56nH C12 0.1µF L4 56nH JU2 OPEN VCC_TTL VCC_BUF C14 0.1µF VCC_ANA JU3 OPEN D1 C15 0.1µF VCC_VCD JU4 OPEN C13 0.1µF R1 392Ω JU11 OPEN C16 0.1µF C7 0.01µF JU1 OPEN VCC_TTL 3 C2 0.1µF 4 5 J9 SMA OPEN J11 SMA OPEN C23 OPEN C25 OPEN VCC_TTL C24 OPEN C26 OPEN J10 SMA OPEN JU9 C21 OPEN 0.1µF LOL GND FIL- FIL+ SDO+ SDO- VCC U1 SDI+ MAX3873 VCC_BUF SCLKO+ SDIVCC 6 CALSTRIP 16 7 VCC_TTL JU5 C17 OPEN 0.1µF 8 9 VCC_TTL SCLKEN J2 SMA 2 C1 0.1µF 17 MODE J1 SMA VCC_ANA 18 VCC_VCO C22 0.1µF RATESET 19 FASTRACK 1 GND 20 JU10 VCC Evaluates: MAX3873 MAX3873 Evaluation Kit 15 C3 0.1µF 14 C4 0.1µF JU6 C19 0.1µF 13 12 SCLKO- 11 C5 0.1µF C6 0.1µF 10 VCC_TTL VCC_TTL JU7 JU8 C20 0.1µF J12 SMA OPEN Figure 1. MAX3873 EV Kit Schematic 2 J4 SMA VCC_BUF VCC_VCO C18 0.1µF J3 SMA _______________________________________________________________________________________ J5 SMA J6 SMA MAX3873 Evaluation Kit Evaluates: MAX3873 1.0" 1.0" Figure 2. MAX3873 EV Kit Component Placement Guide— Component Side Figure 3. MAX3873 EV Kit PC Board Layout—Component Side 1.0" Figure 4. MAX3873 EV Kit PC Board Layout—Ground Plane _______________________________________________________________________________________ 3 Evaluates: MAX3873 MAX3873 Evaluation Kit 1.0" Figure 5. MAX3873 EV Kit PC Board Layout—Power Plane 1.0" Figure 6. MAX3873 EV Kit PC Board Layout—Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 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