LTC3219 250mA Universal Nine Channel LED Driver FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Multimode Charge Pump Provides Up to 91% Efficiency Slew Limited Switching Reduces Conducted and Radiated Noise (EMI) Up to 250mA Total Output Current Nine 28mA Universal Current Sources with 64-Step Linear Brightness Control Independent On/Off, Brightness Level, Blinking and Gradation Control for Each Current Source Using 2-Wire I2CTM Interface Internal Current Reference Configurable ENU Pin for Asynchronous LED On/Off Control Low Noise Charge Pump Operates in 1x, 1.5x or 2x Mode for Optimal Efficiency* Automatic or Forced Mode Switching Internal Soft-Start Limits Inrush Current Short-Circuit/Thermal Protection 3mm × 3mm 20-Lead QFN Plastic Package APPLICATIONS ■ The LTC®3219 is a highly integrated multidisplay LED driver. The device contains a high efficiency, low noise charge pump to provide power to nine universal LED current sources. The LTC3219 requires only five small ceramic capacitors to form a complete LED power supply and current controller. The maximum display currents are set by an internal precision current reference. Independent dimming, On/Off, blinking and gradation control for all current sources is achieved via the I2C serial interface. 6-bit linear DACs are available for adjusting brightness levels for each universal LED current source. The LTC3219 charge pump optimizes efficiency based on the voltage across the LED current sources. The device powers up in 1x mode and will automatically switch to boost mode whenever any enabled LED current source begins to enter dropout. The first dropout switches the IC into 1.5x mode and a subsequent dropout switches the LTC3219 into 2x mode. The part resets to 1x mode whenever a data register is updated via the I2C port. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Protected by U.S. Patents, including 6411531. Video Phones with QVGA+ Displays TYPICAL APPLICATION 4-LED Main, 2-LED Sub and RGB C2 1μF C3 1μF MAIN C1P C1M C2P C2M VBAT I2C C1 2.2μF 2 VBAT CPO ULED1-9 DVCC DVCC RGB C4 2.2μF LTC3219 SCL/SDA SUB 9 3219 TA01a 0.1μF ENABLE DISABLE ENU GND 3219fa 1 LTC3219 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 4) VBAT, DVCC, CPO ........................................... –0.3V to 6V ULED1-ULED9 ............................................. –0.3V to 6V SDA, SCL, ENU ...........................–0.3V to (DVCC + 0.3V) ICPO (Note 2) .......................................................250mA CPO Short-Circuit Duration .............................. Indefinite Operating Temperature Range (Note 3).... –40°C to 85°C Storage Temperature Range................... –65°C to 125°C C2M C1M VBAT C2P C1P TOP VIEW 20 19 18 17 16 15 GND CPO 1 14 ULED9 ULED1 2 13 ULED8 21 ULED2 3 12 ULED7 ULED3 4 11 ULED6 7 8 9 10 DVCC SCL SDA ENU 6 ULED5 ULED4 5 UD PACKAGE 20-LEAD (3mm s 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 68°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3219EUD#PBF LTC3219EUD#TRPBF LCJV 20-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBAT = 3.6V, DVCC = 3V, ENU = Hi, C1/C4 = 2.2μF, C2, C3 = 1μF, unless otherwise noted. PARAMETER CONDITIONS ● VBAT Operating Voltage IVBAT Operating Current MIN 2.9 ICPO = 0, 1x Mode ICPO = 0, 1.5x Mode ICPO = 0, 2x Mode MAX 5.5 0.4 1.7 2.1 1.5 VBAT UVLO Threshold ● DVCC Operating Voltage TYP 1.5 UNITS V mA mA mA V 5.5 V DVCC UVLO Threshold 1 V VBAT Shutdown Current 3.2 μA ● DVCC Shutdown Current 1 μA 31 mA Universal LED Current, 6-Bit Linear DACs, ULED = 1V ● Full-Scale LED Current Minimum LED Current Data Code = 1 LED Current Matching Any Two Outputs Blink Rate Period REG 11, D3 and D4 ULED Up/Down Gradation Ramp Times REG11, D1 and D2 25 28 0.51 mA 2 % 1.25 2.5 0.24 0.48 0.96 s s s s s 3219fa 2 LTC3219 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBAT = 3.6V, DVCC = 3V, ENU = Hi, C1/C4 = 2.2μF, C2, C3 = 1μF, unless otherwise noted. PARAMETER CONDITIONS Gradation Period REG11, D1 and D2 MIN TYP MAX 0.325 UNITS IOUT = 1mA, Single Output Enabled 10 s s s s s s mV 1 Ω 1.5x Mode Output Impedance VBAT = 3V, VCPO = 4.2V (Notes 5, 7) 5.2 Ω 2x Mode Output Impedance VBAT = 3V, VCPO = 4.8V (Notes 5, 7) 6.2 Ω CPO Regulation Voltage 1.5x Mode, ICPO = 20mA 2x Mode, ICPO = 20mA 4.53 5.04 0.85 V V MHz ● 0.45 0.65 ● 0.9 1.30 ● VOL General Purpose Output Mode (GPO) 1.8 Charge Pump (CPO) 1x Mode Output Impedance ● Clock Frequency 0.65 1.05 SDA, SCL, ENU VIL ● VIH ● 0.7V • DVCC 0.3 • DVCC V V IIH SDA, SCL, ENU = DVCC ● –1 1 μA IIL SDA, SCL, ENU = 0V ● –1 1 μA IPULLUP = 3mA ● 0.4 V 400 kHz VOL, Digital Output Low (SDA) 0.12 Serial Port Timing (Notes 6, 7) tSCL Clock Operating Frequency tBUF Bus Free Time Between Stop and Start Condition 1.3 μs tHD,STA Hold Time After (Repeated) Start Condition 0.6 μs tSU,STA Repeated Start Condition Setup Time 0.6 μs tSU,STO Stop Condition Setup Time 0.6 μs tHD,DAT(OUT) Data Hold Time 0 tHD,DAT(IN) Input Data Hold Time 0 ns tSU,DAT Data Setup Time 100 ns tLOW Clock Low Period 1.3 μs tHIGH Clock High Period 0.6 μs tf Clock Data Fall Time 20 300 ns tr Clock Data Rise Time 20 300 ns tSP Spike Suppression Time 50 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Based on long-term current density limitations. Note 3: The LTC3219 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. 900 ns ns Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 5: 1.5x mode output impedance is defined as (1.5VBAT – VCPO)/IOUT. 2x mode output impedance is defined as (2VBAT – VCPO)/IOUT. Note 6: All values are referenced to VIH and VIL levels. Note 7: Guaranteed by design. 3219fa 3 LTC3219 TYPICAL PERFORMANCE CHARACTERISTICS Mode Switch Dropout Times 1.5x Mode CPO Ripple 2x Mode CPO Ripple VBAT = 3.6V ICPO = 100mA CCPO = 2.2μF VBAT = 3.6V VCPO 1V/DIV TA = 25°C unless otherwise noted. VCPO 20mV/DIV AC COUPLED 2x 1.5x VBAT = 3.6V ICPO = 100mA CCPO = 2.2μF VCPO 20mV/DIV AC COUPLED 1x 3219 G02 500ns/DIV 3219 G01 SWITCH RESISTANCE (Ω) 1.15 1x Mode Switch Resistance vs Temperature 6.50 ICPO = 100mA 1.10 OPEN-LOOP OUTPUT RESISTANCE (Ω) 1.20 VBAT = 3.3V 1.05 VBAT = 3.6V 1.00 VBAT = 3.9V 0.95 0.90 0.85 0.80 0.75 0.70 –40 –15 35 10 TEMPERATURE (°C) 60 1.5x Mode Charge Pump Open-Loop Output Resistance vs Temperature (1.5VBAT – VCPO)/ICPO VBAT = 3V 6.25 VCPO = 4.2V C2 = C3 = 1μF 6.00 C4 = 2.2μF 5.75 5.50 5.25 5.00 4.75 4.50 3.8 35 10 TEMPERATURE (°C) 60 85 0 4.5 50 100 150 200 ICPO (mA) TA = –40°C 825 TA = 25°C 800 TA = 85°C 4.2 0 250 200 850 3.5V 3.4V 3.3V 3.2V 3.1V 3.0V 4.6 4.3 3219 G07 VBAT = 3.6V 4.7 5.25 85 100 150 ICPO (mA) 875 4.8 4.4 60 50 3219 G06 FREQUENCY (kHz) CPO VOLTAGE (V) OPEN-LOOP OUTPUT RESISTANCE (Ω) 3.6 Oscillator Frequency vs VBAT Voltage 4.9 5.50 35 10 TEMPERATURE (°C) 3.1V 3.0V –15 5.0 5.75 3.5V 3.4V 3.3V 3.2V 4.0 C4 = 2.2μF 5.1 C2 = C3 = 1μF 6.00 –15 4.2 5.2 6.25 VBAT = 3.6V 4.4 2x Mode CPO Voltage vs ICPO VBAT = 3V 7.25 VCPO = 4.8V C2 = C3 = 1μF 7.00 C4 = 2.2μF 6.75 6.50 C4 = 2.2μF C2 = C3 = 1μF 3219 G05 2x Mode Charge Pump Open-Loop Output Resistance vs Temperature (2VBAT – VCPO)/ICPO 5.00 –40 4.8 4.25 4.00 –40 85 1.5x Mode CPO Voltage vs ICPO 4.6 3219 G04 7.50 3219 G03 500ns/DIV CPO VOLTAGE (V) 200μs/DIV 250 300 3219 G08 775 2.7 3.1 3.5 3.9 4.3 4.7 VBAT VOLTAGE (V) 5.1 5.5 3219 G09 3219fa 4 LTC3219 TYPICAL PERFORMANCE CHARACTERISTICS 7.5 VBAT Shutdown Current vs VBAT Voltage 425 TA = 25°C unless otherwise noted. 1x Mode No Load VBAT Current vs VBAT Voltage 415 TA = –40°C VBAT CURRENT (μA) VBAT SHUTDOWN CURRENT (μA) 420 6.5 5.5 TA = 25°C TA = 85°C 4.5 3.5 410 405 400 395 390 385 2.5 380 1.5 2.9 3.3 4.9 4.1 4.5 3.7 VBAT VOLTAGE (V) 375 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 VBAT VOLTAGE (V) 5.3 3219 G11 3219 G10 10 ULED Pin Current vs ULED Pin Voltage VBAT = 3.6V 35 6 4 6 4 2 2 0 0 VBAT = 3.6V 30 8 VBAT CURRENT (mA) VBAT CURRENT (mA) 8 2x Mode VBAT Current vs ICPO (IVBAT – 2ICPO) ULED PIN CURRENT (mA) 10 1.5x Mode VBAT Current vs ICPO (IVBAT – 1.5ICPO) 25 20 15 10 5 0 50 100 150 200 ICPO (mA) 250 300 0 100 50 150 200 ICPO (mA) 3219 G12 250 0 300 0 0.06 0.18 0.24 0.12 ULED PIN VOLTAGE (V) 0.30 3219 G13 3219 G14 ULED Pin Dropout Voltage vs ULED Pin Current ULED Pin Current vs Input Code 30 20O 20 15 10 5 0 1 0A 1C 25 2E 13 INPUT CODE (HEX) 37 3F 90 EFFICIENCY (PLED/PIN) (%) ULED PIN DROPOUT VOLTAGE (mV) ULED PIN CURRENT (mA) 25 100 VBAT = 3.6V 160 120 80 40 0 0 4 16 12 8 20 ULED PIN CURRENT (mA) 9-LED ULED Display Efficiency vs VBAT Voltage 24 28 80 70 60 50 40 30 9 LEDs AT 15mA/LED 20 (TYP V AT 15mA = 3.2V F 10 NICHIA NSCW100) TA = 25°C 0 3.0 3.5 4.0 4.5 VBAT VOLTAGE (V) 5.0 5.5 3219 G17 3219 G15 3219 G16 3219fa 5 LTC3219 PIN FUNCTIONS CPO (Pin 1): Output of the Charge Pump Used to Power all LEDs. A 2.2μF X5R or X7R ceramic capacitor should be connected to ground. ULED1-ULED9 (Pins 2 to 6, Pins 11 to 14): Current Source Outputs for Driving LEDs. The LED current can be set from 0mA to 28mA in 64 steps via software control and internal 6-bit linear DAC. Each output can be disabled by setting the associated data register REG1-REG9 to 0. ULED1-ULED9 can also be used as I2C controlled open-drain outputs. Connect unused outputs to ground. DVCC (Pin 7): Supply Voltage for All Digital I/O Lines. This pin sets the logic reference level of the LTC3219. DVCC will reset the data registers when set below the undervoltage lockout threshold, which is the recommended method for resetting the part after power-up. A 0.1μF X5R or X7R ceramic capacitor should be connected to ground. SCL (Pin 8): I2C Clock Input. The logic level for SCL is referenced to DVCC. SDA (Pin 9): Input Data for the Serial Port. Serial data is shifted in one bit per clock to control the LTC3219. The logic level is referenced to DVCC. ENU (Pin 10): Input. Used to enable or disable the preselected ULED outputs. When the pin is toggled from low (disable) to high (enable), the LTC3219 illuminates the pre-selected LEDs. When ENU is controlling selected outputs and other outputs have been enabled, the charge pump mode will be reset to 1x on the falling edge of ENU. When ENU is controlling selected outputs and no other outputs are active, the part will go from enabled to shutdown. The ENU logic level is referenced to DVCC. This pin is connected to ground if unused. GND (Pin 15, 21): System Ground. Connect Pin 15 and the Exposed Pad (Pin 21) to the ground plane. C1P, C2P, C1M, C2M (Pins 20, 19, 17, 16): Charge Pump Flying Capacitor Pins. A 1μF X7R or X5R ceramic capacitor should be connected from C1P to C1M and C2P to C2M. VBAT (Pin 18): Supply Voltage for the Entire Device. This pin should be bypassed with a single 2.2μF low ESR ceramic capacitor. 3219fa 6 LTC3219 BLOCK DIAGRAM 20 C1P 17 C1M 19 16 C2P C2M GND 850kHz OSCILLATOR CPO CHARGE PUMP 18 + – U1 U3 + U4 – U5 9 10 1 VBAT U2 7 15 DVCC 1.22V 9 UNIVERSAL CURRENT SOURCES AND DACS U6 U7 U8 ENU CONTROL LOGIC U9 2 3 4 5 6 11 12 13 14 MASTER/SLAVE REG 9 8 SDA SCL SHIFT REGISTER 3219 BD 3219fa 7 LTC3219 OPERATION Power Management Charge Pump Strength The LTC3219 uses a switched capacitor charge pump to boost CPO to as much as 2 times the input voltage up to 5.04V. The part starts up in 1x mode. In this mode VBAT is connected directly to CPO. This mode provides maximum efficiency and minimum noise. The LTC3219 will remain in 1x mode until an LED current source drops out. Dropout occurs when a current source voltage becomes too low for the programmed current to be supplied. When dropout is detected, the LTC3219 will switch into 1.5x mode. The CPO voltage will then start to increase and attempt to reach 1.5x VBAT, up to 4.53V. Any subsequent dropout will cause the part to enter the 2x mode. The CPO voltage will attempt to reach 2x VBAT, up to 5.04V. When the LTC3219 operates in either 1.5x mode or 2x mode, the charge pump can be modeled as a Thevenin-equivalent circuit to determine the amount of current available from the effective input voltage and effective open-loop output resistance, ROL (Figure 1). A 2-phase non-overlapping clock activates the charge pump switches. In the 2x mode, the flying capacitors are charged on alternate clock phases from VBAT to minimize CPO voltage ripple. In 1.5x mode, the flying capacitors are charged in series during the first clock phase and stacked in parallel on VBAT during the second phase. This sequence of charging and discharging the flying capacitors continues at a constant frequency of 850kHz. ROL is dependent on a number of factors including the switching term, 1/(2fOSC • CFLY), internal switch resistances and the non-overlap period of the switching circuit. However, for a given ROL, the amount of current available is directly proportional to the advantage voltage of 1.5VBAT – CPO for 1.5x mode and 2VBAT – CPO for 2x mode. Consider the example of driving LEDs from a 3.1V supply. If the LED forward voltage is 3.8V and the current sources require 100mV, the advantage voltage for 1.5x mode is 3.1V •1.5 – 3.8V – 0.1V or 750mV. Notice that if the input voltage is raised to 3.2V, the advantage voltage jumps to 900mV, a 20% improvement in available strength. The current delivered by each LED current source is controlled by an associated DAC. Each DAC is programmed via the I2C port. Soft-Start Initially, when the part is in shutdown, a weak switch connects VBAT to CPO. This allows VBAT to slowly charge the CPO output capacitor and to prevent large charging currents from occurring. The LTC3219 also employs a soft-start feature on its charge pump to prevent excessive inrush current and supply droop when switching into the step-up modes. The current available to the CPO pin is increased linearly over a typical period of 125μs. Soft-start occurs at the start of both 1.5x and 2x mode changes. ROL + – + 1.5VBAT OR 2VBAT CPO – 3219 F01 Figure 1. Equivalent Open-Loop From Figure 1, for 1.5x mode the available current is given by: IOUT = 1.5VBAT – VCPO ROL (1) For 2x mode, the available current is given by: IOUT = 2VBAT – VCPO ROL (2) Notice that the advantage voltage in this case is 3.1V • 2 – 3.8V – 0.1V = 2.3V. ROL is higher in 2x mode but a significant overall increase in available current is achieved. 3219fa 8 LTC3219 OPERATION Mode Switching Blinking The LTC3219 will automatically switch from 1x mode to 1.5x mode and subsequently to 2x mode whenever a dropout condition is detected at an LED pin. Dropout occurs when an active current source voltage becomes too low for the programmed current to be supplied. The mode change will not occur unless dropout has existed for approximately 400μs. This delay will allow the LEDs to warm up and achieve the final LED forward voltage value. Each universal output (ULED1 to ULED9) can be set to blink on for 0.156s or 0.625s with a period of 1.25s or 2.5s via the I2C port. The blinking rate is selected via REG11 and ULED outputs are selected via REG1 to REG9. Blinking and gradation rates are independent. Blink resets the charge pump to 1x mode after each period. Please refer to Application Note 111 for detailed information and programming examples on blinking. The mode will automatically switch back to 1x whenever a register is updated via the I2C port, when gradation completes ramping down, on the falling edge of ENU, and after each blink period. Gradation The part can be forced to operate in 1x, 1.5x or 2x mode by writing the appropriate bits into REG0. This feature may be used for powering loads from CPO. Automatic mode switching is diabled. Non-programmed current sources do not affect dropout. In addition, ENU controlled current sources do not affect dropout when ENU is low. Universal Current Sources (ULED1 to ULED9) There are nine universal 28mA current sources. Each current source has a 6-bit linear DAC for current control. The output current range is 0 to full-scale in 64 steps. Each current source is disabled when an all zero data word is written. The supply current for that source is reduced to zero. Connect unused outputs to ground. ULED1 to ULED9 can also be used as general purpose outputs (GPO). GPO outputs can be used as I2C controlled open-drain drivers. The GPO mode is selected by programming REG1 to REG9, Bit 6 and Bit 7 to a logic one. In the GPO mode dropout detection is disabled, output swings to ground will not cause mode switching. Universal LED outputs ULED1 to ULED9 can be set to have the current ramp up and down at 0.24s, 0.48s and 0.96s rates via the I2C port. Each of these outputs can have either blinking or gradation enabled. The gradation time is set via REG11 and ULED outputs are selected via REG1 to REG9. The ramp direction is controlled via REG0. Setting the UP bit high causes gradation to ramp up, setting this bit to a low causes gradation to ramp down. When gradation is disabled the LED output current remains at the programmed value. The gradation enable bit must be cleared when the gradation timer is disabled. The charge pump mode is reset to 1x after gradation completes ramping down. Please refer to Application Note 111 for detailed information and examples on programming gradation. External Enable Control (ENU) The ENU pin can be used to enable or disable the LTC3219 without re-accessing the I2C port. This might be useful to indicate an incoming phone call without waking the micro-controller. ENU can be programmed to independently control all pre-selected displays. LED displays are controlled with ENU by setting the appropriate data bits in REG1 to REG9 and control bits in REG10 and REG11. 3219fa 9 LTC3219 OPERATION To use the ENU pin, the I2C port must first be configured to select the desired LED outputs. When ENU is high, the selected displays will be enabled as per the REG10 and REG11 settings. When ENU is Low the selected displays will be off. If no other displays are programmed to be enabled, the chip will be in shutdown. Gradation can also be pre-programmed for control by the ENU pin. The registers are written as required per the gradation description and the UP bit is ignored. The registers are programmed when ENU is low. When ENU is set high, the part will become enabled and the selected LED outputs will ramp up. When ENU is set low the selected LED outputs will ramp low to zero current and then the part will shut down. The charge pump must not be in a forced mode if shutdown is required. If the ENU pin is not used, it is connected to ground. If ENU is used and other ULED outputs are active then ENU will reset the charge pump mode to 1x on the falling edge. Please refer to Application Note 111 for detailed information and examples on programming ENU control. Shutdown Current Shutdown occurs when all the current source data bits have been written to zero, DVCC is set below the undervoltage lockout voltage or when ENU switches low (all other outputs disabled). The charge pump must also be in auto mode. Although the LTC3219 is designed to have very low shutdown current, it will draw about 3.2μA from VBAT when in shutdown. Internal logic ensures that the LTC3219 is in shutdown when DVCC is low. Note, however that all of the logic signals that are referenced to DVCC (SCL, SDA, ENU) will need to be at DVCC or below (i.e., ground) to avoid violation of the absolute maximum specifications on these pins. EMI Reduction The flying capacitor pins C1M, C1P, C2M and C2P have controlled slew rates to reduce conducted and radiated noise. Serial Port The microcontroller compatible I2C serial port provides all of the command and control inputs for the LTC3219. Data on the SDA input is loaded on the rising edge of SCL. D7 is loaded first and D0 last. There are 12 data registers, one address register and one sub-address register. Once all address bits have been clocked into the address register acknowledge occurs. The sub-address register is then written followed by writing the data register. Each data register has a sub-address. After the data register has been written a load pulse is created after the stop bit. The load pulse transfers all of the data held in the data registers to the DAC registers. The stop bit can be delayed until all of the data master registers have been written. At this point the LED current will be changed to the new settings. The serial port uses static logic registers so there is no minimum speed at which it can be operated. 3219fa 10 LTC3219 OPERATION I2C Interface The LTC3219 is a receive-only (slave) device. The LTC3219 communicates with a host (master) using the standard I2C 2-wire interface. The Timing Diagram (Figure 2) shows the timing relationship of the signals on the bus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors or current sources, such as the LTC1694 SMBus accelerator, are required on these lines. Write Word Protocol Used by the LTC3219 1 7 1 1 8 S Slave Address Wr A *Sub-Address A 8 1 1 Data Byte A P** S = Start Condition, Wr = Write Bit = 0, A = Acknowledge, P = Stop Condition *The sub-address uses only the first four bits, D0, D1, D2 and D3 **Stop can be delayed until all of the data registers have been written DATA BYTE SUB-ADDRESS ADDRESS 1 WR 0 0 1 1 0 1 1 0 SDA 0 0 1 1 0 1 1 0 SCL 1 2 3 4 5 6 7 8 S7 S6 S5 S4 S3 S2 S1 S0 7 6 5 4 3 2 1 0 ACK S7 S6 S5 S4 S3 S2 S1 S0 ACK 7 6 5 4 3 2 1 0 ACK 9 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 START STOP 9 3219 FO2 Figure 2. Bit Assignments SDA tSU, STA tSU, DAT tLOW tHD, STA tHD, DAT tBUF tSU, STO 3219 F03 SCL tHIGH tHD, STA START CONDITION tr tSP tf REPEATED START CONDITION STOP CONDITION START CONDITION Figure 3. Timing Parameters 3219fa 11 LTC3219 OPERATION Sub-Address Byte MSB LSB 7 6 5 4 3 2 1 0 Register Function X X X X 0 0 0 0 REG0 COMMAND X X X X 0 0 0 1 REG1 ULED1 X X X X 0 0 1 0 REG2 ULED2 X X X X 0 0 1 1 REG3 ULED3 X X X X 0 1 0 0 REG4 ULED4 X X X X 0 1 0 1 REG5 ULED5 X X X X 0 1 1 0 REG6 ULED6 X X X X 0 1 1 1 REG7 ULED7 X X X X 1 0 0 0 REG8 ULED8 X X X X 1 0 0 1 REG9 ULED9 X X X X 1 0 1 0 REG10 ENU X X X X 1 0 1 1 REG11 B/G/ENU REG0, Command Byte, Sub-Address = 0000 MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 Unused Reserved Reserved Reserved Force2x Force1p5 Quick Write UP UP 0 1 Gradation counts down Gradation counts up Quick Write 0 1 Normal write to each register Quick write, REG1 data is written to all nine universal registers Force1p5 1 0 Forces charge pump into 1.5x mode Enables mode logic to control mode charges based on dropout signal Force2x 1 0 Forces charge pump into 2x mode Enables mode logic to control mode changes based on dropout signal Force1x D2 (Force1p5x) = 1 D3 (Force2x) = 1 Reserved X Reserved X Reserved X Unused X Forces Charge Pump Into 1x Mode Note: X = Don't Care 3219fa 12 LTC3219 OPERATION Data Bytes REG1 to REG9, Universal LED 6-bit linear DAC data with blink/gradation. Sub-Address 0001 TO 1001 per Sub-Address Table Above ULED Mode Enable Bits LED Current Data MSB Normal Blink Enabled Gradation Enabled GPO Mode (Gradation/Blink/Dropout Off) LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 0 1 1 0 1 0 1 D5 D5 D5 D5 D4 D4 D4 D4 D3 D3 D3 D3 D2 D2 D2 D2 D1 D1 D1 D1 D0 D0 D0 D0 REG10, ENU Setting bits D0 to D7 high selects the ULED outputs to be controlled by ENU. Register Sub-Address = 1010 MSB LSB Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ULED8 ULED7 ULED6 ULED5 ULED4 ULED3 ULED2 ULED1 REG11, Gradation and Blink Times Setting bit D0 high selects ULED9 to be controlled by ENU, Bits D1 to D4 control gradation and blink times. The gradation ramp time is the time that the current ramps. The gradation period is the total time that is required to start and end a gradation timer. Sub-Address = 1011 Blink Times and Period Gradation Ramp Times and Period ENU Select D4 D3 On-Time Period D2 D1 Ramp Time Period D0 0 0 1 1 0 1 0 1 0.625s 0.156s 0.625s 0.156s 1.25s 1.25s 2.5s 2.5s 0 0 1 1 0 1 0 1 Disabled 0.24s 0.48s 0.96s Disabled 0.325s 0.65s 1.30s ULED9 3219fa 13 LTC3219 OPERATION Bus Speed The I2C port is designed to be operated at speeds of up to 400kHz. It has built-in timing delays to ensure correct operation when addressed from an I2C compliant master device. It also contains input filters designed to suppress glitches should the bus become corrupted. Start and Stop Conditions A bus-master signals the beginning of a communication to a slave device by transmitting a Start condition. A Start condition is generated by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a Stop condition by transitioning SDA from low to high while SCL is high. The bus is then free for communication with another I2C device. Byte Format Each byte sent to the LTC3219 must be eight bits long followed by an extra clock cycle for the Acknowledge bit to be returned by the LTC3219. The data should be sent to the LTC3219 most significant bit (MSB) first. Acknowledge The Acknowledge signal is used for handshaking between the master and the slave. An Acknowledge (active Low) generated by the slave (LTC3219) lets the master know that the latest byte of information was received. The Acknowledge related clock pulse is generated by the master. The master releases the SDA line (High) during the Acknowledge clock cycle. The slave-receiver must pull down the SDA line during the Acknowledge clock pulse so that it remains a stable Low during the High period of this clock pulse. Slave Address The LTC3219 responds to only one 7-bit address which has been factory programmed to 0011011. The eighth bit of the address byte (R/W) must be 0 for the LTC3219 to recognize the address since it is a write only device. This effectively forces the address to be eight bits long where the least significant bit of the address is 0. If the correct seven bit address is given but the R/W bit is 1, the LTC3219 will not respond. Bus Write Operation The master initiates communication with the LTC3219 with a START condition and a 7-bit address followed by the Write Bit R/W = 0. If the address matches that of the LTC3219, the LTC3219 returns an Acknowledge. The master should then deliver the most significant sub-address byte for the data register to be written. Again the LTC3219 acknowledges and then the data is delivered starting with the most significant bit. This cycle is repeated until all of the required data registers have been written. Any number of data latches can be written. Each data byte is transferred to an internal holding latch upon the return of an Acknowledge. After all data bytes have been transferred to the LTC3219, the master may terminate the communication with a Stop condition. Alternatively, a Repeat-Start condition can be initiated by the master and another chip on the I2C bus can be addressed. This cycle can continue indefinitely and the LTC3219 will remember the last input of valid data that it received. Once all chips on the bus have been addressed and sent valid data, a global Stop condition can be sent and the LTC3219 will update all registers with the data that it had received. In certain circumstances the data on the I2C bus may become corrupted. In these cases the LTC3219 responds appropriately by preserving only the last set of complete data that it has received. For example, assume the LTC3219 has been successfully addressed and is receiving data when a Stop condition mistakenly occurs. The LTC3219 will ignore this stop condition and will not respond until a new Start condition, correct address, sub-address and new set of data and Stop condition are transmitted. Likewise, if the LTC3219 was previously addressed and sent valid data but not updated with a Stop, it will respond 3219fa 14 LTC3219 OPERATION to any Stop that appears on the bus with only one exception, independent of the number of Repeat-Start’s that have occurred. If a Repeat-Start is given and the LTC3219 successfully acknowledges its address and first byte, it will not respond to a Stop until all bytes of the new data have been received and acknowledged. Quick Write Registers REG1 to REG9 can be written in parallel by setting Bit 1 of REG 0 high. When this bit is set high the next write sequence to REG1 will write the data to REG1 through REG9 which is all of the universal LED registers. APPLICATIONS INFORMATION VBAT, CPO Capacitor Selection The style and value of the capacitors used with the LTC3219 determine several important parameters such as regulator control loop stability, output ripple, charge pump strength and minimum start-up time. To reduce noise and ripple, it is recommended that low equivalent series resistance (ESR) ceramic capacitors are used for both CVBAT and CCPO. Tantalum and aluminum capacitors are not recommended due to high ESR. The value of CCPO directly controls the amount of output ripple for a given load current. Increasing the size of CCPO will reduce output ripple at the expense of higher start-up current. The peak-to-peak output ripple of the 1.5x mode is approximately given by the expression: VRIPPLEP-P = IOUT 3fOSC • CCPO (3) where fOSC is the LTC3219 oscillator frequency, typically 850kHz, and CCPO is the output storage capacitor. The output ripple in 2x mode is very small due to the fact that load current is supplied on both cycles of the clock. Both style and value of the output capacitor can significantly affect the stability of the LTC3219. As shown in the Block Diagram, the LTC3219 uses a control loop to adjust the strength of the charge pump to match the required output current. The error signal of the loop is stored directly on the output capacitor. The output capacitor also serves as the dominant pole for the control loop. To prevent ringing or instability, it is important for the output capacitor to maintain at least 1.6μF of capacitance over all conditions and the ESR should be less than 80mΩ. Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCC’s combined with a tight board layout will result in very good stability. As the value of CCPO controls the amount of output ripple, the value of CVBAT controls the amount of ripple present at the input pin, VBAT. The LTC3219 input current will be relatively constant while the charge pump is either in the input charging phase or the output charging phase but will drop to zero during the clock nonoverlap times. Since the nonoverlap time is small (~25ns), these missing “notches” will result in only a small perturbation on the input power supply line. Note that a higher ESR capacitor such as tantalum will have higher input noise due to the higher ESR. Therefore, ceramic capacitors are recommended for low ESR. Input noise can be further reduced by powering the LTC3219 through a very small series inductor as shown in Figure 4. A 10nH inductor will reject the fast current notches, thereby presenting a nearly constant current load to the input power supply. For economy, the 10nH inductor can be fabricated on the PC board with about 1cm (0.4") of PC board trace. 3219fa 15 LTC3219 APPLICATIONS INFORMATION VBAT LTC3219 GND 3219 F04 Figure 4. 10nH Inductor Used for Input Noise Reduction (Approximately 1cm of Board Trace) Flying Capacitor Selection Warning: Polarized capacitors such as tantalum or aluminum should never be used for the flying capacitors since their voltage can reverse upon start-up of the LTC3219. Ceramic capacitors should always be used for the flying capacitors. The flying capacitors control the strength of the charge pump. In order to achieve the rated output current it is necessary to have at least 1μF of capacitance for each of the flying capacitors. Capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a ceramic capacitor made of X7R material will retain most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a very poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore, when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than comparing the specified capacitance value. For example, over rated voltage and temperature conditions, a 1μF, 10V, Y5V ceramic capacitor in a 0603 case may not provide any more capacitance than a 0.22μF, 10V, X7R available in the same case. The capacitor manufacturer’s data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitances at all temperatures and voltages. Table 1 shows a list of ceramic capacitor manufacturers and how to contact them: Table 1. Recommended Capacitor Vendors AVX www.avxcorp.com Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com Vishay www.vishay.com Layout Considerations and Noise The LTC3219 has been designed to minimize EMI. However due to its high switching frequency and the transient currents produced by the LTC3219, careful board layout is necessary. A true ground plane and short connections to all capacitors will improve performance and ensure proper regulation under all conditions. The flying capacitor pins C1P, C2P, C1M and C2M have controlled edge rate waveforms. The large dv/dt on these pins can couple energy capacitively to adjacent PCB runs. Magnetic fields can also be generated if the flying capacitors are not close to the LTC3219 (i.e., the loop area is large). To decouple capacitive energy transfer, a Faraday shield may be used. This is a grounded PCB trace between the sensitive node and the LTC3219 pins. For a high quality AC ground, it should be returned to a solid ground plane that extends all the way to the LTC3219. 3219fa 16 LTC3219 APPLICATIONS INFORMATION Power Efficiency To calculate the power efficiency (η) of an LED driver chip, the LED power should be compared to the input power. The difference between these two numbers represents lost power whether it is in the charge pump or the current sources. Stated mathematically, the power efficiency is given by: η= PLED PIN (4) The efficiency of the LTC3219 depends upon the mode in which it is operating. Recall that the LTC3219 operates as a pass switch, connecting VBAT to CPO, until dropout is detected at the ILED pin. This feature provides the optimum efficiency available for a given input voltage and LED forward voltage. When it is operating as a switch, the efficiency is approximated by: η= PLED VLED • ILED VLED = = PIN VBAT • IBAT VBAT (5) since the input current will be very close to the sum of the LED currents. At moderate to high output power, the quiescent current of the LTC3219 is negligible and the expression above is valid. Once dropout is detected at any LED pin, the LTC3219 enables the charge pump in 1.5x mode. In 1.5x boost mode, the efficiency is similar to that of a linear regulator with an effective input voltage of 1.5 times the actual input voltage. This is because the input current for a 1.5x charge pump is approximately 1.5 times the load current. In an ideal 1.5x charge pump, the power efficiency would be given by: ηIDEAL = PLED VLED • ILED VLED = = PIN VBAT • 1.5 • ILED 1..5 • VBAT Similarly, in 2x boost mode, the efficiency is similar to that of a linear regulator with an effective input voltage of 2 times the actual input voltage. In an ideal 2x charge pump, the power efficiency would be given by: ηIDEAL = PLED V •I V = LED LED = LED PIN VBAT • 2 • ILED 2 • VBAT Thermal Management For higher input voltages and maximum output current, there can be substantial power dissipation in the LTC3219. If the junction temperature increases above approximately 150°C the thermal shutdown circuitry will automatically deactivate the output current sources and charge pump. To reduce maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting the Exposed Pad to a ground plane and maintaining a solid ground plane under the device will reduce the thermal resistance of the package and PC board considerably. 3219fa 17 LTC3219 TYPICAL APPLICATIONS Three RGB LED Groups C3 1μF C2 1μF RGB1 C1P C1M C2P C2M VBAT C1 2.2μF I2C DVCC 2 VBAT CPO C5 0.1μF RGB3 C4 2.2μF LTC3219 9 ULED1-9 SCL/SDA RGB2 3219 TA03 DVCC ENU GND PWM 5-LED Main, 4 General Purpose Open-Drain Outputs C2 1μF C3 1μF MAIN C1P C1M C2P C2M VBAT C1 2.2μF I2C DVCC ENABLE DISABLE 2 C5 0.1μF VBAT CPO C4 2.2μF LTC3219 ULED5-9 SCL/SDA DVCC ULED1 ULED2 ULED3 ENU 5 3219 TA04 2C CONTROLLED I OPEN-DRAIN OUTPUTS ULED4 GND 3219fa 18 LTC3219 PACKAGE DESCRIPTION UD Package 20-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1720 Rev A) 0.70 p0.05 3.50 p 0.05 (4 SIDES) 1.65 p 0.05 2.10 p 0.05 PACKAGE OUTLINE 0.20 p0.05 0.40 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 p 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 0.75 p 0.05 R = 0.05 TYP PIN 1 TOP MARK (NOTE 6) PIN 1 NOTCH R = 0.20 TYP OR 0.25 s 45° CHAMFER 19 20 0.40 p 0.10 1 2 1.65 ± 0.10 (4-SIDES) (UD20) QFN 0306 REV A 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.20 p 0.05 0.40 BSC 3219fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3219 TYPICAL APPLICATION 3-LED Main, 1-LED Sub and 5-LED Camera C2 1μF C3 1μF MAIN C1P C1M C2P C2M VBAT C1 2.2μF I 2C DVCC ENABLE DISABLE 2 C5 0.1μF CPO VBAT ULED1-3 3 3219 TA02 ULED4 DVCC ULED5-9 CAM C4 2.2μF LTC3219 SCL/SDA SUB 5 ENU GND RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3205 250mA, 1MHz, Multi-Display LED Controller VIN: 2.8V to 4.5V, VOUT(MAX) = 5.5V, IQ = 50μA, ISD < 1μA, QFN Package LTC3206 400mA, 800kHz, Multi-Display LED Controller VIN: 2.8V to 4.5V, VOUT(MAX) = 5.5V, IQ = 50μA, ISD < 1μA, QFN Package LTC3207 VBAT: 2.9V to 5.5V, 12 Universal Individually Controlled LED Drivers, One Camera Driver, 4mm × 4mm QFN Package High Current Software Configurable Multi-Display VIN: 2.9V to 4.5V, VOUT(MAX) = 5.5V, IQ = 250μA, ISD < 3μA, 17 Current Sources (MAIN, SUB, RGB, CAM, AUX), 5mm × 5mm QFN Package LED Controller 600mA MAIN/Camera/AUX LED Controller VIN: 2.9V to 4.5V, IQ = 400mA, Up to 94% Efficiency, 4mm × 4mm QFN-20 Package VIN: 2.9V to 4.5V, IQ = 400μA, 3-Bit DAC Brightness Control for MAIN and CAM MAIN/CAM LED Controller in 3mm × 3mm QFN LEDs, 3mm × 3mm QFN Package MAIN/CAM LED Controller with 64-Step 6-Bit DAC Brightness Control for MAIN and 3-Bit Brightness Control for CAM, Brightness Control 3mm × 3mm QFN Package MAIN/CAM LED Controller with 32-Step Drives 4 MAIN LEDs, 3mm × 3mm QFN Package Brightness Control MAIN/CAM LED Controller with 32-Step Drives 3 MAIN LEDs, 3mm × 3mm QFN Package Brightness Control RGB LED Driver and Charge Pump Drives RGB LEDs, 25mA/LED × 3, VIN Range: 2.9V to 4.5V, 2mm × 3mm DFN Package 500mA Camera LED Charge Pump VIN: 2.9V to 4.5V, Single Output, 3mm × 3mm DFN Package 600mA Universal Multi-Output LED/CAM Driver LTC3208 LTC3209-1/ LTC3209-2 LTC3210 LTC3210-1 LTC3210-2 LTC3210-3 LTC3212 LTC3214 LTC3215 LTC3217 700mA Low Noise High Current LED Charge Pump 1A Low Noise High Current LED Charge Pump with Independent Flash/Torch Current Control 600mA Low Noise Multi-LED Camera Light LTC3218 400mA Single-Wire Camera LED Charge Pump LTC3440/LTC3441 600mA/1.2A IOUT, 2MHz/1MHz, Synchronous Buck-Boost DC/DC Converter 600mA/1.2A IOUT, 600kHz, Synchronous Buck-Boost DC/DC Converter 1MHz, 800mA Synchronous Buck-Boost High Power LED Driver LTC3216 LTC3443 LTC3453 VIN: 2.9V to 4.4V, VOUT(MAX) = 5.5V, IQ = 300μA, ISD < 2.5μA, DFN Package VIN: 2.9V to 4.4V, VOUT(MAX) = 5.5V, IQ = 300μA, ISD < 2.5μA, DFN Package VIN: 2.9V to 4.4V, IQ = 400μA, Four 100mA Outputs, QFN Package 91% Efficiency, VIN Range: 2.9V to 4.5V, 2mm × 3mm DFN Package, High Side Current Sense VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 25μA/50μA, ISD <1μA, MS/DFN Packages VIN: 2.4V to 5.5V, VOUT(MAX) = 5.25V, IQ = 28μA, ISD <1μA, DFN Package VIN(MIN): 2.7V to 5.5V, VIN(MAX): 2.7V to 4.5V, IQ = 2.5mA, ISD < 6μA, QFN Package 3219fa 20 Linear Technology Corporation LT 0308 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007