NLX2G00 Dual 2-Input NAND Gate The NLX2G00 is an advanced high-speed dual 2-input CMOS NAND gate in ultra-small footprint. The NLX2G00 input structures provide protection when voltages up to 7.0 volts are applied, regardless of the supply voltage. http://onsemi.com Features • • • • • • • High Speed: tPD 2.4 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C 24 mA Balanced Output Sink and Source Capability Balanced Propagation Delays Overvoltage Tolerant (OVT) Input Pins This is a Pb−Free Device A1 B1 Y2 GND 1 8 2 7 3 6 4 5 MARKING DIAGRAMS 1 ULLGA8 1.45 x 1.0 CASE 613AA QM G 1 ULLGA8 1.6 x 1.0 CASE 613AB AJM G ULLGA8 1.95 x 1.0 CASE 613AC AHM G 1 VCC XX M G Y1 PIN ASSIGNMENT B2 A2 Figure 1. Pinout IEEE/IEC A1 B1 & A2 B2 = Specific Device Code = Date Code = Pb−Free Package Pin Function 1 A1 2 B1 3 Y2 4 GND 5 A2 6 B2 7 Y1 8 VCC FUNCTION TABLE Y1 Y = AB Y2 Inputs Figure 2. Logic Symbol Output A B Y L L H L H H H L H H H L H = HIGH Logic Level L = LOW Logic Level ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2009 December, 2009 − Rev. 0 1 Publication Order Number: NLX2G00/D NLX2G00 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage *0.5 to +7.0 V VIN DC Input Voltage *0.5 to +7.0 V *0.5 to VCC + 0.5 V VIN < GND *50 mA VOUT < GND *50 mA VOUT Parameter DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current $50 mA ICC DC Supply Current per Supply Pin $100 mA IGND DC Ground Current per Ground Pin $100 mA TSTG Storage Temperature Range *65 to )150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds TBD °C TJ Junction Temperature Under Bias TBD °C qJA Thermal Resistance (Note 1) TBD °C/W PD Power Dissipation in Still Air at 85°C TBD mW MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125°C (Note 5) > 2000 > 200 N/A V $500 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Max Unit 1.65 1.5 5.5 5.5 V VCC Power DC Supply Voltage VIN Digital Input Voltage (Note 6) 0 5.5 V Output Voltage 0 VCC V −55 +125 °C 0 0 0 0 20 20 10 5 ns/V VOUT TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate Operating Data Retention Only Min VCC = 1.8 V $0.15 V VCC = 2.5 V $0.2 V VCC = 3.3 V $0.3 V VCC = 5.0 V $0.5 V 6. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. http://onsemi.com 2 NLX2G00 DC ELECTRICAL CHARACTERISTICS Symbol Parameter VIH High−Level Input Voltage VIL VOH Condition 1.65 2.3 to 5.5 Low−Level Input Voltage High−Level Output Voltage Low−Level Output Voltage Min Typ VIN = VIH or VIL, IOH = −100 mA VIN = VIH or VIL, IOL = 100 mA Max Min Max 0.75 x VCC 0.7 x VCC 0.25 x VCC 0.3 x VCC 2.3 to 5.5 TA = −555C to +1255C TA 3 855C 0.75 x VCC 0.7 x VCC 1.65 VIN = VIH or VIL IOH = −4 mA IOH = −8 mA IOH = −12 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA VOL VCC (V) TA = 255C Min 0.75 x VCC 0.7 x VCC 0.25 x VCC 0.3 x VCC VCC − 0.1 VCC VCC − 0.1 VCC − 0.1 1.65 2.3 2.7 3.0 3.0 4.5 1.29 1.9 2.2 2.4 2.3 3.8 1.5 2.1 2.4 2.7 2.5 4.0 1.29 1.9 2.2 2.4 2.3 3.8 1.29 1.9 2.2 2.4 2.3 3.8 Unit V 0.25 x VCC 0.3 x VCC 1.65 to 5.5 1.65 to 5.5 Max V V 0.1 0.1 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.3 0.4 0.4 0.55 0.55 V VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 2.3 2.7 3.0 3.0 4.5 Input Leakage Current 0 ≤ VIN ≤ 5.5 V 0 to 5.5 $0.1 $1.0 $1.0 mA IOFF Power−Off Input Leakage Current VIN = 5.5 V 0 1.0 10 10 mA ICC Quiescent Supply Current 0 ≤ VIN ≤ 5.5 V 5.5 1.0 10 10 mA IIN 0.08 0.20 0.22 0.28 0.38 0.42 AC ELECTRICAL CHARACTERISTICS tR = tF = 2.5 ns TA = 255C VCC Symbol tPLH tPHL Parameter Propagation Delay Input A to Output TA 3 855C TA = −555C to +1255C (V) Test Condition Min Typ Max Min Max Min Max Unit 1.65 to 1.95 RL = 1 MW, CL = 15 pF 2.0 5.7 10.5 2.0 11.0 TBD TBD ns 2.3 to 2.7 RL = 1 MW, CL = 15 pF 1.2 3.2 5.3 1.2 5.7 TBD TBD 3.0 to 3.6 RL = 1 MW, CL = 15 pF 0.8 2.4 3.7 0.8 4.0 TBD TBD RL = 500 W, CL = 50 pF 1.2 3.0 4.6 1.2 4.9 TBD TBD RL = 1 MW, CL = 15 pF 0.5 1.9 2.9 0.5 3.2 TBD TBD RL = 500 W, CL = 50 pF 0.8 2.4 3.6 0.8 3.9 TBD TBD 4.5 to 5.5 CIN Input Capacitance 5.5 VIN = 0 V or VCC 2.5 pF CPD Power Dissipation Capacitance (Note 7) 3.3 5.5 10 MHz, VIN = 0V or VCC 9 11 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NLX2G00 tf = 3 ns tf = 3 ns 90% INPUT A and B 50% VCC VCC 90% 50% 10% 10% OUTPUT INPUT GND CL tPHL tPLH VOH OUTPUT Y 50% A 1−MHz square input wave is recommended for propagation delay tests. 50% VOL Figure 3. Switching Waveform Figure 4. Test Circuit ORDERING INFORMATION Package Shipping† NLX2G00AMX1TCG ULLGA8, 1.95 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLX2G00BMX1TCG ULLGA8, 1.6 x 1.0, 0.4P (Pb−Free) 3000 / Tape & Reel NLX2G00CMX1TCG ULLGA8, 1.45 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NLX2G00 PACKAGE DIMENSIONS ULLGA8 1.45x1.0, 0.35P CASE 613AA−01 ISSUE A ÉÉÉ ÉÉÉ ÉÉÉ PIN ONE REFERENCE 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D E DIM A A1 b D E e L L1 TOP VIEW 0.10 C 0.05 C A 8X 0.05 C SEATING PLANE SIDE VIEW MOUNTING FOOTPRINT SOLDERMASK DEFINED* C A1 MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 7X 0.48 8X 0.22 e/2 e 1 7X L NOTE 4 4 1.18 L1 0.53 8 5 8X b 0.05 C PKG OUTLINE 0.35 PITCH DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 http://onsemi.com 5 NLX2G00 PACKAGE DIMENSIONS ULLGA8 1.6x1.0, 0.4P CASE 613AB−01 ISSUE A PIN ONE REFERENCE 0.10 C 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D ÉÉÉ ÉÉÉ ÉÉÉ E DIM A A1 b D E e L L1 TOP VIEW 0.05 C A 8X 0.05 C SEATING PLANE SIDE VIEW MOUNTING FOOTPRINT SOLDERMASK DEFINED* C A1 MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.15 0.25 1.60 BSC 1.00 BSC 0.40 BSC 0.25 0.35 0.30 0.40 7X 0.49 e/2 e 1 4 8 5 7X L NOTE 4 1.24 L1 0.53 8X b 0.05 C 1 PKG OUTLINE 0.40 PITCH DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 8X 0.26 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 http://onsemi.com 6 NLX2G00 PACKAGE DIMENSIONS ULLGA8 1.95x1.0, 0.5P CASE 613AC−01 ISSUE A PIN ONE REFERENCE 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ E DIM A A1 b D E e L L1 TOP VIEW 0.10 C 0.05 C MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.15 0.25 1.95 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40 A 8X 0.05 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* SEATING PLANE SIDE VIEW 7X C A1 0.49 8X 0.30 e/2 e 7X L NOTE 4 4 1 1.24 L1 0.53 8 5 8X BOTTOM VIEW b 0.10 C A B 0.05 C 1 PKG OUTLINE 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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