TI 74AC11643

SCAS057A − JULY 1987 − REVISED APRIL 1993
•
DW OR NT PACKAGE
(TOP VIEW)
Bidirectional Bus Transceivers in
High-Density 24-Pin Packages
Flow-Through Architecture Optimizes PCB
Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
•
•
•
•
•
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
DIR
B1
B2
B3
B4
VCC
VCC
B5
B6
B7
B8
OE
description
These octal bus transceivers are designed for asynchronous communication between data buses. These
devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the
buses are effectively isolated.
The 74AC11643 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
INPUTS
OE
OPERATION
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic symbol†
OE
DIR
13
24
logic diagram (positive logic)
OE
G3
3 EN1 [BA]
3 EN2 [AB]
A1
A2
A3
A4
A5
A6
A7
A8
23
1
1
2
13
1
1
2
22
3
21
4
20
9
17
10
16
11
15
12
14
DIR
24
B1
B2
A1
B3
1
23
B1
B4
B5
B6
B7
B8
To 7 Other Channels
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1993, Texas Instruments Incorporated
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• DALLAS, TEXAS 75265
• HOUSTON, TEXAS 77251−1443
POST OFFICE BOX 655303
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1
SCAS057A − JULY 1987 − REVISED APRIL 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
High-level input voltage
VCC = 5.5 V
VCC = 3 V
VIL
VI
VO
IOH
IOL
Input voltage
2
5
5.5
3.15
•
•
V
0.9
1.35
V
1.65
VCC
VCC
V
V
−4
−24
VCC = 5.5 V
VCC = 3 V
−24
VCC = 4.5 V
VCC = 5.5 V
24
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V
3.85
0
Low-level output current
Operating free-air temperature
3
UNIT
2.1
VCC = 3 V
VCC = 4.5 V
High-level output current
TA
MAX
0
Output voltage
Input transition rise or fall rate
NOM
VCC = 4.5 V
VCC = 5.5 V
Low-level input voltage
∆t/∆v
MIN
mA
12
mA
24
0
10
ns/V
−40
85
°C
SCAS057A − JULY 1987 − REVISED APRIL 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = − 50 µA
IOH = − 4 mA
VOH
ICC
Ci
TA = 25°C
TYP
MAX
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
5.5 V
5.4
5.4
3V
2.58
2.48
3.94
3.8
IOH = − 24 mA
5.5 V
4.94
4.8
IOH = − 75 mA†
5.5 V
IOL = 12 mA
IOL = 24 mA
II
IOZ‡
MIN
4.5 V
IOL = 50 µA
VOL
VCC
MAX
UNIT
V
3.85
3V
0.1
0.1
4.5 V
0.1
0.1
5.5 V
0.1
0.1
3V
0.36
0.44
4.5 V
0.36
0.44
5.5 V
0.36
0.44
V
IOL = 75 mA†
VI = VCC or GND
5.5 V
5.5 V
± 0.1
±1
µA
A or B ports
VO = VCC or GND
VI = VCC or GND,
5.5 V
± 0.5
±5
µA
8
80
µA
OE or DIR
VI = VCC or GND
VO = VCC or GND
OE or DIR
IO = 0
1.65
5.5 V
5V
4
pF
Cio
A or B ports
5V
12
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
pF
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OE
A or B
tPHZ
tPLZ
OE
A or B
•
TA = 25°C
MIN
TYP
MAX
MAX
1.5
7.4
10.1
1.5
11.3
1.5
6.6
8.7
1.5
10
1.5
9.4
11.8
1.5
13.3
1.5
8.9
11.4
1.5
13
1.5
8.3
10.1
1.5
10.9
1.5
8.9
10.9
1.5
12
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•
MIN
UNIT
ns
ns
ns
3
SCAS057A − JULY 1987 − REVISED APRIL 1993
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OE
A or B
tPHZ
tPLZ
OE
A or B
MIN
TA = 25°C
TYP
MAX
MIN
MAX
1.5
5.4
7.7
1.5
8.6
1.5
5
6.8
1.5
7.9
1.5
7
9.2
1.5
10.4
1.5
6.6
8.7
1.5
10
1.5
7.1
8.8
1.5
9.4
1.5
7.2
9
1.5
9.8
UNIT
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
Outputs enabled
Cpd
Power dissipation capacitance per transceiver
Outputs disabled
UNIT
46
CL = 50 pF,
f = 1 MHz
9
pF
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
500 Ω
From Output
Under Test
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
GND
CL = 50 pF
(see Note A)
500 Ω
VCC
Output
Control
(low-level
enabling)
LOAD CIRCUIT FOR OUTPUTS
50%
VCC
50%
0V
tPLH
Output
(see Note D)
tPHL
Output
Waveform 2
S1 at GND
(see Note C)
VOH
50% VCC
VOL
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPLZ
≈ VCC
Output
Waveform 1
S1 at 2 × VCC
(see Note C)
50%
50%
0V
tPZL
Input
(see Note B)
S1
Open
2 × VCC
GND
50% VCC
tPZH
20% VCC
VOL
tPHZ
VOH
50% VCC
80% VCC
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
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