MC10H606, MC100H606 Registered Hex TTL to PECL Translator Description The MC10/100H606 is a 6−bit, registered, single supply TTL to PECL translator. The device features differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input. With its differential PECL outputs and TTL inputs the H606 device is ideally suited for the transmit function of a HPPI bus type board−to−board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. The device is available in either ECL standard: the MECL 10H™ device is compatible with MECL 10KH logic levels, with a VCC of +5.0 V while the 100H device is compatible with 100K logic levels, with a VCC of +5.0 V. http://onsemi.com PLCC−28 FN SUFFIX CASE 776 Features • • • • • Differential 50 W ECL Outputs Choice Between Differential PECL or TTL Clock Input Single Power Supply Multiple Power and Ground Pins to Minimize Noise Pb−Free Packages are Available* MARKING DIAGRAM* 1 MCxxxH606G AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 6 1 Publication Order Number: MC10H606/D MC10H606, MC100H606 Table 1. TRUTH TABLE 1 OF 6 BITS Dn D Qn Qn Q Dn MR TCLK/CLK Qn+1 L H X L L H Z Z X L H L Z = LOW to HIGH Transition CLK R CLK CLK TCLK * MR VBB * 1. When using PECL inputs, TCLK must be tied to ground (0 V). 2. When using only one PECL input, the unused PECL input must be tied to VBB, and TCLK must be tied to ground (0 V). 3. When using TCLK, both PECL inputs must be tied to ground (0 V). Figure 1. Logic Diagram D1 D2 VCCT D3 25 24 23 22 D4 D5 VCCE 21 20 19 D0 26 18 Q5 TCLK 27 17 Q5 VBB 28 16 Q4 15 Q4 CLK CLK 2 14 VCCE MR 3 13 Q3 VCCE 4 12 Q3 5 6 7 8 9 10 Q0 Q0 GND Q1 Q1 Q2 Table 2. PIN NAMES PIN D0 − D5 CLK, CLK TCLK MR Q0 − Q5 Q0 − Q5 VCCE VCCT GND 11 Q2 Figure 2. Pinout: PLCC−28 (Top View) http://onsemi.com 2 FUNCTION TTL Data Inputs Differential PECL Clock Input TTL Clock Input PECL Master Reset Input True PECL Outputs Inverted PECL Outputs PECL VCC (+5.0 V) TTL VCC (+5.0 V) TTL/PECL Ground MC10H606, MC100H606 Table 3. 10H PECL DC CHARACTERISTICS (VCCT = VCCE = 5.0 V ± 5%) TA = 0°C Symbol Characteristic Min Condition TA = 25°C Max Min TA = 85°C Max Min Max Unit IINH Input HIGH Current 255 175 175 mA IINL Input LOW Current 0.5 0.5 0.5 mA VIH Input HIGH Voltage (Note 4) VCCT = 5.0 V 3830 4160 3870 4190 3930 4280 mV VIL Input LOW Voltage (Note 4) VCCT = 5.0 V 3050 3520 3050 3520 3050 3555 mV VOH Output HIGH Voltage (Note 4) VCCT = 5.0 V 3980 4160 4020 4190 4080 4270 mV VOL Output LOW Voltage (Note 4) VCCT = 5.0 V 3050 3370 3050 3370 3050 3400 mV VBB Reference Voltage (Note 4) VCCT = 5.0 V 3600 3710 3630 3730 3670 3790 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. PECL VIL, VIH, VOL, VOH VBB are given for VCCT = VCCE = 5.0 V and will vary 1:1 with the power supply. Table 4. 100H PECL DC CHARACTERISTICS (VCCT = VCCE = 5.0 V ± 5%) TA = 0°C Max Unit Input HIGH Current 255 175 175 mA IINL Input LOW Current 0.5 0.5 0.5 mA VIH Input HIGH Voltage (Note 5) VCCT = 5.0 V 3835 4120 3835 4120 3835 4120 mV VIL Input LOW Voltage (Note 5) VCCT = 5.0 V 3190 3525 3190 3525 3190 3525 mV VOH Output HIGH Voltage (Note 5) VCCT = 5.0 V 3975 4120 3975 4120 3975 4120 mV VOL Output LOW Voltage (Note 5) VCCT = 5.0 V 3190 3380 3190 3380 3190 3380 mV VBB Output Bias Voltage (Note 5) VCCT = 5.0 V 3600 3720 3600 3720 3600 3720 mV Characteristic Condition Max Min TA = 85°C IINH Symbol Min TA = 25°C Max Min NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. PECL VIL, VIH, VOL, VOH VBB are given for VCCT = VCCE = 5.0 V and will vary 1:1 with the power supply. Table 5. DC CHARACTERISTICS (VCCT = VCCE = 5.0 V ± 5%) TA = 0°C Symbol Characteristic Min Condition TA = + 25°C Typ Max Min Typ Max TA = + 85°C Min Typ Max Unit ICCL Supply Current Outputs LOW 18 30 18 30 18 30 mA ICCH Supply Current Outputs HIGH 13 25 13 25 13 25 mA IGND Supply Current 75 90 75 90 75 95 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. http://onsemi.com 3 MC10H606, MC100H606 Table 6. TTL DC CHARACTERISTICS (VCCT = VCCE = 5.0 V ± 5%) TA = 0°C Symbol Characteristic VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Voltage IIH IIL Min Condition TA = 25°C Max 2.0 Min TA = 85°C Max 2.0 Min Max 2.0 Unit V 0.8 0.8 0.8 V IIN = −18 mA −1.2 −1.2 −1.2 V Input HIGH Current VIN = 2.7 V VIN = 7.0 V 20 100 20 100 20 100 V Input LOW Current VIN = 0.5 V −0.6 −0.6 −0.6 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 7. AC CHARACTERISTICS (VCCT = VCCE = 5.0 V ± 5%) TA = 0°C Symbol Characteristic Condition Min Typ TA = + 25°C TA = + 85°C Max Min Typ Max Min Typ Max Unit tPD Propagation Delay TCLK++ 50 W to VCC−2.0 V 1.75 3.75 1.75 3.00 3.75 1.75 3.75 ns tPD Propagation Delay TCLK+− 50 W to VCC−2.0 V 1.75 3.75 1.75 3.00 3.75 1.75 3.75 ns tPD Propagation Delay CLK++ 50 W to VCC−2.0 V 1.50 3.50 1.50 2.50 3.50 1.50 3.50 ns tPD Propagation Delay CLK+− 50 W to VCC−2.0 V 1.50 3.50 1.50 2.50 3.50 1.50 3.50 ns tPD Propagation Delay MR+− 50 W to VCC−2.0 V 1.50 3.50 1.50 2.50 3.50 1.75 3.75 ns tSKEW Device Skew 50 W to VCC−2.0 V 1.0 0.3 2.0 0.5 2.0 0.5 ns tS Setup Time 50 W to VCC−2.0 V 1.5 0.5 1.5 0.5 1.5 0.5 ns tH Hold Time 50 W to VCC−2.0 V 1.5 0.5 1.5 0.5 1.5 0.5 ns tPW Minimum Pulse Width CLK 50 W to VCC−2.0 V 1.5 1.5 1.0 1.5 ns tPW Minimum Pulse Width MR 50 W to VCC−2.0 V 1.5 1.5 1.5 ns tr Rise Time 50 W to VCC−2.0 V 2.0 1.0 2.0 2.0 ns tf Fall Time 50 W to VCC−2.0 V 2.0 1.0 2.0 2.0 ns tRES/REC Reset/Recovery Time 50 W to VCC−2.0 V Part−to−Part Within Device 2.0 0.5 2.5 2.0 2.5 2.0 2.5 2.0 ns NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. http://onsemi.com 4 MC10H606, MC100H606 ORDERING INFORMATION Package Shipping † MC10H606FN PLCC−28 37 Units / Rail MC10H606FNG PLCC−28 (Pb−Free) 37 Units / Rail MC10H606FNR2 PLCC−28 500 / Tape & Reel MC10H606FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel MC100H606FN PLCC−28 37 Units / Rail MC100H606FNG PLCC−28 (Pb−Free) 37 Units / Rail Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 5 MC10H606, MC100H606 PACKAGE DIMENSIONS PLCC−28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776−02 ISSUE E −N− 0.007 (0.180) B Y BRK T L−M M 0.007 (0.180) U M N S T L−M S S N S D Z −M− −L− W 28 D X V 1 A 0.007 (0.180) R 0.007 (0.180) C M M T L−M T L−M S S N S N S 0.007 (0.180) H N S S G J 0.004 (0.100) −T− SEATING T L−M S N T L−M S N S K PLANE F VIEW S G1 M K1 E S T L−M S VIEW D−D Z 0.010 (0.250) 0.010 (0.250) G1 VIEW S S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10_ 0.410 0.430 0.040 −−− http://onsemi.com 6 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10_ 10.42 10.92 1.02 −−− 0.007 (0.180) M T L−M S N S MC10H606, MC100H606 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). MECL 10 H is a trademark of Motorola, Inc. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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