PAM3102 Description Features Pin Assignments Applications

A Product Line of
Diodes Incorporated
PAM3102
DUAL 150mA HIGH PSRR LOW-DROPOUT CMOS REGULATOR
Description
Pin Assignments
The dual LDO PAM3102 series of positive voltage linear regulators
Top View
TSOT26
feature high output voltage accuracy, low quiescent current and low
dropout voltage, making them ideal for battery powered applications.
The line transient response and load transient response are excellent.
Their high PSRR make them useful in applications where AC noise
on the input power supply must be suppressed. Space-saving
TSOT26 package for 2-ch LDOs is attractive for portable and
handheld applications. They have both thermal shutdown and a
current limit feature to prevent device failure under extreme operating
conditions. They are stable with an output capacitance of 2.2μF or
greater.
Features

Output Accuracy: ±2%

Low Dropout Voltage: 180mV@150mA

High PSRR: 70dB@100Hz
Applications

Low Noise Output

Cellular Phone

Current Limiting

Portable Electronics, PDA

Short Circuit Protection

Wireless Devices, Wireless LAN

Thermal Shutdown

Computer Peripherals

Space Saving Package TSOT26

Camera Module

Pb-Free Package

GPS Receiver
Typical Applications Circuit
PAM3102
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PAM3102
Pin Descriptions
Pin
Number
1
2
3
4
5
6
Pin
Name
CE1
VIN
CE2
VOUT2
GND
VOUT1
Function
Output 1 Enable
Input
Output 2 Enable
Output 2
Ground
Output 1
Functional Block Diagram
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability. All voltages are with respect to ground.
Parameter
Input Voltage
Output Current
Output Pin Voltage
Storage Temperature
ESD Rating (HBM)
Lead Soldering Temperature
PAM3102
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Rating
6.0
150/150
Unit
V
mA
GND -0.3 to VIN +0.3V
-40 to +125
2
300, (5sec)
°C
kV
°C
V
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PAM3102
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Parameter
Rating
Unit
5.5
V
0 to VIN
V
Supply Voltage Range
Enable Input Resistance
Junction Temperature
-40 to +125
Operation Temperature
-40 to +85
°C
Thermal Information
Parameter
Symbol
Package
Max
Thermal Resistance Junction to Case)
θJC
TSOT26
130
Thermal Resistance (Junction to Ambient)
θJA
TSOT26
250
Internal Power Dissipation
PD
TSOT26
400
Unit
°C/W
mW
Electrical Characteristics (@TA = +25°C, VCE1 = VCE2 = VIN = VO +1V, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.)
Parameter
Symbol
Input Voltage
VIN
Output Voltage
VO
Dropout Voltage
VDROP
Output Current
Test Conditions
Min
IO = 1mA
Typ
Units
5.5
V
-2.0
+2.0
%
VO = 1.8V, IO = 150mA
950
VO = 2.5V, IO = 150mA
350
VO = 2.8V, IO = 150mA
180
150
IO
Max
Note 1
mV
Note 2
mA
ILIM
VO ≥ 1.2V
200
Quiescent Current
IQ
IO = 0mA
175
250
Ground Pin Current
IGND
IO = 1mA to 150mA
200
250
µA
1
µA
Current Limit
Shutdown Current
ISD
VCE1 = VCE2 = 0V
0.1
Short Circuit Current
ISC
VO = 0V
150
Line Regulation
Load Regulation
Power Supply Ripple Rejection
LNR
LDR
PSRR
Output Noise
VN
CE Input High Threshold
VTH
CE Input Low Threshold
VTL
CE Pull-Up Resistance
RCE
TC
Temperature Coefficient
IO = 50mA, VIN = 3V to 4V
VO = 1.8V
IO = 50mA, VIN = 3.5V to 4.5V
VO = 2.5V
IO = 50mA, VIN = 3.8V to 4.8V
VO = 2.8V
VIN = 3.3V, IO = 1mA to 150mA
IO = 50mA, VO = 1.8V
mA
mA
-0.15
0.1
0.15
-2
1.0
2
f = 100Hz
f = 1kHz
f = 10kHz
f = 10Hz to 100kHz
%/V
%
70
63
45
dB
dB
dB
35
µVRMS
1.5
V
0.3
1.7
µA
5
15
V
MΩ
40
ppm/°C
Over Temperature Shutdown
OTS
IO = 1mA
155
°C
Over Temperature Hysteresis
OTH
IO = 1mA
40
°C
Notes:
1. The minimym inout voltage (VIN(MIN) of the PAM3102 is determined by output voltage and dropout voltage. The minimum input voltage is defined as:
VIN(MIN) = VO +VDROP
2. Output current is limited by PD, maximum IO = PD/(VIN(MAX) – VO).
PAM3102
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PAM3102
Typical Performance Characteristics (@TA = +25°C, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.)
PAM3102
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PAM3102
Typical Performance Characteristics (cont.)
PAM3102
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PAM3102
Typical Performance Characteristics (cont.)
PAM3102
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PAM3102
Typical Performance Characteristics (cont.)
PAM3102
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Typical Performance Characteristics (cont.)
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Application Information
Capacitor Selection and Regulator Stability
Similar to any low dropout regulator, the external capacitors used with the PAM3102 must be carefully selected for regulator stability and
performance.
A capacitor CIN of more than 1μF can be employed in the input pin, while there is no upper limit for the capacitance of CIN. Please note that the
distance between CIN and the input pin of the PAM3102 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3102.
Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response.
The PAM3102 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using
an output ceramic capacitor whose value is >2.2µF with ESR>5mΩ ensures stablilty.
Shutdown Input Operation
The PAM3102 is shutdown by pulling the CE input low, and turned on by tying the CE input to VIN or leaving the CE input floating.
Input-Output (Dropout) Voltage
A regulator's minimum input-output voltage differential (or dropout voltage) determines the lowest usable supply voltage. The PAM3102 has a
typical 180mV dropout voltage. In batterypowered systems, this will determine the useful end-of-life battery voltage.
Current Limit and Short Circuit Protection
The PAM3102 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to
300mA by regulating the gate voltage. The PAM3102 also has a built-in short circuit current limit.
Thermal Considerations
Thermal protection limits power dissipation in the PAM3102. When the junction temperature exceeds 150°C, the OTP (Over Temperature
Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature
drops below 120°C.
For continuous operation, the junction temperature should be maintained below 125°C. The power dissipation is defined as:
PD  VIN  V O  * IO  VIN * IGND
The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature
difference between junction and ambient. The maximum power dissipation can be calculated by the following formula:


PD(MAX)  TJ(MAX)  T A / JA
Where TJ(MAX) is the maximum allowable junction temperature +125°C , TA is the ambient temperature and θJA is the thermal resistance from the
junction to the ambient.
For example, as is 250°C/W for the SOT-23 package based on the standard JEDEC 51-3 for a single-layer thermal test board, the maximum
power dissipation at TA =25°C can be calculated by following formula:
PD(MAX)  125C  25C / 250  0.4 W SOT-23
It is also useful to calculate the junction temperature of the PAM3102 under a set of specific conditions. Suppose the input voltage VIN = 3.3V,
the output current IO = 300mA and the case temperature TA = +40°C measured by a thermal couple during operation, the power dissipation is
defined as:
PD  3.3 V  2.8 V  * 150mA  (3.3 V  1.8 V )
* 150mA  3.3 V * 200A  300mW
And the junction temperature TJ can be calculated as follows:
TJ = TA + PD*θJA
TJ = 40°C +0.3W*250°C/W
=40°C + 75°C
=115°C<TJ(MAX) = +125°C
For this application, TJ is lower than the absolute maximum operating junction temperature,+125°C, so it is safe to use the PAM3102 in this
configuration.
PAM3102
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PAM3102
Ordering Information
Part Number
PAM3102-AST26R1
PAM3102-BST26R1
Output Voltage
VOUT1 1.8V
VOUT2 2.8V
VOUT1 1.8V
VOUT2 2.5V
Part Marking
Package Type
Standard Package
ABAYW
TSOT26
3000Units/Tape&Reel
ABBYW
TSOT26
3000Units/Tape&Reel
Marking Information
Top View
TSOT26
PAM3102
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Package Outline Dimensions (All dimensions in mm.)
PAM3102
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