IMP5121 DATA COMMUNICATIONS 27-Line Plug and Play SCSI Terminator Key Features The 27-channel IMP5121 SCSI terminator is part of IMP's family of highperformance SCSI terminators that deliver true UltraSCSI performance. The BiCMOS design offers superior performance over first generation linear regulator/resistor based terminators. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator terminator approach. The bandwidth of terminators based on the older regulator/resistor terminator architecture is limited to 500kHz since a large output stabilization capacitor is required. The IMP architecture eliminates the external output compensation capacitor and the need for transient output capacitors while maintaining pin compatibility with first generation designs. Reduced component count is inherent with the IMP5121. The IMP5121 architecture tolerates marginal system designs. A key improvement offered by the IMP5121 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as improper cable lengths and impedance. Frequently, this situation is not controlled by the peripheral or host designer. ◆ SCSI Plug and Play — Host bus adapter with 3 SCSI connectors ◆ Ultra-Fast response for Fast-20 SCSI ◆ Split disconnect for mixing 16-bit (wide) or 8-bit (narrow) buses ◆ 35MHz channel bandwidth ◆ Sleep-mode current less than 150µA ◆ NO external compensation capacitors ◆ Compatible with active negation drivers ◆ Hot swap compatible ◆ Superior replacement for the LX5121 and UCC5621 For Host Bus Adapters and three SCSI connectors, the IMP5121 has multiple disable pins for Plug and Play SCSI capability. It also splits the upper nine termination lines for mixing 16-bit (wide) and 8-bit (narrow) buses with minimal board trace capacitance. For portable and configurable peripherals, the IMP5121 can be placed in a sleep mode with TTL compatible signals. Quiescent current is less than 150µA when disabled. Block Diagrams Term Power Current Biasing Circuit VTERM 24mA Current Limiting Circuit DATA OUTPUT PIN DB (0) 2.85V DISCONNECT 1 Enable Logic DISCONNECT 2 – 1 of 27 Channels + 1.4V VTERM Daily Silver IMP 5121_01.eps www.ds-imp.com.cn 1 IMP5121 Pin Configuration SSOP-44 TSSOP-56 T19 1 44 T27 T19 1 56 T27 T20 2 43 T26 T20 2 55 T26 T1 3 42 T25 T1 3 54 T25 T2 4 41 T18 T2 4 53 T18 W1 5 40 N1 W1 5 52 N1 W2 6 39 T17 W2 6 51 T17 T3 7 38 T16 T3 7 50 T16 T4 8 37 T15 T4 8 49 T15 T5 9 36 NC T5 9 48 NC GND 10 IMP5121 35 GND GND 10 47 GND GND 11 34 GND GND 11 46 GND GND 12 33 GND HEAT SINK 12 45 HEAT SINK GND 13 32 GND HEAT SINK 13 44 HEAT SINK DISCONNECT 1 14 31 V1 HEAT SINK 14 DISCONNECT 2 15 30 T14 HEAT SINK 15 T6 16 29 T13 HEAT SINK 16 41 HEAT SINK T7 17 28 T12 HEAT SINK 17 40 HEAT SINK T8 18 27 NC GND 18 39 GND T9 19 26 NC GND 19 38 GND T10 20 25 T11 DISCONNECT 1 20 T21 21 24 T24 DISCONNECT 2 21 36 T14 T22 22 23 T23 T6 22 35 T13 T7 23 34 T12 T8 24 33 NC T9 25 32 NC T10 26 31 T11 T21 27 30 T24 5121_02.eps DB Package IMP5121 43 HEAT SINK 42 HEAT SINK 37 V1 T22 28 29 T23 5121_02a.eps PW Package Ordering Information Temperature Range Package IMP5121CDB 0°C to 125°C 44-pin Plastic SSOP IMP5121CPW 0°C to 125°C 56-pin Plastic TSSOP Part Number 5121_t01.at3 Absolute Maximum Ratings1 TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V Continuous Output Voltage Range . . . . . . . . 0V to 5.5V Continuous Disable Voltage Range . . . . . . . . 0V to 5.5V Operating Junction Temperature . . . . . . . . . . 150°C Storage Temperature Range . . . . . . . . . . . . . . –65°C to 150°C Lead Temperature (Soldering, 10 sec.) . . . . . . 300°C Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Thermal Data PW and DB Package Thermal Resistance Junction-to-Ambient, θJA . . . . . . 50°C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the ambient airflow is assumed. 2 www.ds-imp.com.cn Daily Silver IMP IMP5121 Recommended Operating Conditions Parameter Symbol Min VTERM High Level Disable Input Voltage Low Level Disable Input Voltage Termpwr Voltage Max Units 4.0 5.5 V VIH 2 VTERM V VIL 0 0.8 V 0 125 °C Operating Junction Temperature Range – IMP5121C Note: Typ 5225_t02.eps 2. Recommended operating conditions indicate the range over which the device is functional. Electrical Characteristics Unless otherwise specified, these specifications apply at an ambient operating temperature of TA = 25°C. TermPwr = 4.75V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. Parameter Output High Voltage TermPwr Supply Current Symbol Conditions VOUT ICC Min Typ 2.65 2.85 Disconnect Input Current IOUT Units V mA All data lines = Open 12 20 All data lines = 0.5V 635 670 50 150 µA –22 –24 mA –10 µA Disable Pins 1, 2 < 0.8V Output Current Max –20 VOUT = 0.5V IIN DISCONNECT Pins = 0V Output Leakage Current IOL DISCONNECT Pins < 0.8V, VO = 0.2V Channel Bandwidth BW Termination Sink Current, per Channel ISINK 1 35 VOUT = 4V 7 µA MHz mA 5121_t03.eps Daily Silver IMP Data Communications 3 IMP5121 Application Information Figure 1. Receiving Waveform – 20MHz Figure 2. Driving Waveform – 20MHz Receiver Driver 1 Meter, AWG 28 IMP5121 IMP5121 5121_03.eps Figure 3. IMP5121 Maximizes Line Current Cable transmission theory suggests to optimize signal speed and quality, the termination should act both as an ideal voltage reference when the line is released (deasserted) and as an ideal current source when the line is active (asserted). Common active terminators which consist of linear regulators in series with resistors (typically 110Ω) are a compromise. With coventional linear terminators as the line voltage increases the amount of current decreases linearly by the equation; (VREF − VLINE) = I. R The IMP5121, with its unique new architecture, applies the maximum amount of current regardless of line voltage until the termination high threshold (2.85V) is reached. 4 Acting as a near ideal line terminator, the IMP5121 closely reproduces the optimum case when the device is enabled. To enable the device the DISC1 and DISC2 pins must be driven per Table 1. When enabled, quiescent current is 12mA and the device will respond to line demands by delivering 24mA on assertion and by imposing 2.85V on de-assertion. Disable/Sleep Mode Disable mode places the device in a sleep state, where quiescent current is reduced to less than 150µA. When disabled, all outputs are in a high impedance state. Sleep mode can be used for power conservation or to remove the terminator from the SCSI chain. An additional feature of the IMP5121 is its compatibility with active negation drivers. www.ds-imp.com.cn Daily Silver IMP IMP5121 Application Information Table 1. Power Up/ Power Down Function Table DISCONNECT 1 DISCONNECT 2 W1 W2 N1 T1-T18 T19-T27 H L DC DC DC Enabled Disabled L H DC DC DC Disabled Enabled L L DC DC DC Disabled Disabled H H H H H Enabled Enabled H H H H L Enabled Enabled H H H L H Enabled Enabled H H H L L Disabled Enabled H H L H H Enabled Enabled H H L H L Disabled Enabled H H L L H Disabled Disabled H H L L L Disabled Disabled 5121_t04.eps For Plug and Play SCSI auto-termination disabling, connect pin 50 of the External Wide SCSI connector to W1 of the IMP5121, connect pin 50 of the Internal Wide SCSI connector to W2 of the IMP5121, and connect pin 22 of the Internal Narrow connector to N1 of the IMP5121. Internal Narrow Internal Wide External Wide IMP5121 5121_05.eps Figure 4. Plug and Play Diagram Daily Silver IMP Data Communications 5 IMP5121 Package Dimensions SSOP (44-Pin) Inches Millimeters Min R 44 Max 23 E A B C D E P 22 1 ZD D F E F M A B SEATING PLANE Min Max 2.44 0.28 0.23 17.73 7.40 2.64 0.51 0.32 17.93 7.60 SSOP (44-Pin) L G C 44-Pin (SSOP)DB.eps G L M P R 0.096 0.011 0.0091 0.698 0.291 0.0315 BSC 0.004 0.016 0° 0.396 0.025 ZD TSSOP (56-Pin) LC* 0.104 0.020 0.0125 0.706 0.299 0.012 0.050 8° 0.414 0.035 0.80 BSC 0.033 REF — 0.30 1.27 8° 10.51 0.89 0.10 0.40 0° 10.11 0.63 0.51 REF 0.004 — 0.10 0.80 0.17 0.09 13.90 6.0 1.05 0.27 0.20 14.10 6.2 TSSOP (56-Pin) A B C D E E P 1 2 3 F E D F A H SEATING PLANE B G L M C 56-Pin.eps Daily Silver IMP Microelectronics Co.,Ltd 7 Keda Road , Hi-Tech Park, NingBo,Zhejiang, P.R.C. Post Code : 315040 Tel:(086)-574-87906358 Fax:(086)-574-87908866 e-mail:[email protected] http://www.ds-imp.com.cn The IMP logo is a registered trademark of Daily Silver IMP. All other company and product names are trademarks of their respective owners. G H L M P 0.032 0.007 0.004 0.547 0.236 0.041 0.011 0.008 0.555 0.244 0.50 BSC 0.02 BSC 0.002 — 0.018 0° 0.005 0.047 0.030 8° 0.05 — 0.45 0° 0.32 BSC LC* — * Lead Coplanarity 0.004 0.15 1.20 0.75 8° 8.1 BSC — 0.10 5225_t05.at3 2005 Daily Silver IMP Revision : A Issue Date: 08 / 08 / 05 Type: Product