HD74HC590 8-bit Binary Counter/Register (with 3-state outputs) REJ03D0632-0200 (Previous ADE-205-512) Rev.2.00 Mar 30, 2006 Description This device each contains an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features a direct clear input CCLR and a count enable input CCKEN. For cascading a ripple carry output RCO is provided. Expansion is easily accomplished by tying RCO of the first stage to CCKEN of the second stage, etc. Both the counter and register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the counter state will always be one count ahead of the register, Internal circuitry prevents clocking from the clock enable. Features • High Speed Operation: tpd (RCK to Q) = 18.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type HD74HC590P Package Code (Previous Code) Package Abbreviation PRDP0016AE-B (DP-16FV) DILP-16 pin P — PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. HD74HC590FPEL Taping Abbreviation (Quantity) EL (2,000 pcs/reel) SOP-16 pin (JEITA) Function Table G RCK Inputs CCLR CCKEN CCK H L X X X X X X X X Q output disabled Q output enabled X X X X X X Contents of counter stored to register No change in register X Counter clear Count up X X X X X X L H X L X X X X H H L H RCO = QA’•QB’•QC’•QD’•QE’•QF’•QG’•QH’• (CCKEN) (QA’ to QH’: Output of Internal Counter) Rev.2.00 Mar 30, 2006 page 1 of 9 X Function No count No count HD74HC590 Pin Arrangement QB 1 16 VCC QC 2 15 QA QD 3 14 C QE 4 13 RCK QF 5 12 CCKEN QG 6 11 CCK QH 7 10 CCLR 9 RCO GND 8 (Top view) Rev.2.00 Mar 30, 2006 page 2 of 9 HD74HC590 Logic Diagram T Q CCK CCLR CCK REC Out RCK RCK G QA T REC Out QB Q CCK CCLR CCK T RCK RCK G Q CCK CCLR CCK REC Out T REC Out Q CCK CCLR CCK T RCK RCK RCK RCK G REC Out T Q CCK CCLR CCK REC Out T Q CCK CCLR CCK REC Out T REC Out Q CCK CCLR CCK RCK RCK RCK RCK RCK RCK QD G Q CCK CCLR CCK RCK RCK QC QE G QF G QG G QH G RCO CCKEN CCK CCLR RCK G Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC VIN, VOUT –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IOUT ±20 ±35 mA mA ICC or IGND PT ±75 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.2.00 Mar 30, 2006 page 3 of 9 HD74HC590 Recommended Operating Conditions Item Symbol Ratings Unit Supply voltage Input / Output voltage VCC VIN, VOUT 2 to 6 0 to VCC V V Operating temperature Ta –40 to 85 0 to 1000 °C tr , tf 0 to 500 0 to 400 ns Input rise / fall time Note: *1 Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Output voltage VOH VOL Ta = –40 to+85°C 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 6.0 2.0 — 1.9 — 2.0 0.26 — — 1.9 0.33 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Unit Test Conditions V V V QA to QH IOH = –20 µA Vin = VIH or VIL IOH = –6 mA IOH = –7.8 mA V QA to QH IOL = 20 µA Vin = VIH or VIL IOL = 6 mA V IOL = 7.8 mA IOH = –20 µA RCO Vin = VIH or VIL IOH = –4 mA IOH = –5.2 mA V IOL = 20 µA RCO Vin = VIH or VIL IOL = 4 mA Off-state output current IOZ 6.0 6.0 — — — — 0.26 ±0.5 — — 0.33 ±5.0 IOL = 5.2 mA µA Vin = VIH or VIL, Vout = VCC or GND Input current Quiescent supply current Iin ICC 6.0 6.0 — — — — ±0.1 4.0 — — ±1.0 40 µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA Rev.2.00 Mar 30, 2006 page 4 of 9 HD74HC590 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Ta = –40 to +85°C 2.0 Min — Typ — Max 5 Min — Max 4 4.5 6.0 — — — — 25 29 — — 20 24 tPLH tPHL 2.0 4.5 — — — 18 200 40 — — 250 50 tPLH 6.0 2.0 — — — — 34 250 — — 43 315 4.5 6.0 — — 17 — 50 43 — — 63 54 2.0 4.5 — — — 18 200 40 — — 250 50 6.0 2.0 — — — — 34 150 — — 43 190 4.5 6.0 — — 16 — 30 26 — — 39 33 Maximum clock frequency fmax Propagation delay time tPLH tPHL Output enable time tZL tZH Output disable time tLZ tHZ 2.0 4.5 — — — 17 150 30 — — 190 38 Pulse width tw 6.0 2.0 — 80 — — 26 — — 100 33 — 4.5 6.0 16 14 6 — — — 20 17 — — 2.0 4.5 5 5 — — — — 5 5 — — 6.0 2.0 5 100 — — — — 5 125 — — 4.5 6.0 20 17 –3 — — — 25 21 — — 2.0 4.5 200 40 — 10 — — 250 50 — — 6.0 2.0 34 5 — — — — 43 5 — — 4.5 6.0 5 5 — — — — 5 5 — — 2.0 4.5 — — — 4 60 12 — — 75 15 6.0 2.0 — — — — 10 75 — — 13 95 4.5 6.0 — — 5 — 15 13 — — 19 16 — — 5 10 — 10 Removal time trem Setup time tsu Hold time Output rise/fall time th tTLH tTHL tTLH tTHL Input capacitance Cin Rev.2.00 Mar 30, 2006 page 5 of 9 Unit Test Conditions MHz ns CCK to RCO ns CCLR to RCO ns RCK to Q ns ns ns ns CCLR to CCK ns CCKEN to CCK ns CCK to RCK ns CCKEN to CCK CCK to RCK ns Q ns RCO pF HD74HC590 Test Circuit VCC VCC Output 1 kΩ QA to QH Input Input Pulse Generator Zout = 50 Ω CL = 50 pF Output CCK CCLR OPEN GND CCKEN See Function Table Pulse Generator Zout = 50 Ω S1 1 kΩ RCO S1 VCC OPEN GND CL = 50 pF RCK G VCC TEST t PLH / t PHL S1 OPEN t ZH/ t HZ t ZL / t LZ GND VCC Note : 1. CL includes probe and jig capacitance. Waveforms • Waveform – 1 (CCK to RCO) tf tr VCC 90 % 50 % 50 % Input CCK 10 % 50 % 10 % tw(H) t PHL Output RCO 0V tw(L) t PLH 90 % 90 % 50 % 10 % 50 % 10 % VOH VOL t TLH t THL Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 2 (CCLR to RCO, CCLR to CCK) tf Input D tr 90 % 90 % 50 % 50 % 10 % 10 % VCC 0V tW t PLH VOH 90 % 50 % Output RCO 10 % t TLH VOL t rem 90 % Output CCK 50 % 10 % t TLH Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 6 of 9 VOH VOL HD74HC590 • Waveform – 3 (RCK to Q) tf tr VCC 90 % 50 % 50 % 10 % Input RCK 10 % 50 % tw(H) 0V tw(L) t PLH t PHL VOH 90 % 90 % Output QA to QH 50 % 10 % 50 % 10 % VOL t THL t TLH Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 4 (CCKEN to CCK) tr tf 90 % Input CCKEN VCC 90 % 50 % 50 % 10 % 50 % 10 % t su th t su 0V th VCC 90 % Input CCK 50 % 10 % 50 % 10 % tr 50 % tf Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 7 of 9 0V HD74HC590 • Waveform – 5 (CCK to RCK) tr tf 90 % Input CCK VCC 90 % 50 % 50 % 10 % 10 % 0V t su th VCC 90 % Input RCK 50 % 10 % 50 % 10 % tr 0V tf Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 6 (tZL, tZH, tLZ, tHZ) tf Input G tr 90 % 50 % 90 % 50 % 10 % t ZL 10 % VCC 0V t LZ VOH Waveform - A 50 % t ZH Waveform - B 10 % t HZ VOL 90 % VOH 50 % VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 8 of 9 HD74HC590 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g D 9 E 16 1 8 b3 0.89 A1 A Z L Reference Symbol θ bp e e1 D E A A1 bp b3 c θ e Z L c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV Dimension in Millimeters Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.12 2.54 MASS[Typ.] 0.24g D F 16 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 9 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 8 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 9 of 9 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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