MX23L6451

MX23L6451
64M-BIT [64M x 1] CMOS SERIAL MASK-ROM
FEATURES
GENERAL
• 67,108,864 x 1 bit structure
• Single Power Supply Operation
- 3.0 to 3.6 volt for read operations
• Latch-up protected to 100mA from -1V to Vcc +1V
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code, 3-byte address, 1-byte byte
address
HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• PACKAGE
- 28-pin SOP (330mil)
PERFORMANCE
• High Performance
- Fast access time: 25MHz serial clock (50pF + 1TTL
Load)
• Low Power Consumption
- Low active read current: 10mA (typical) at 25MHz
- Low standby current: 30uA (typical, CMOS)
* 6MHz for Die Form only
GENERAL DESCRIPTION
The MX23L6451 is a CMOS 67,108,864 bit serial Mask
ROM, which is configured as 8,388,608 x 8 internally. The
MX23L6451 features a serial peripheral interface and
software protocol allowing operation on a simple 3- wire
bus. The three bus signals are a clock input (SCLK), a
serial data input (SI), and a serial data output (SO). Serial
peripheral interface access to the device is enabled by CS
input.
The MX23L6451 provides sequential read operation on the
whole chip.
PIN CONFIGURATIONS
PIN DESCRIPTION
When the device is not in operation and CS is high, it is put
in standby mode and draws less than 30uA DC current.
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MX23L6451
28-PIN SOP (330 mil)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
GND
VCC
NC
NC
NC
SI
SO
CS
SCLK
NC
NC
NC
NC
P/N: PM0938
SYMBOL
DESCRIPTION
CS
Chip Select
SI
Serial Data Input
SO
Serial Data Output
SCLK
Clock Input
VCC
+ 3.3V Power Supply
GND
Ground
NC
No Internal Connection
REV. 1.1, JUL. 01, 2004
1
MX23L6451
BLOCK DIAGRAM
X-Decoder
Address
Generator
Memory Array
(8192 x 8192)
Page Buffer
SI
Data
Register
Y-Decoder
CS
Sense
Amplifier
Mode
Logic
Output
Buffer
SO
SCLK
Clock Generator
ORDER INFORMATION
Part No.
MX23L6451MC-40G
MX23L6451HC-15
Access Time
40ns
150ns
Package
28 pin SOP
Die
P/N: PM0938
2
Remark
Pb-free
REV. 1.1, JUL. 01, 2004
MX23L6451
COMMAND DEFINITION
Command
Read Array
(byte)
1st
52H
2nd
AD1
3rd
AD2
4th
AD3
5th
BA
6th
X
7th
X
8th
X
9th
X
Action
n bytes read out until CS goes high
Note:
1.X is dummy cycle and is necessary
2.AD1 to AD3 are address input data
3.BA is byte address
1-byte command code
Bit7(MSB) Bit6
3-byte address(0 to 1FFFH)
AD1:
X
X
AD2:
A16
A15
AD3:
X
X
1-byte byte address(0 to 7FH)
BA:
X
A6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
A22
A14
X
A21
A13
X
A20
A12
X
A19
A11
X
A18
A10
A8
A17
A9
A7
A5
A4
A3
A2
A1
A0
P/N: PM0938
3
REV. 1.1, JUL. 01, 2004
MX23L6451
DEVICE OPERATION
1.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until
next CS falling edge. In standby mode, SO pin of this LSI should be High-Z.
2.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CSB
rising edge.
COMMAND DESCRIPTION
(1) Read Array
This command is sent with the 4-byte address (command included), and the byte address, followed by four dummy bytes
sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes
high. The clock to clock out the data is supplied by the master serial interface. The read operation is executed on a segment
(512 bytes) basis. If the end of the segment is reached then the device will wrap around to the beginning of the next segment
with no delays incurred during the segment boundary crossover. As with crossing over segment boundaries, no delays will
be incurred when wrapping around from the end of the array to the beginning of the array.
(2) Standby Mode
When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less
than 30uA.
DATA SEQUENCE
Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially
read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit
7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB)
ADDRESS SEQUENCE
The address assignment is described as follows :
BA: Byte address Bit sequence:
AD1:First Address Bit sequence:
AD2:Second Address Bit sequence:
AD3:Thrid Address Bit sequence:
X
X
A16
X
A6
X
A15
X
A5
A22
A14
X
A4
A21
A13
X
P/N: PM0938
4
A3
A20
A12
X
A2
A19
A11
X
A1
A18
A10
A8
A0
A17
A9
A7
REV. 1.1, JUL. 01, 2004
MX23L6451
ELECTRICAL SPECIFICATIONS
NOTICE:
1.Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is stress rating only and functional operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended period may
affect reliability.
ABSOLUTE MAXIMUM RATINGS
RATING
VALUE
Ambient Operating Temperature
0°C to 70°C
Storage Temperature
-55°C to 125°C
Applied Input Voltage
-0.5V to 4.6V
Applied Output Voltage
-0.5V to 4.6V
VCC to Ground Potential
-0.5V to 4.6V
2.Specifications contained within the following tables are
subject to change.
3.During voltage transitions, all pins may overshoot to 4.6V or
-0.5V for period up to 20ns.
4.All input and output pins may overshoot to VCC+0.5V while
VCC+0.5V is smaller than or equal to 4.6V.
Maximum Positive Overshoot Waveform
Maximum Negative Overshoot Waveform
20ns
4.6V
0V
3.6V
-0.5V
20ns
CAPACITANCE TA = 25°C, f = 1.0 MHz
SYMBOL
PARAMETER
CIN
COUT
MIN.
MAX.
UNIT
CONDITIONS
Input Capacitance
10
pF
VIN = 0V
Output Capacitance
10
pF
VOUT = 0V
P/N: PM0938
5
TYP
REV. 1.1, JUL. 01, 2004
MX23L6451
INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL
3.0V
AC
1.5V
Measurement
Level
0V
Note:Input pulse rise and fall time are < 10ns
OUTPUT LOADING
DEVICE UNDER
TEST
+3.3V
CL
DIODES=IN3064
OR EQUIVALENT
CL=50pF Including jig capacitance
P/N: PM0938
6
REV. 1.1, JUL. 01, 2004
MX23L6451
DC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
SYMBOL PARAMETER
IIL
MIN.
TYP
Input Load
MAX.
UNITS
TEST CONDITIONS
±10
uA
VCC = VCC Max
Current
ILO
VIN = VCC or GND
±10
Output Leakage
uA
Current
ISB1
VIN = VCC or GND
VCC Standby
30
uA
VCC Standby
1
3
mA
Current (TTL)
ICC1
VCC Read
VIL
Input Low Voltage
VIH
Input High Voltage
VOL
Output Low Voltage
VOH
Output High Voltage
VCC = VCC Max
CS = VCC ± 0.2V
Current (CMOS)
ISB2
VCC = VCC Max
VCC = VCC Max
CS = VIH
10
30
mA
-0.5
0.8
V
2.0
VCC+0.5
V
0.4
V
IOL = 500uA
V
IOH = -100uA
2.4
P/N: PM0938
7
f=25MHz
REV. 1.1, JUL. 01, 2004
MX23L6451
AC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
SYMBOL
PARAMETER
Min.
Typ.
Max.
Units
fSCLK
Clock Frequency
25
MHz
tCYC
Clock Cycle Time
40
ns
tSKH
Clock High Time
20
ns
tSKL
Clock Low Time
20
ns
tR
Clock Rise Time
5
ns
tF
Clock Fall Time
5
ns
tCSA
CS Lead Clock Time
40
ns
tCSB
CS Lag Clock Time
40
ns
tCSH
CS High Time
80
ns
tDS
SI Setup Time
5
ns
tDH
SI Hold Time
20
ns
tAA
Access Time
tDOH
SO Hold Time
5
tDOZ
SO Floating Time
0
30
Conditions
ns
ns
20
ns
NOTES:
1. Typical value is calculated by simulation.
SERIAL DATA INPUT/OUTPUT TIMING
tCSB
tCSH
tCSA
CS
tR
tCYC
tF
SCLK
tSKH
SI
BIT 7
tDS
tSKL
BIT 6
BIT 0
tDH
BIT 7
SO
tAA
BIT 0
tDOH
tDOZ
P/N: PM0938
8
REV. 1.1, JUL. 01, 2004
MX23L6451
STANDBY TIMING WAVEFORM
CS
SCLK
SI
SO
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Hi-Z
1st byte
When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next
CS falling edge. In standby mode, SO pin of this LSI should be High-Z. While CS=VIH, current=standby current, while
CS=VIL and commands are issuing, or commands are invalid, current=5mA(typ.) to 15mA(max.).
P/N: PM0938
9
REV. 1.1, JUL. 01, 2004
MX23L6451
READ ARRAY TIMING WAVEFORM
CS
SCLK
SI
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Hi-Z
SO
1st byte (52h)
2nd byte (AD1)
Hi-Z
CS
SCLK
SI
Bit 1
Bit 0
SO
Bit7
Bit 6
9th byte (Dummy)
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1st data output byte
Bit 7
Bit 6
Bit 5
2nd data output byte
Hi-Z
CS
SCLK
SI
SO
Bit3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
511 data output byte
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Hi-Z
512 data output byte
NOTES:
1. 1st Byte='52h'
2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2, A20=BIT3, A21=BIT4, A22=BIT5.
3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7
4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1
5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6
6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care)
7. From Byte 10, SO Would Output Array Data
P/N: PM0938
10
REV. 1.1, JUL. 01, 2004
MX23L6451
PACKAGE IMFORMATION
P/N: PM0938
11
REV. 1.1, JUL. 01, 2004
MX23L6451
REVISION HISTORY
Revision Description
1.0
1. Remove "Advanced Information"
2. Change pin8:GND-->NC, pin9:VCC-->NC
1.1
1. Add "6MHz for Die Form only"
Page
P1
P1
P1
P/N: PM0938
12
Date
MAY/12/2004
JUL/01/2004
REV. 1.1, JUL. 01, 2004
MX23L6451
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to use of Macronix's products in the prohibited applications.
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