SM5309A 3-channel Video Buffer with Built-in wideband LPF OVERVIEW The SM5309A is a 3-channel video buffer with built-in 5th-order lowpass filters. The lowpass filter cutoff frequency range can adjust from 4MHz to 40MHz*1 by 256 steps. The lowpass filter supports 480i to 1080i format, video signal equipment analog input/outputs. For video input systems, the device functions as a next-stage ADC system anti-aliasing filter. For video output systems, the filter reduces video DAC aliasing and external noise and can drive up to 300Ω load resistance. The cutoff frequency and signal input type can be controlled using an I2C-BUS*2, and the I2C slave address can be set by ADS (3-state input) to allow up to three SM5309A on the same bus. *1. When the resistor connected to ISET (RISET) is 1.8kΩ. *2. I2C-BUS is a registered trademark of NXP B.V. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Supply voltages • Analog: 4.75 to 5.25V • I2C-BUS interface: 3.0 to 5.5V Lowpass filter with adjustable cutoff frequency (256 steps) • Cutoff frequency range: 4MHz to 40MHz (RISET = 1.8kΩ) Filter bypass mode function for display specifications up to SXGA resolution • Passband: 80MHz (typ) Half fc mode switch function (CH-2, CH-3) suitable for component signals 2-system input multiplexer function (switchable using I2C-BUS or MUXSEL input) Video input pins can be independently set to synctip clamp/bias/direct inputs Up to 300Ω load resistance drive capability Output gain: 0dB Power-down function • ≤ 1mA current consumption when power-down I2C-BUS interface control • Slave address: 90h, 92h, or 94h (up to three devices can be used simultaneously, selected by ADS input) • Data transfer rate: Fast mode (up to 400kbit/s) Operating ambient temperature range: 0 to 70°C Package: 24-pin VSOP (Top view) IN1A 1 24 REF1 GND REF2 ISET VCC NC OUT1 IN2A GND IN2B OUT2 VCC VCC IN3A OUT3 IN3B GND MUXSEL SCL VDD ■ ■ PACKAGE DIMENSIONS (Unit: mm) + 0.1 0.15 − 0.05 7.9 ± 0.2 5.6 ± 0.2 HDTVs LCD TVs PDPs Projectors Package SM5309AV 24-pin VSOP 0.65 0.10 + 0.1 0.22 − 0.05 0.12 M 0 to 10 0.10 ± 0.05 ORDERING INFORMATION Device SDA 1.15 ± 0.1 ■ 13 12 APPLICATIONS ■ ADS IN1B 0.5 ± 0.2 ■ PINOUT 7.6 ± 0.2 FEATURES SEIKO NPC CORPORATION —1 SM5309A BLOCK DIAGRAM VDD ISET ADS MUXSEL REF1 SDA Vref Current Source I 2C Control SCL Bypass IN1A IN1B VCC Clamp/Bias/Direct MUX 5th Order LPF Clamp/Bias/Direct 0dB GND Bypass VCC Clamp/Bias/Direct MUX IN2B Clamp/Bias/Direct 5th Order LPF 0dB GND Bypass VCC Clamp/Bias/Direct MUX IN3B Clamp/Bias/Direct OUT2 Filter CH-2 IN3A OUT1 Filter CH-1 IN2A REF2 5th Order LPF 0dB OUT3 Filter GND CH-3 Note. The recommended value of the external resistor (RISET) connected to ISET is 1.8kΩ. SEIKO NPC CORPORATION —2 SM5309A PIN DESCRIPTION Number Name I/O*1 A/D*2 1 IN1A I A Video signal input (CH-1, input A) 2 IN1B I A Video signal input (CH-1, input B) 3 GND – A Ground 4 ISET – A Internal current-setting resistor (RISET) connection (standard 1.8kΩ) 5 NC – – No connection 6 IN2A I A Video signal input (CH-2, input A) 7 IN2B I A Video signal input (CH-2, input B) 8 VCC – A Analog supply 9 IN3A I A Video signal input (CH-3, input A) 10 IN3B I A Video signal input (CH-3, input B) 11 MUXSEL I D Input multiplexer switch control L (GND): INnA select H (VCC): INnB select 12 SCL I D I2C-BUS clock signal input 13 SDA I/O D I2C-BUS data signal input/output 14 VDD – D I2C-BUS interface supply 15 GND – A Ground 16 OUT3 O A Video signal output (CH-3) 17 VCC – A Analog supply 18 OUT2 O A Video signal output (CH-2) 19 GND – A Ground 20 OUT1 O A Video signal output (CH-1) 21 VCC – A Analog supply 22 REF2 O A Internal reference voltage 2 23 REF1 O A Internal reference voltage 1 D I2C-BUS slave address select (3-state input) L (GND): 90h H (VCC): 92h Open: 94h 24 ADS I Description *1. I: input, O: output *2. A: analog, D: digital SEIKO NPC CORPORATION —3 SM5309A PIN EQUIVALENT CIRCUITS Number Name I/O*1 Equivalent circuit VCC 1 2 6 7 9 10 IN1A IN1B IN2A IN2B IN3A IN3B I INnA INnB GND VCC 20 18 16 OUT1 OUT2 OUT3 O OUTn GND VCC 23 REF1 O REF1 GND VCC REF2 22 REF2 O GND SEIKO NPC CORPORATION —4 SM5309A Number Name I/O*1 Equivalent circuit VDD 250Ω 13 SDA SDA I/O GND VDD 180Ω 12 SCL SCL I GND VCC 11 MUXSEL 180Ω I MUXSEL GND VCC 24 ADS I 250Ω ADS GND *1. I: input, O: output Note. Resistance values in the equivalent circuits indicate design values. SEIKO NPC CORPORATION —5 SM5309A SPECIFICATIONS Absolute Maximum Ratings GND = 0V, VCC = VDD = VCC Parameter Symbol Condition Supply voltage VCC VCC, VDD Input voltage VIN ADS, SDA, SCL, INn (n = 1, 2, 3) Rating Unit − 0.3 to 7.0 V GND – 0.3 to VCC + 0.3 V TSTG − 55 to + 125 °C Power dissipation*1 PD 1.1 W Junction temperature*1 TJ 125 °C Storage temperature range *1. Ta = 80°C, when mounted on NPC’s regulation substrate (110 × 65 × 1.6mm double layer glass-epoxy substrate with 160% wiring factor) Recommended Operating Conditions Parameter Symbol Condition Rating Unit Supply voltage 1 VCC VCC 4.75 to 5.25 V Supply voltage 2 VDD VDD 3.0 to 5.5 V 0 to 70 °C Operating ambient temperature Ta Note. VCC should be applied simultaneously. Electrical Characteristics DC Characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Symbol Condition Unit Test level min typ max Filter mode, FCDATA = 0 − 65 90 mA I ICC2 Filter mode, FCDATA = 255 − 80 115 mA I ICC3 Filter bypass mode − 50 75 mA I ICC4 Power-down mode − − 1.0 mA I HIGH-level input voltage VIH1 SDA, SCL 0.7 VDD − − V I LOW-level Input voltage VIL1 SDA, SCL − − 0.3 VDD V I ADS, MUXSEL HIGH-level input voltage VIH2 ADS, MUXSEL 0.8 VCC − − V I ADS, MUXSEL LOW-level input voltage VIL2 ADS, MUXSEL − − 0.2 VCC V I ADS open-circuit input voltage VOPEN VCC/2 − 0.2 − VCC/2 + 0.2 V I Current consumption 1*1 ICC1 Current consumption 2*1 Current consumption 3*1 Current consumption 4*1 ADS LOW-level input leakage current ILL SDA, SCL, VIN = 0V − − 1.0 µA I HIGH-level input leakage current ILH SDA, SCL, VIN = VDD − − 1.0 µA I SDA output voltage VOL SDA = LOW output, Sink current = 3mA 0 − 0.4 V I *1. Total of current consumption of VCC and VDD, when no input signals. SEIKO NPC CORPORATION —6 SM5309A AC Characteristics (I2C-BUS) VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted. Rating Unit Test level 400 kHz II − − µs II 1.3 − − µs II tHIGH 0.6 − − µs II SCL setup time (start condition) tSU;STA 0.6 − − µs II SDA data hold time tHD;DAT 0 − 0.9 µs II SDA data setup time tSU;DAT 100 − − ns II SDA, SCL rise time tr − − 300 ns II SDA, SCL fall time tf − − 300 ns II tSU;STO 0.6 − − µs II Ci − − 10 pF II Parameter Symbol Condition min typ max fSCL 0 − tHD;STA 0.6 SCL clock LOW-level pulsewidth tLOW SCL clock HIGH-level pulsewidth SCL clock frequency SCL hold time (start condition) SCL setup time (stop condition) SDA, SCL input capacitance SDA tf tLOW tr tr tSU;DAT tf tHD;STA SCL tHD;DAT tHD;STA S tSU;STA tHIGH Sr tSU;STO P Note. S, Sr: start condition, P: stop condition SEIKO NPC CORPORATION —7 SM5309A Analog Characteristics Analog input characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Internal mode settings are shown in table 1 in "Mode Condition Settings". Rating Parameter Symbol Condition min typ max Unit Test level Clamp voltage VCLMP Clamp input, no signal input 1.6 1.8 2.0 V I Bias voltage VBIAS Bias input, no signal input 2.1 2.3 2.5 V I Input resistance RBIAS Bias input − 20 − kΩ II VAI1 Mode: b (bias), THD < 1.0% − − 1.4 Vp-p I VAI2 Mode: c (clamp), THD < 1.0% − − 1.4 Vp-p I VAI3 Mode: f (bias), THD < 1.0% − − 1.4 Vp-p I VAI4 Mode: g (clamp), THD < 1.0% – − 1.4 Vp-p I VIDC Direct mode, THD < 1.5%, VIN < 1.4Vp-p 1.5 − 3.2 V I Filter mode input voltage Bypass mode input voltage Direct mode input DC voltage range Note. This item represents values of maximum input signal amplitude in which the output distortion rate shown in the condition column is filled. When the signal amplitude that exceeds this specification value is input, the output distortion rate is deteriorated. When using this device, the input signal level should be set not to exceed the standard value of the signal amplitude. Filter mode and bypass mode frequency characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Rating Parameter Symbol Condition min typ max Unit Test level FC1 FCDATA = 0 − 4.00 − MHz II FC2 FCDATA = 10 4.96 5.64 6.32 MHz I FC3 FCDATA = 227 28.95 32.90 36.85 MHz I FC4 FCDATA = 255 − 40.00 − MHz II Rhalf1 Half fc mode, FCDATA = 10 42 47 52 % I Rhalf2 Half fc mode, FCDATA = 227 47.5 52.5 57.5 % I 4fc attenuation GSB fin ≥ 4fc, attenuation from fin = 100kHz − 50 − dB II Filter bypass mode passband FBP VIN = 1.0Vp-p, Gain = − 1dB 74.25 80 − MHz II Cutoff frequency Half fc mode cutoff frequency ratio SEIKO NPC CORPORATION —8 SM5309A Analog output characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, CH-1 set to clamp input, CH-2 and CH-3 set to bias input, FCDATA = 227, unless otherwise noted. Internal mode settings are shown in table 1 in "Mode Condition Settings". Rating Parameter Symbol Condition min typ max Unit Test level Filter mode output gain AVF − 0.5 0 0.5 dB I Filter bypass mode output gain AVB − 0.5 0 0.5 dB I Filter bypass mode gain error dAVBP − ± 0.2 − dB I Channel to channel gain error dAVCH − − ± 0.2 dB I Gain error between filter mode and bypass mode Vout Mode: b, c, THD < 1.0% – 1.4 – Vp-p I THDB Mode: b, fin = 100kHz, VIN = 1.4Vp-p − 0.2 1.0 % I THDC Mode: c, fin = 100kHz, VIN = 1.4Vp-p − 0.2 1.0 % I Channel to channel crosstalk XTLK1 1.0Vp-p input, fin = 1MHz, between 2 channels − − 80 − dB II MUX input to input crosstalk XTLK2 1.0Vp-p input, fin = 1MHz, between INnA and INnB – − 70 − dB II Maximum output voltage Output distortion Drive load resistance RL 1 load = 300Ω − − 1 load I I2C response time TIC Response time from ACK bit output when changing settings using I2C-BUS − − 1 µs II Unit Test level Reference voltage characteristics VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, unless otherwise noted. Rating Parameter REF output voltage Symbol Condition min typ max VR1 REF1 − 3.35 − V II VR2 REF2 − 2.45 − V II Test level The definition of “Test Level” shown in the electrical characteristic table is as follows. I : 100% of products tested at Ta = + 25°C. II : Guaranteed as result of design and characteristics evaluation. SEIKO NPC CORPORATION —9 SM5309A Mode Condition Settings Table 1. Mode settings Input type Mode setting fc mode a CH-1 CH-2 CH-3 Clamp Bias Bias b Bias c Clamp d Bias e Clamp f Bias g Clamp Filter/Bypass mode Standard Filter Half − h Bypass Standard Filter i Direct Half − j Bypass Evaluation Circuit Diagram VCC VDD VCC 1µF + + + IN1A 10µF + + 10µF 0.1µF 100µF 0.1µF 100µF 1µF IN2A + 1µF IN3A + IN1A ADS IN1B REF1 GND REF2 ISET VCC NC 1µF IN1B + 1µF IN2B + IN3B + OUT1 300Ω OUT1 IN2A GND IN2B OUT2 VCC VCC IN3A OUT3 IN3B GND MUXSEL VDD SCL 1µF 100µF SDA 100µF + OUT2 300Ω 100µF + VCC OUT3 300Ω + I 2C Controller 1.8kΩ 100pF SEIKO NPC CORPORATION —10 SM5309A FUNCTIONAL DESCRIPTION I2C-BUS Control The SM5309A uses an I2C BUS interface to set the following functions. 1) 2) 3) 4) 5) 6) Cutoff frequency Input multiplexer selection fc mode switching (1/2 cutoff frequency switching) Filter mode/filter bypass mode switching Input type switching (sync-tip clamp, bias, direct) Power-down function The transfer rate of I2C-BUS corresponds to the fast-mode (up to 400kbit/s). Note that the SM5309A does not support a read function (IC is write only). Basic cycle SDA SCL Start condition Stop condition I2C-BUS start/stop condition The basic access cycle comprises the following elements. 1) 2) 3) 4) 5) Start condition 1st byte: Slave address 2nd byte: Subaddress 3rd byte: Control data Stop condition If the input data does not match the slave address or the subaddress is incorrect, the corresponding ACK (acknowledge) bit is not output LOW. However, the ACK bit is output after 3rd byte irrespective of the byte data. Also note that the IC does not support a subaddress auto-increment function, hence each subaddress access requires all the basic cycle steps 1 to 5. Start SDA 1st byte:Slave address D7 D6 D1 2nd byte:Subaddress D0 3rd byte:Control data Stop ACK D7 D6 D1 D0 ACK D7 D6 D1 D0 ACK 9 1 2 7 8 9 1 2 7 8 9 Low SCL 1 2 7 8 SEIKO NPC CORPORATION —11 SM5309A 1st byte: slave address The ADS pin can set one of three slave addresses. Note that D0 must be “0 (Write)”. The input circuit of ADS pin is placed in analog supply (VCC, GND) area. 1st byte: slave address ADS HEX D7 D6 D5 D4 D3 D2 D1 D0 L: GND 90h 1 0 0 1 0 0 0 0 (W) H: VCC 92h 1 0 0 1 0 0 1 0 (W) Open 94h 1 0 0 1 0 1 0 0 (W) 2nd byte: subaddress The 2nd byte sets the subaddress, selecting one of three registers. 2nd byte: subaddress Register name HEX D7 D6 D5 D4 D3 D2 D1 D0 FCSET 01h 0 0 0 0 0 0 0 1 CONDITION1 02h 0 0 0 0 0 0 1 0 CONDITION2 03h 0 0 0 0 0 0 1 1 3rd byte: control data The 3rd byte control data sets the register flags corresponding to the subaddress selected by 2nd byte. The flags assigned are shown in the following table. 3rd byte: control data Register name D7 D6 D5 D4 D3 D2 D1 D0 FCSET FCM FC6 FC5 FC4 FC3 FC2 FC1 FC0 CONDITION1 CB5 CB4 CB3 CB2 CB1 CB0 − – CONDITION2 PD MUX HALF BYPASS − – − − SEIKO NPC CORPORATION —12 SM5309A Flag settings (1) Cutoff frequency Register name: FCSET Flag names: FCM, FC [6:0] The FCSET register setting sets the cutoff frequency using one of two tuning adjustment functions, thus a total of 256 steps are possible. Flag name FCDATA FCM FC6 FC5 FC4 FC3 FC2 FC1 FC0 Cutoff frequency [MHz] FCSET 0 00h 0 0 0 0 0 0 0 0 4.00 1 01h 0 0 0 0 0 0 0 1 4.18 2 02h 0 0 0 0 0 0 1 0 4.35 Default : 125 7Dh 0 1 1 1 1 1 0 1 21.66 126 7Eh 0 1 1 1 1 1 1 0 21.79 127 7Fh 0 1 1 1 1 1 1 1 21.92 128 80h 1 0 0 0 0 0 0 0 7.51 129 81h 1 0 0 0 0 0 0 1 7.82 130 82h 1 0 0 0 0 0 1 0 8.11 : 253 FDh 1 1 1 1 1 1 0 1 39.46 254 FEh 1 1 1 1 1 1 1 0 39.72 255 FFh 1 1 1 1 1 1 1 1 40.00 (2) Input type switching (sync-tip clamp, bias, direct) Register name: CONDITION1 Flag names: CB [5:4], CB [3:2], CB [1:0] These flags set the input type of CH-1, CH-2, and CH-3 to one of three types: sync-tip clamp input, bias input, or direct input. Channel CH-1 CH-2 CH-3 Flag name CB5 CB3 CB1 CB4 CB2 CB0 Input type L L Sync-tip clamp input L H Bias input H Don't care Direct input*1 Default *1. An input coupling capacitor should not be connected when direct input is selected. SEIKO NPC CORPORATION —13 SM5309A (3) Power-down mode select Register name: CONDITION2 Flag name: PD This flag selects standard/power-down for the analog block. Flag name Mode Default PD L Standard (normal operation) H Power-down (no operation) (4) Input multiplexer selection Register name: CONDITION2 Flag name: MUX This flag selects the A or B input for all three channels (IN1×, IN2×, IN3×). Note that this flag is significant only when the MUXSEL input is LOW. See “Input Multiplexer Switching (MUXSEL)”. Flag name Input selection*1 Default MUX L INnA H INnB *1. n = 1, 2, 3 (5) fc mode switching (1/2 cutoff frequency switching) Register name: CONDITION2 Flag name: HALF This flag switches the cutoff frequency of CH-2 and CH-3 to divide the value set by the FCSET register into halves. Note that the CH-1 cutoff frequency cannot be switched to 1/2. This mode is suitable for systems where the sampling frequency varies due to Y, Cr, and Cb requirements, such as component signals. Flag name fc mode Default HALF L Standard fc mode (CH-1, CH-2, CH-3 cutoff frequency is identical) H Half fc mode (CH-2, CH-3 cutoff frequency is 1/2 that of CH-1) (6) Filter bypass mode Register name: CONDITION2 Flag name: BYPASS This flag allows the internal lowpass filter in SM5309A to be bypassed. Even in filter bypass mode, the input type and multiplexer function can all be set just as in filter mode. However, the cutoff frequency and fc mode settings have no effect on the outputs. Flag name Filter Default BYPASS L Filter mode (signals pass through lowpass filter) H Filter bypass mode (signals bypass lowpass filter) SEIKO NPC CORPORATION —14 SM5309A Lowpass Filter The SM5309A has built-in 5th-order lowpass filters with variable cutoff frequency. The cutoff frequency range is set by the resistor (RISET) connected between ISET and GND, and the cutoff frequency setting is determined by FCDATA data. The cutoff frequency vs. FCDATA values are listed in table 2, and shown graphically in figure 1. Table 2. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ) FCDATA 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 FCSET (hex) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F Cutoff freq. [MHz] 4.00 4.18 4.35 4.51 4.67 4.84 5.00 5.16 5.32 5.48 5.64 5.80 5.96 6.12 6.28 6.44 6.58 6.74 6.89 7.05 7.20 7.36 7.51 7.67 7.82 7.97 8.12 8.28 8.43 8.58 8.73 8.89 9.01 9.16 9.31 9.46 9.61 9.76 9.90 10.05 10.20 10.35 10.49 10.64 10.79 10.94 11.08 11.22 11.36 11.51 11.65 11.80 11.94 12.08 12.23 12.37 12.51 12.65 12.80 12.94 13.08 13.22 13.36 13.51 FCDATA 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 FCSET (hex) 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Cutoff freq. [MHz] 13.61 13.75 13.89 14.03 14.17 14.31 14.44 14.58 14.72 14.85 14.99 15.12 15.26 15.40 15.53 15.67 15.80 15.94 16.07 16.20 16.34 16.48 16.61 16.74 16.88 17.01 17.14 17.28 17.42 17.55 17.68 17.81 17.93 18.06 18.19 18.31 18.44 18.58 18.71 18.84 18.97 19.10 19.23 19.36 19.49 19.62 19.75 19.88 20.01 20.13 20.26 20.39 20.52 20.64 20.77 20.90 21.03 21.15 21.28 21.41 21.54 21.66 21.79 21.92 FCDATA 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 FCSET (hex) 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF Cutoff freq. [MHz] 7.51 7.82 8.11 8.41 8.69 8.99 9.28 9.57 9.85 10.14 10.43 10.72 11.00 11.29 11.57 11.85 12.11 12.39 12.67 12.95 13.22 13.50 13.78 14.05 14.32 14.60 14.87 15.14 15.41 15.69 15.95 16.22 16.44 16.71 16.97 17.24 17.51 17.77 18.03 18.30 18.56 18.82 19.08 19.34 19.60 19.86 20.12 20.38 20.62 20.88 21.13 21.40 21.65 21.90 22.16 22.41 22.66 22.92 23.17 23.42 23.67 23.93 24.18 24.43 FCDATA 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 FCSET (hex) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Cutoff freq. [MHz] 24.61 24.86 25.11 25.35 25.60 25.85 26.09 26.34 26.58 26.82 27.07 27.32 27.56 27.80 28.04 28.28 28.52 28.76 28.99 29.24 29.48 29.72 29.96 30.21 30.44 30.66 30.89 31.12 31.36 31.59 31.81 32.04 32.23 32.45 32.68 32.90 33.17 33.42 33.68 33.93 34.19 34.44 34.69 34.94 35.20 35.44 35.70 35.96 36.20 36.45 36.70 36.96 37.20 37.45 37.70 37.96 38.20 38.44 38.70 38.95 39.21 39.46 39.72 40.00 SEIKO NPC CORPORATION —15 SM5309A 50 45 40 fc [MHz] 35 30 25 20 15 10 5 0 0 32 64 96 128 FCDATA 160 192 224 256 Figure 1. Cutoff frequency vs. FCDATA (RISET = 1.8kΩ) RISET RISET controls the internal current source, and its connection is essential. The recommended value (RISET) is 1.8kΩ. In power-down mode and filter bypass mode, no current flows into RISET. Note. A value other than 1.8kΩ will change the current consumption of SM5309A. In the determination of resistance value, caution should be taken to ensure the power dissipation does not exceed the absolute maximum rating for the package. Half fc Mode In half fc mode, the CH-2 and CH-3 cutoff frequency is 1/2 that of the CH-1 cutoff frequency setting. Half fc mode is useful for systems where the sampling frequency varies due to luminance (Y) and color difference signal (Cr, Cb) requirements as in component signals. Group Delay Characteristics The group delay varies with the cutoff frequency setting. Note also that in half fc mode, the group delay between CH-1 and CH-2/CH-3 varies. Filter Bypass Mode In filter bypass mode, the internal lowpass filter in SM5309A is bypassed and the signal is input to the output buffer stage directly. In filter bypass mode, the input type and multiplexer function are set just as for filter mode. But the cutoff frequency setting and fc mode setting have no effect on the outputs. In this mode, the passband frequency is 80MHz (typ), which can support SXGA-class signals. Input Multiplexer Switching (MUXSEL) The input multiplexer setting can also be set using the MUXSEL input. When set using the I2C-BUS, a certain amount of communication time is required, but the setting can be made using the MUXSEL input with arbitrary timing for high-speed switching. The input circuit of MUXSEL pin is placed in analog supply (VCC, GND) area. MUXSEL pin MUX flag Multiplexer selection*1 L: GND L INnA L: GND H INnB H: VCC L INnB H: VCC H INnB *1. n = 1, 2, 3 SEIKO NPC CORPORATION —16 SM5309A Power-ON Reset When power is applied, an internal power-ON reset circuit operates initializing the internal register flags to their default settings. At power-ON, all supplies should be applied simultaneously. Reference Voltage (REF) The REFn pins (n = 1, 2) are internal reference voltage outputs. A 10 µF capacitor connected between pin and ground is recommended for stability of movement. REF1 and REF2 are independent reference voltage outputs, and have no correspondence with settings of CH-1, CH-2, and CH-3. SEIKO NPC CORPORATION —17 SM5309A USAGE PRECAUTIONS Slave Address Setting When slave address 92h is used, the ADS pin pull-up to VCC. When slave address 94h is used, the ADS input must be left open circuit. In this case, an external resistor should be connected as shown in figure 2 to reduce the risk of malfunction in the I2C-BUS interface due to large spikes or other noise invaded from outside. The recommended value is 10kΩ. Direct Input Mode In direct input mode, the signal is connected to the input without an input capacitor. However, the input DC voltage range varies with the use situation, hence the signal must be appropriately biased for the use situation. If the input voltage exceeds “Direct mode input DC voltage range” (see “Analog input characteristics”), take care of harmonic distortion may occur in the output signal. (For defending device breakdown occur, input bottom voltage and top voltage should be set within the absolute maximum ratings.) VCC VCC VH 10k ADS Video Signal In INnA INnB 10k GND VL GND Slave address = 94h Figure 2. Slave address 94h setting Figure 3. Direct input mode Power Supply Invest Timing The SM5309A uses 2-type power supply, analog one (VCC) and I2C-BUS one (VDD). Therefore all power supply pins should be forced voltage at the same time power supply invested. In the case analog power supply and I2C-BUS one are set up separately, composing system the time-lag to makes short time as standard under 1ms is need. And if voltage of I2C-BUS interface power supply comes higher than one of analog power supply, it is necessary to set voltage of I2C-BUS interface power supply to make potential difference bellow 250mV as compared with voltage of analog one. SEIKO NPC CORPORATION —18 SM5309A TYPICAL CHARACTERISTICS Gain Phase 0.1 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Figure 8. Gain and Phase characteristics (half fc mode, FCDATA = 10) Group delay 0 20 40 60 80 Frequency [MHz] Gain Group delay 0 10 20 30 Frequency [MHz] 40 220 200 180 160 140 120 100 80 60 40 20 0 Gain [dB] Group delay [ns] Group delay [ns] 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Figure 7. Gain and Group delay characteristics (standard fc mode, FCDATA = 10) Phase [deg] Gain [dB] Figure 6. Gain and Phase characteristics (standard fc mode, FCDATA = 10) 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Gain 220 200 180 160 140 120 100 80 60 40 20 0 100 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Gain Group delay 0 10 20 30 Frequency [MHz] 40 220 200 180 160 140 120 100 80 60 40 20 0 Group delay [ns] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Phase [deg] Gain [dB] 6 0 Gain –6 –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 1 10 Frequency [MHz] 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Figure 5. Gain and Group delay characteristics (filter bypass mode) Figure 4. Gain and Phase characteristics (filter bypass mode) Gain [dB] 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Gain [dB] Gain [dB] 6 0 Gain –6 –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 Phase [deg] VCC = 5.0V, VDD = 3.0 to 5.5V, Ta = 25°C, fin = 100kHz, VIN = 1.0Vp-p, RISET = 1.8kΩ, RL = 300Ω, unless otherwise noted. Figure 9. Gain and Group delay characteristics (half fc mode, FCDATA = 10) SEIKO NPC CORPORATION —19 6 0 Gain –6 –12 –18 Phase –24 –30 –36 –42 –48 –54 –60 0.1 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Phase [deg] Gain [dB] Figure 10. Gain and Phase characteristics (standard fc mode, FCDATA = 227) Figure 12. Gain and Phase characteristics (half fc mode, FCDATA = 227) Gain Group delay 0 10 20 30 40 50 Frequency [MHz] 60 220 200 180 160 140 120 100 80 60 40 20 0 Group delay [ns] Gain [dB] 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Figure 11. Gain and Group delay characteristics (standard fc mode, FCDATA = 227) 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 Gain Group delay 0 10 20 30 40 50 Frequency [MHz] 60 220 200 180 160 140 120 100 80 60 40 20 0 Group delay [ns] 1 10 Frequency [MHz] 360 270 180 90 0 –90 –180 –270 –360 –450 –540 –630 100 Gain [dB] 6 0 Gain –6 –12 –18 –24 Phase –30 –36 –42 –48 –54 –60 0.1 Phase [deg] Gain [dB] SM5309A Figure 13. Gain and Group delay characteristics (half fc mode, FCDATA = 227) SEIKO NPC CORPORATION —20 (Bypass mode) 6 0 –6 –12 –18 –24 –30 –36 –42 –48 –54 –60 0.1 90 (Bypass mode) 0 –90 (1) (2) (3) (4) Phase [deg] Gain [dB] SM5309A –180 –270 (4) (3) (2) (1) –360 –450 –540 1 10 Frequency [MHz] 100 –630 0.1 1 10 Frequency [MHz] 100 Figure 15. Phase vs. FCDATA, fc mode FCDATA fc mode FCDATA fc mode (1) 227 standard (1) 227 standard (2) 227 half (2) 227 half (3) 10 standard (3) 10 standard (4) 10 half (4) 10 half Group delay [ns] Figure 14. Gain vs. FCDATA, fc mode 220 200 180 160 140 120 100 80 60 40 20 0 (4) (3) (2) (1) (Bypass mode) 0 10 20 30 40 50 Frequency [MHz] 60 Figure 16. Group delay vs. FCDATA, fc mode FCDATA fc mode (1) 227 standard (2) 227 half (3) 10 standard (4) 10 half SEIKO NPC CORPORATION —21 100 90 80 70 60 50 40 30 20 10 0 4.5 *2 ICC2 ICC1*1 ICC [mA] ICC [mA] SM5309A ICC3*3 4.75 5 5.25 VCC [V] *1. filter mode, FCDATA = 0 *2. filter mode, FCDATA = 255 *3. filter bypass mode 20 40 60 80 100 Ta [°C] *1. filter mode, FCDATA = 0 *2. filter mode, FCDATA = 255 *3. filter bypass mode 5.5 Figure 18. ICC1, 2, 3 vs. Ta ICC4 [mA] ICC4 [mA] Figure 17. ICC1, 2, 3 vs. VCC 0.5 0.45 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 4.5 4.75 5 VCC [V] 5.25 100 90 ICC2*2 80 70 60 ICC1*1 50 40 ICC3*3 30 20 10 0 –40 –20 0 5.5 0.5 0.45 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 –40 –20 20 40 Ta [°C] 60 80 100 Figure 20. ICC4 vs. Ta 1 1 0.5 0.5 Gain [dB] Gain [dB] Figure 19. ICC4 vs. VCC 0 0 0 –0.5 –0.5 –1 4.5 4.75 5 5.25 VCC [V] Figure 21. Gain vs. VCC 5.5 –1 –40 –20 0 20 40 Ta [°C] 60 80 100 Figure 22. Gain vs. Ta SEIKO NPC CORPORATION —22 SM5309A 4.5 4 4.5 4 3.5 3.5 3 VOUT [V] VOUT [V] 3 2.5 2 2.5 2 1.5 1.5 1 1 0.5 0.5 0 0 1 2 3 VIN [V] 4 Figure 23. VIN vs. VOUT (filter mode, direct mode) 5 0 0 1 2 3 VIN [V] 4 5 Figure 24. VIN vs. VOUT (filter bypass mode, direct mode) SEIKO NPC CORPORATION —23 SM5309A Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from SEIKO NPC CORPORATION (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SEIKO NPC CORPORATION 1-9-9, Hatchobori, Chuo-ku, Tokyo 104-0032, Japan Telephone: +81-3-5541-6501 Facsimile: +81-3-5541-6510 http://www.npc.co.jp/ Email: [email protected] NC0604CE 2007.04 SEIKO NPC CORPORATION —24