EV020-5-S-00D 85VAC~265VAC/50Hz, 18V/0.3A, 5V/0.1A Off-line Primary-side-Regulator, Dual Outputs Evaluation Board for Small Appliances Evaluation Board Report Dual Output 5.9W AC-DC power supply Design Specs Input Voltage Output 1 Output 2 Isolation MPS IC Value 85-265 Unit VAC 18V, 0.3A 5V, 0.1A YES MP020-5GS Small Appliances AC-DC power supply with additional 5V output Application Document Number EBXXX Author Application Engineering Department Date Nov, 2014 Revision 1.0 Design Summary EV020-5-S-00D evaluation board provides a reference design for a universal offline power supply with 18V, 0.3A and 5V, 0.1A output. It contains the complete specification of the power supply, a detailed circuit diagram, the entire bill of materials required to build the power supply, drawing of the power inductors and transformers, and test data of the most important performance. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 1 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES DESCRIPTION FEATURES The EV020-5-S-00D Evaluation Board is designed to demonstrate the capabilities of MP020-5. The MP020-5 is a primary-side-control regulator which can eliminates secondary feedback components. • The EV020-5-S-00D is typically designed for small appliances which output 18V/0.3A and 5V/0.1A load from 85VAC to 265VAC, 50HZ/60HZ. The EV020-5-S-00D has an excellent efficiency and meets IEC61000-4-5 surge immunity and EN55022 conducted EMI requirements. It has multi-protection function as open circuit protection, short-circuit protection, cycle by cycle current limit and over-temperature protection, etc. ELECTRICAL SPECIFICATION Parameter Symbol Value Units 85 to 265 18 0.3 5 VAC V A V Input Voltage Output Voltage 1 Output Current 1 Output Voltage 2 V IN V OUT1 I OUT1 V OUT2 Output Current 2 I OUT2 0.1 A Output Power P OUT 5.9 W η >75 % Efficiency (full load) • • • • • • • • Primary-Side–Control without Opto-Coupler or Secondary Feedback Circuit Precise Constant Voltage Control (CV) Integrated 700V MOSFET with Minimal External Components Variable, Off-Time, Peak-Current Control 550µA High-Voltage Current Source Programmable Cable Compensation (By adding 1μF/25V ceramic cap at CP pin) Multiple Protections: OVP, OCP, OCkP, OTP, and VCC UVLO Natural Spectrum Shaping for Improved EMI Signature Low Cost and Simple External circuit All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology”, are Registered Trademarks of Monolithic Power Systems, Inc. Warning: Although this board is designed to satisfy safety requirements, the engineering prototype has not been agency approved. Therefore, all testing should be performed using an isolation transformer to provide the AC input to the prototype board. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 2 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EV020-5-S-00D EVALUATION BOARD TOP VIEW BOTTOM VIEW (L x W x H) 47mm x 30mm x 17mm Board Number MPS IC Number EV020-5-S-00D MP020-5GS EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 3 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EVALUATION BOARD SCHEMATIC FR1 10/1W 85VAC~265VAC L N CR1 600V/0.5A L1 R1 C1 10uF/400V PGND GND GND U1 R3 150K/1206 FR107 1000V/1A VCC GND FB CP 1 2 3 4 R2 357/1206 C2 D1 4.7uF/400V PGND 1000uH/0.25A 10K/0805 5 6 8 Drain MP020-5/SOIC8-7A C4 0 PGND 1 3 4 5 Np Np_au R5 28.7K/1% R6 13.7K/1% T1 PGND 8 Nsec2 6 Nsec1 10 EE16 Lp=1.8mH Np:Np_au:Nsec1:Nsec2=134:16:17:7 22uF/50V C6 PGND C3 470pF/1000V D2 BAV21W 200V/0.2A R4 10/1206 C5 1uF/25V R7 CY1 1nF/ 4000V 20 D3 D4 C7 100pF 250V C8 220uF 25V C9 100uF 10V ES1D B140 AGND C10 1uF 10V C11 1uF 25V R8 5.1K 1206 AGND R9 20K/1206 Vo2 5V/0.1A AGND Vo1 AGND 18V/0.3A AGND Figure 1—Schematic 4 EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES PCB LAYOUT (SINGLE-SIDED) Figure 2—Top Layer Figure 3—Bottom Layer EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 5 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES CIRCUIT DESCRIPTION The EV020-5-S-00D is configured in a single-stage Flyback topology, it uses primary-side-control which can mostly simplify the schematic and get a cost effective BOM. It can also achieve accurate constant voltage and acceptable cross regulation. FR1 and CR1 compose the input stage. FR1 is used to protect for the component failure or some excessive short events, also it can restrain the inrush current. C1, L1 and C2 compose π filter to guarantee the conducted EMI meet standard EN55022. R1 paralleled with L1 is used to damp resonant between L1 and C1, C2. R2, R3, D1 and C3 compose the snubber circuit to reduce drain-source voltage spike. R4, C5, C6 and D2 are used as Vcc power supply. C5 is high frequency decoupling capacitor and should be placed with Vcc pin as near as possible. R5 and R6 are resistor divider for detecting output voltage by sampling voltage on primary auxiliary winding. D3 is rectifier for 18V output. Schottky diode is recommended for better efficiency and regulation.C7 and R7 are composed snubber for D3, which is to restrain the voltage spike between D3. C8 and C11 are output capacitors for 18V output. C8 should be low ESR electrolytic capacitor for better load regulation. C11 is ceramic capacitor to reduce high frequency voltage ripple. R9 is dummy load to lower the output voltage of 18V rail at no load condition. D4 is rectifier for 5V output. Schottky diode is recommended for better efficiency and regulation. Due to the output current is low at this rail and there is no obvious spike on D4, so no RC snubber is needed. C9 and C10 are output capacitors for 5V output. C9 should be low ESR electrolytic capacitor for better load regulation. C10 is ceramic capacitor to reduce high frequency voltage ripple. R8 is dummy load to lower the output voltage of 5V rail at no load condition. CY1 is Y capacitor lowering common mode noise to make sure there is enough EMI margin. T1 is power transformer, the structure of which is also very important to pass EMI test. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 6 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EV020-5-S-00D BILL OF MATERIALS Qty 1 1 1 1 1 1 1 1 1 1 1 Ref C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 Value 10μF 4.7μF 470pF 0 1μF 22μF 100pF 220μF 100μF 1μF 1μF Description Capacitor;400V;20% Capacitor;400V;20% Ceramic Capacitor;1000V;U2J Shorted Ceramic Capacitor;25V;X7R Electrolytic Capacitor;50V Ceramic Capacitor;250V;COG Electrolytic Capacitor;25V Electrolytic Capacitor;10V Ceramic Capacitor;10V;X7R Ceramic Capacitor;25V;X7R 1 CR1 MB6F Diode;600V;0.5A 1 1 1 CY1 D1 D2 1nF FR107 BAV21W 1 D3 ES1D 1 D4 1 1 1 1 1 1 1 1 1 1 1 B140 FKN1WSJT FR1 -52-10R L1 1000μH R1 10kΩ R2 357Ω R3 150kΩ R4 10Ω R5 28.7kΩ R6 13.7kΩ R7 20Ω R8 5.1kΩ R9 20kΩ 1 T1 1 U1 MP020-5 Y Capacitor;4000V;20% Diode;1000V;1A Diode;200V;0.2A; Diode;200V;1A; Schottky Diode;40V;1A; Package Manufacturer DIP Ltec DIP Beryl 1206 muRata 0603 DIP 0805 DIP DIP 0603 1206 muRata Jianghai Murata Lelon Jianghai Murata TDK Taiwan SOP-4 Semiconductor DIP Hongke DO-41 Diodes SOD-123 Diodes Taiwan SMA Semiconductor SMA Diodes Manufacturer_P/N TY Series 10uF/400V 4.7μF/400V GRM31B7U3A471JW31L GRM188R71E105KA12D CD281L-50V22 GRM21A5C2E101JW01D RXW221M1EBK-0811P HCN1A101MB12 GRM188R71A105KA61D C3216X7R1E105K MB6F JN09E102MY02N FR107 BAV21W-7-F ES1D B140 Fusible Resistor ;10Ω/1W DIP Yageo FKN1WSJT-52-10R Inductor;1000μH;6Ω;0.25A Film Resistor;5%; Film Resistor;1%;1/4W Film Resistor;1%; Film Resistor;5% Film Resistor;1%; Film Resistor;1% Film Resistor;5%;1/4W Film Resistor;5%;1/4W Resistor;5%; 1/4W EE16 Transformer, Lp=1.8mH Np:Np_au:Nsec1:Nsec2 =134:16:17:7 Primary Side Regulator DIP 0805 1206 1206 1206 0603 0603 1206 1206 1206 Wurth Yageo Yageo Panasonic Yageo Yageo Yageo 7447462102 RC0805JR-0710KL RC1206FR-07357RL ERJ8ENF1503V RC1206JR-0710R RC0603FR-0728K7L RC0603FR-0713K7L 1206J0200T5E CR06T05NJ5K1 CR1206J40203G EE16 Emei FX0294 SOIC8-7A MPS MP020-5GS R3 LIZ LIZ EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 7 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES TRANSFORMER SPECIFICATION Electrical Diagram PRI 1 SEC1 N1 22Ts NC N2 3 5 6 SEC2 N5 16Ts 4 17Ts N3 134Ts 10 N4 7Ts 8 N6 16Ts NC 6 WINDING START Figure 4—Transformer Electrical Diagram Notes: 1. N1 is with 2 wires which are paralleled together. 2. N3 and N4 are both triple insulation wires. 3. One layer tape is between each layer winding. 3 layers tape is at the outside of last winding Winding Diagram 4 NC 4 5 2 3 2 3 2 3 2 3 2 3 2 3 N6: 0.15mm×1P×16Ts N5: 0.15mm×1P×16Ts 6 8 10 N4: 0.4mm×1P×7Ts TIW N3: 0.32mm×1P×17Ts TIW 1 N2: 0.15mm×1P×134Ts 3 1 NC N1: 0.15mm×2P×22Ts Figure 5—Winding Diagram EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 8 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES Winding Order Tapes (T) Winding Start-End Wire Diameter (Ø) N1 1—〉NC N2 Turns ( T ) Tube 0.15mm*2 22 None 3—〉1 0.15mm*1 134 None N3 10—〉6 0.32mm*1 TIW 17 None N4 6—〉8 0.4mm*1 TIW 7 None N5, N6 5—〉4 4—〉NC 0.15mm*1 0.15mm*1 16 16 None 0 1 1 1 3 Electrical Specifications Electrical Strength Primary Inductance Primary Leakage Inductance 60 second, 60Hz, from PRI. to SEC. 60 second, 60Hz, from PRI. to CORE. 3000VAC 500VAC 60 second, 60Hz, from SEC. to CORE. Pins 1 - 3, all other windings open, measured at 60kHz, 0.1 VRMS Pins 1 - 3 with all other pins shorted, measured at 60kHz. 0.1 VRMS 3000VAC 1.8mH±10% 50μH±10% Materials Item 1 2 3 4 5 6 7 8 Description Core: EE16, UI=2300±25%, AL=73.2.4nH/N2±3% GAPPED, or equivalent Bobbin: EE16, 5+5PIN 1 SECT TH, UL94V-0 Wire:Φ0.15mm,, 2UEW, Class B Triple Insulation Wire: Φ0.40mm, TIW Triple Insulation Wire: Φ0.32mm TIW Tape: 8.0mm(W)×0.06mm(TH) Varnish: JOHN C. DOLPH CO, BC-346A or equivalent Solder Bar: CHEN NAN: SN99.5/Cu0.5 or equivalent EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 9 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EVB TEST RESULTS Performance Data Ta=25℃, unless otherwise noted. Efficiency and Load/Line Regulation (Test at the end of board) 0.03097 17.83 0 4.95 0 0.00% V OUT1 Regulation -0.94% 7.2945 17.6 0.3 5 0.1 79.23% -2.22% 0.00% 1.3279 17.74 0.03 4.7 0.1 75.47% -1.44% -6.00% 0.72949 17.54 0.03 5.04 0.005 75.59% -2.56% 0.80% 6.6718 17.54 0.3 5.11 0.005 79.25% -2.56% 2.20% V OUT2 Regulation -1.00% Pin (W) V OUT1 (V) I OUT1 (A) V OUT2 (V) I OUT2 (A) Efficiency Vin=85Vac/60Hz V OUT2 Regulation -1.00% 0.03423 17.81 0 4.95 0 0.00% V OUT1 Regulation -1.06% Vin=115Vac/60Hz 7.0858 1.3112 17.57 0.3 4.99 0.1 79.22% -2.22% -0.20% 17.71 0.03 4.69 0.1 76.29% -1.61% -6.20% 0.7226 17.54 0.03 5.02 0.005 76.29% -2.56% 0.40% 6.4962 17.54 0.3 5.11 0.005 81.39% -2.56% 2.20% V OUT2 Regulation -0.80% Pin (W) V OUT1 (V) I OUT1 (A) V OUT2 (V) I OUT2 (A) Efficiency 0.03952 17.86 0 4.96 0 0.00% V OUT1 Regulation -0.78% Vin=230Vac/50H 7.0653 1.3211 17.6 0.3 5 0.1 81.81% -2.22% 0.00% 17.74 0.03 4.69 0.1 75.79% -1.44% -6.20% 0.72883 17.53 0.03 5.02 0.005 75.60% -2.61% Δ 0.40% 6.471 17.56 0.3 5.12 0.005 81.80% -2.44% 2.40% V OUT2 Regulation -1.00% Pin (W) V OUT1 (V) I OUT1 (A) V OUT2 (V) I OUT2 (A) Efficiency 0.04261 17.82 0 4.95 0 0.00% V OUT1 Regulation -1.00% Vin=265Vac/50Hz 7.0915 1.3332 17.59 0.3 5 0.1 81.46% -2.28% 0.00% 17.71 0.03 4.68 0.1 74.95% -1.61% -6.40% Δ 0.73666 17.54 0.03 5.02 0.005 74.84% -2.56% 0.40% 6.5233 17.57 0.3 5.12 0.005 81.20% -2.39% 2.40% Pin (W) V OUT1 (V) I OUT1 (A) V OUT2 (V) I OUT2 (A) Efficiency Notes: 1. The red triangle means the worst case in table. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 10 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES No Load Consumption No Load Power (mW) No Load Power Consumption 50 45 40 35 30 25 20 50 100 150 200 250 300 Input AC Voltage (V) Electric Strength Test Primary circuit to secondary circuit electric strength testing was completed according to IEC61000-4-2. Input and output was shorted respectively. 3000VAC/50Hz sine wave applied between input and output for 1min, and operation was verified. Surge Test Line to Line 1kV and Line to Power Earth 1kV surge testing was completed according to IEC61000-4-5. Input voltage was set at 230VAC/50Hz. Output was loaded at full load and operation was verified following each surge event. Surge Level (V) Input Voltage (VAC) Injection Location Injection Phase (°) Test Result (Pass/Fail) 1000 -1000 1000 -1000 1000 -1000 230 230 230 230 230 230 L to N L to N L to PE L to PE N to PE N to PE 90 270 90 270 90 270 Pass Pass Pass Pass Pass Pass EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 11 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES Conducted EMI Test Test with 230Vac input and full load condition 230Vac, 50Hz, Maximum Load, L Line, Output GND floats, EN55022 Limits 230Vac, 50Hz, Maximum Load, N Line, Output GND floats, EN55022 Limits EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 12 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES Test with 115Vac input and full load condition 115Vac, 60Hz, Maximum Load, L Line, Output GND floats, EN55022 Limits 115Vac, 60Hz, Maximum Load, N Line, Output GND floats, EN55022 Limits EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 13 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES Thermal Test Test is conducted at ambient temperature of 25oC, 85Vac/60Hz input. Top Layer PCB is heated by MP020-5 at the bottom layer Bottom Layer EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 14 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EVB TEST RESULTS Performance waveforms are tested on the evaluation board. V IN =115VAC/60Hz, V OUT1 =18V, I OUT1 =0.3A, V OUT2 =5V, I OUT2 =0.1A, CC Mode Load, T A=25°C. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 15 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES EVB TEST RESULTS (continued) Performance waveforms are tested on the evaluation board. V IN =230VAC/50Hz, V OUT1 =18V, I OUT1 =0.3A, V OUT2 =5V, I OUT2 =0.1A, CC Mode Load, T A=25°C. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 16 EV020-5-S-00D – UNIVERSAL INPUT, DUAL OUTPUTS FOR SMALL APPLIANCES QUICK START GUIDE 1. Preset Power Supply to 85VAC ≤ V IN ≤ 265VAC. 2. Turn Power Supply off. 3. Connect the Line and Neutral terminals of the power supply output to L and N port. For three-wire input application, make OUTPUT GND connected to Earth. 4. Connect Different Load to Corresponding Outputs : a. Positive 1 (+): 18V OUT b. Positive 2 (+): 5V OUT c. Negative (–): GND 5. Turn Power Supply on after making connections. Contact Information To request this evaluation board, please refer to your local sales offices which can be found from: http://www.monolithicpower.com/Company/Contact-Us Disclaimer Monolithic Power Systems (MPS) reserves the right to make changes to its products and to discontinue products without notice. The applications information, schematic diagrams, and other reference information included herein is provided as a design aid only and are therefore provided as-is. MPS makes no warranties with respect to this information and disclaims any implied warranties of merchantability or non-infringement of third-party intellectual property rights. MPS cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a MPS product. No circuit patent licenses are implied. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (“Critical Applications”). MPS PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE‑SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR OTHER CRITICALAPPLICATIONS. Inclusion of MPS products in critical applications is understood to be fully at the risk of the customer. Questions concerning potential risk applications should be directed to MPS. MPS semiconductors are typically used in power supplies in which high voltages are present during operation. High voltage safety precautions should be observed in design and operation to minimize the chance of injury. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. EV020-5-S-00D Rev.1.0 www.MonolithicPower.com 3/31/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 17