Ordering number : ENA0792A LV8019LP Bi-CMOS IC Forward/Reverse Motor Driver http://onsemi.com Overview The LV8019LP is a forward/reverse motor driver. Features • One H-bridge driver channel • Provides a constant current output • Built-in thermal shutdown circuit Specifications Maximum Ratings at Ta = 25°C and SGND = PGND = 0V Parameter Symbol Conditions Ratings Unit Output block supply voltage VM max -0.5 to 8.4 V Control block supply voltage VCC max -0.5 to 7.0 V Constant current output block VRG max -0.5 to 6.0 supply voltage Maximum output current IO max V 1.2 A IO peak1 t ≤ 200ms, f = 2Hz 3 A IO peak2 t ≤ 10ms, f = 2Hz 5 A Input signal voltage VIN max Allowable power dissipation Pd max1 Independent IC Pd max2 When mounted on a circuit board *1 -0.5 to VCC+0.5 A 0.2 W 1.05 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C * : Specified substrate : 40×50×0.8mm3, glass epoxy four-layer (2S2P) board Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 May, 2013 22008 MS 20080204-S00007 / 41807 MS PC 20070406-S00004 No.A0792-1/6 LV8019LP Recommended Operating Conditions at Ta = 25°C and SGND = PGND = 0V Parameter Symbol Conditions Ratings Unit Output block supply voltage VM 3.0 to 7.4 V Control block supply voltage VCC 2.7 to 6.0 V Constant current output block VRGIN 1.5 to VCC V 0 to VCC V supply voltage Input signal voltage VIN Maximum input signal frequency fmax Duty = 50% 100 kHz Electrical Characteristics Ta = 25°C, VCC = VM = 5V, and SGND = PGND = 0V unless otherwise specified. Parameter Symbol Ratings Conditions min Standby mode output block IMO EN = 0V, IN1 = IN2 = ICTRL = 0V ICCO EN = 0V, IN1 = IN2 = ICTRL = 0V typ Unit max 1.0 μA 0 1.0 μA 0.8 1.3 mA current consumption Control block Standby current mode consumption Operation ICC EN = 5V mode High-level input voltage VINH IN* 2.5 VCC V Low-level input voltage VINL IN* 0 0.8 V High-level input current IINH IN* 1.0 μA Low-level input current IINL IN* -1.0 High-level EN pin current IENH EN 15 Low-level EN pin current IENL EN μA 25 35 μA 1.0 μA Output on 1 RON1 VM = 5V, sink + source 0.30 0.40 Ω resistance 2 RON2 VM = 3V, sink + source 0.45 0.60 Ω 1.05 1.20 Ω ISET setting resistance RSET Between ISET pin and SGND ISET pin voltage VISET RSET > 80Ω CC pin output saturation voltage VCSAT RSET = 150Ω *1 1.5 V CC pin output leakage current ICONL CTRL = 0V 1.0 μA Low voltage shutdown operation VLVD VCC pin voltage detection 2.35 2.60 V 0.1 1.0 μs 0.2 2.0 μs 80 0.90 2.10 V voltage High-level output turn-on time TOH The transition from 10% to 90% of the output amplitude *2 Low-level output turn-on time TOL The transition from 90% to 10% of the output amplitude *2 Thermal shutdown temperature Thermal shutdown hysteresis TSD *2 ΔTSD *2 150 180 °C 40 °C *1 : Voltage between CC pin and ISET pin *2 : Design guarantee: These characteristics are not measured. No.A0792-2/6 LV8019LP Package Dimensions unit : mm (typ) 3321 Pd max – Ta Allowable power dissipation, Pd max – W 1.5 BOTTOM VIEW 13 0.35 0.35 3.5 18 19 0.4 3.5 12 24 0.75 TOP VIEW 7 6 1 0.75 0.0NOM TOP VIEW 0.85MAX 0.2 1.05 1.0 Specified circuit board : 40×50×0.8mm3, glass epoxy four-layer (2S2P) board Mounted on the specified circuit board 0.55 0.5 0.20 Independent IC 0.10 0 – 30 0 30 60 90 120 Ambient temperature, Ta – °C SANYO : VQLP24(3.5X3.5) OUT1 PGND PGND PGND PGND OUT2 24 23 22 21 20 19 Pin Assignment OUT1 1 18 OUT2 OUT1 2 17 OUT2 VM 3 16 VM (TOP VIEW) 12 EN IN2 13 11 6 IN1 NC 10 SGND ICTRL 14 9 5 NC VCC 8 VM ISET 15 7 4 CC VM Constant current output CC ISET Constant current resistance No.A0792-3/6 LV8019LP Block Diagram OUT1 OUT1 OUT1 OUT2 OUT2 OUT2 VM VM VM VM PGND PGND PGND PGND PREDRIVE VCC LOW VOLTAGE SHUTDOWN SGND CONTROL LOGIC for H Bridge TSD CONSTANT CURRENT CIRCUIT ENABLE EN IN1 IN2 ICTRL ISET CC Truth Table EN IN1 IN2 CTRL OUT1 OUT2 CC Mode H H H X L L X Break H H L X H L X Forward H L H X L H X Reverse H L L X Z Z X Standby L X X X L L L Standby H X X L X X Z Constant current H X X H X X ON Constant current output off output on H : High level L : Low level Z : Hi-impedance X : Don't care No.A0792-4/6 LV8019LP Pin Functions Pin No. Pin 11 IN1 Logic input 1 Description 12 IN2 Logic input 2 Equivalent circuit VCC The output is set by the combination of the input 1 and 2 states. See the truth table for details. 10 ICTRL Controls the output on/off state of the constant current block. 10kΩ IN1 IN2 ICTRL S-GND 13 EN EN pin Controls the on/off state of the H-bridge output VCC (OUT1 and OUT2) and the constant current output. See the truth table for details. 10kΩ EN 200kΩ S-GND 1, 2, 24, OUT1 Output 1 17, 18, 19 OUT2 Output 2 VM The source side is a p-channel transistor and sink side is an n-channel transistor. OUT* PGND 7 CC Constant current output 8 ISET Constant current setting VCC The output current (CC) is set by connecting a resistor between the ISET pin and ground. CC SGND VCC ISET SGND 5 VCC Signal system power supply VCC 3, 4, 15, 16 VM Power system power supply VM 14 SGND Signal system ground SGND 21, 22, 23 PGND Power system ground PGND No.A0792-5/6 LV8019LP Application Example M 19 20 21 14 6 13 SIGNAL IN NC 12 5 SIGNAL IN 15 11 4 SIGNAL IN 16 10 3 SIGNAL IN 17 150Ω VM=6.8V 22 2 9 18 7 NC 1 8 VCC=5V 23 24 VM=6.8V ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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