μPA2793AGR

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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μ PA2793AGR
SWITCHING
N- AND P-CHANNEL POWER MOS FET
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The μ PA2793AGR is N- and P-channel MOS Field Effect
Transistors designed for Motor Drive application.
8
5
N-channel 1 : Source 1
2 : Gate 1
7, 8: Drain 1
FEATURES
• Low on-state resistance
P-channel 3 : Source 2
4 : Gate 2
5, 6: Drain 2
N-channel RDS(on)1 = 15 mΩ MAX. (VGS = 10 V, ID = 3.5 A)
RDS(on)2 = 23 mΩ MAX. (VGS = 4.5 V, ID = 3.5 A)
P-channel RDS(on)1 = 26 mΩ MAX. (VGS = −10 V, ID = −3.5 A)
Ciss = 2200 pF TYP.
• Built-in gate protection diode
• Small and surface mount package (Power SOP8)
4.4
5.37 MAX.
0.8
+0.10
–0.05
0.05 MIN.
P-channel
6.0 ±0.3
4
0.15
N-channel Ciss = 2200 pF TYP.
1.44
• Low input capacitance
1.8 MAX.
RDS(on)2 = 36 mΩ MAX. (VGS = −4.5 V, ID = −3.5 A)
1
0.5 ±0.2
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.10
0.12 M
ORDERING INFORMATION
PART NUMBER
μ PA2793AGR-E1-AT
Note
μ PA2793AGR-E2-AT
Note
LEAD PLATING
PACKING
PACKAGE
Pure Sn
Tape 2500 p/reel
Power SOP8
Note Pb-free (This product does not contain Pb in external electrode and other parts.)
EQUIVALENT CIRCUITS
N-channel
P-channel
Drain
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Body
Diode
Gate
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G19921EJ1V0DS00 (1st edition)
Date Published August 2009 NS
Printed in Japan
2009
μ PA2793AGR
ABSOLUTE MAXIMUM RATINGS (TA = 25°C. All terminals are connected.)
PARAMETER
SYMBOL
N-CHANNEL
P-CHANNEL
UNIT
Drain to Source Voltage (VGS = 0 V)
VDSS
40
−40
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
m20
V
Drain Current (DC)
ID(DC)
±7
m7
A
ID(pulse)
±28
m28
A
Drain Current (pulse)
Note1
Total Power Dissipation (1 unit)
Note2
Total Power Dissipation (2 units)
Note2
Channel Temperature
Storage Temperature
PT1
1.7
W
PT2
2.0
W
Tch
150
°C
Tstg
−55 to +150
°C
Single Avalanche Current
Note3
IAS
Single Avalanche Energy
Note3
EAS
−7
7
4.9
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2
2. Mounted on ceramic substrate of 2000 mm x 1.6 mm
3. Starting Tch = 25°C, VDD = 20 V, RG = 25 Ω, L = 100 μH, VGS = 20 → 0 V
2
Data Sheet G19921EJ1V0DS
A
mJ
μ PA2793AGR
ELECTRICAL CHARACTERISTICS (TA = 25°C. All terminals are connected.)
N-channel
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
10
μA
±10
μA
2.5
V
Zero Gate Voltage Drain Current
IDSS
VDS = 40 V, VGS = 0 V
Gate Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
VGS(off)
VDS = 10 V, ID = 1 mA
1.5
2.0
| yfs |
VDS = 10 V, ID = 3.5 A
4
8.5
RDS(on)1
VGS = 10 V, ID = 3.5 A
12
15
mΩ
RDS(on)2
VGS = 4.5 V, ID = 3.5 A
16.5
23
mΩ
Input Capacitance
Ciss
VDS = 10 V,
2200
pF
Output Capacitance
Coss
VGS = 0 V,
320
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
190
pF
Turn-on Delay Time
td(on)
VDD = 20 V, ID = 3.5 A,
9.2
ns
Rise Time
tr
VGS = 10 V,
22
ns
Turn-off Delay Time
td(off)
RG = 0 Ω
54
ns
Fall Time
tf
10
ns
Total Gate Charge
QG
ID = 7 A,
40
nC
Gate to Source Charge
QGS
VDD = 32 V,
6
nC
QGD
VGS = 10 V
12
nC
VF(S-D)
IF = 7 A, VGS = 0 V
0.8
Reverse Recovery Time
trr
IF = 7 A, VGS = 0 V,
27
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/μs
21
nC
Gate to Source Cut-off Voltage
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
Gate to Drain Charge
Body Diode Forward Voltage
Note
S
1.5
V
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
D.U.T.
L
50 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
RL
RG
PG.
VDD
VGS
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS
90%
IAS
VDS
ID
VDS
0
10%
10%
tr
td(off)
Wave Form
τ
VDD
Starting Tch
90%
VDS
VGS
0
BVDSS
τ = 1 μs
Duty Cycle ≤ 1%
td(on)
ton
tf
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
50 Ω
RL
VDD
Data Sheet G19921EJ1V0DS
3
μ PA2793AGR
P-channel
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
IDSS
VDS = −40 V, VGS = 0 V
−10
μA
Gate Leakage Current
IGSS
VGS = m20 V, VDS = 0 V
m10
μA
VGS(off)
VDS = −10 V, ID = −1 mA
−1.0
−1.7
−2.5
V
| yfs |
VDS = −10 V, ID = −3.5 A
5
11
RDS(on)1
VGS = −10 V, ID = −3.5 A
21
26
mΩ
RDS(on)2
VGS = −4.5 V, ID = −3.5 A
24
36
mΩ
Input Capacitance
Ciss
VDS = −10 V,
2200
pF
Output Capacitance
Coss
VGS = 0 V,
350
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
260
pF
Turn-on Delay Time
td(on)
VDD = −20 V, ID = −3.5 A,
10
ns
Rise Time
tr
VGS = −10 V,
18
ns
Turn-off Delay Time
td(off)
RG = 0 Ω
150
ns
Fall Time
tf
26
ns
Total Gate Charge
QG
ID = −7 A,
45
nC
Gate to Source Charge
QGS
VDD = −32 V,
5.2
nC
QGD
VGS = −10 V
12
nC
VF(S-D)
IF = 7 A, VGS = 0 V
Reverse Recovery Time
trr
IF = −7 A, VGS = 0 V,
54
ns
Reverse Recovery Charge
Qrr
di/dt = −50 A/μs
25
nC
Gate to Source Cut-off Voltage
Forward Transfer Admittance
Note
Drain to Source On-state Resistance
Note
Gate to Drain Charge
Body Diode Forward Voltage
Note
S
0.84
1.5
V
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
D.U.T.
L
RL
50 Ω
PG.
VGS = −20 → 0 V
VDD
RG
PG.
VGS(−)
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS(−)
−
IAS
BVDSS
VDS
ID
VGS(−)
0
VDS
Wave Form
τ
VDD
Starting Tch
τ = 1 μs
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG.
4
IG = −2 mA
RL
50 Ω
VDD
Data Sheet G19921EJ1V0DS
VDS
90%
90%
10% 10%
0
td(on)
tr td(off)
ton
tf
toff
μ PA2793AGR
TYPICAL CHARACTERISTICS (TA = 25°C)
(1) N-channel
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
2.5
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
120
100
80
60
40
20
Mounted on ceramic
substrate of
2000 mm2 x 1.6 mm
2 units
2
1 unit
1.5
1
0.5
0
0
0
20
40
60
80
0
100 120 140 160
20
TA - Ambient Temperature - °C
40
60
80
100 120 140 160
TA - Ambient Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
100
ID(pulse)
=
ID(DC)
1i
i
at
io
D
n
s
si
p
m
is
s
1
s
i
i
er
D
i
m
0
10
Po
w
m
10
1i 0
C
Li
m
it e
d
Secondary Breakdown Limited
0.1
Single pulse
Mounted on ceramic substrate of
2000 mm2 x 1.6 mm
0.01
0.01
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - °C/W
ID - Drain Current - A
PW
RDS(on) Limited
(VGS = 10 V)
Single pulse
Mounted on ceramic substrate of 2000 mm2 x 1.6 mm
Rth(ch-A) = 73.5°C/Wi
100
Rth(ch-A) = 62.5°C/Wi
10
1
Rth(ch-A) (1 unit)
Rth(ch-A) (2 units)
0.1
100 μ
1m
10 m
100 m
1
PW - Pulse Width – s
Data Sheet G19921EJ1V0DS
10
100
1000
5
μ PA2793AGR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
50
100
10
ID - Drain Current - A
ID - Drain Current - A
40
10 V
30
VGS = 4.5 V
20
10
Tch = −55°C
−25°C
1
25°C
75°C
125°C
150°C
0.1
0.01
VDS = 10 V
Pulsed
Pulsed
0
0.001
0
0.5
1
1.5
0
VDS - Drain to Source Voltage - V
2
1
VDS = 10 V
ID = 1 mA
0
50
100
10
25°C
75°C
125°C
150°C
1
0.1
1
25
VGS = 4.5 V
15
10 V
5
0
100
ID - Drain Current - A
6
100
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
RDS(on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
30
10
10
ID - Drain Current - A
Pulsed
1
VDS = 10 V
Pulsed
0.1
150
40
10
5
Tch = −55°C
−25°C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
20
4
100
Tch - Channel Temperature - °C
35
3
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate to Source Cut-off Voltage - V
3
0
2
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
-50
1
30
ID = 3.5 A
Pulsed
25
20
15
10
5
0
0
5
10
15
VGS - Gate to Source Voltage - V
Data Sheet G19921EJ1V0DS
20
μ PA2793AGR
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
30
10000
Ciss, Coss, Crss - Capacitance - pF
VGS = 4.5 V
20
10 V
10
ID = 3.5 A
Pulsed
0
VGS = 0 V
f = 1 MHz
Ciss
1000
Coss
Crss
100
-50
0
50
100
150
0.1
10
100
VDS - Drain to Source Voltage - V
Tch - Channel Temperature - °C
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
12
40
VDS - Drain to Source Voltage - V
1000
td(on), tr, td(off), tf - Switching Time - ns
1
td(off)
100
tf
tr
10
td(on)
VDD = 20 V
VGS = 10 V
RG = 0 Ω
1
30
9
6
20
VGS
3
10
VDS
ID = 7 A
0
0
1
0.1
VDD = 32 V
20 V
8V
0
10
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
10
20
30
40
50
QG - Gate Charge - nC
ID - Drain Current - A
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
100
100
VGS = 4.5 V
10
0V
1
Pulsed
0.1
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
10 V
10
di/dt = 100 A/μs
VGS = 0 V
1
0
0.5
1
1.5
VF(S-D) - Source to Drain Voltage - V
Data Sheet G19921EJ1V0DS
0.1
1
10
100
IF - Diode Forward Current - A
7
μ PA2793AGR
(2) P-channel
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
2.5
PT - Total Power Dissipation - W
dT - Percentage of Rated Power - %
120
100
80
60
40
20
Mounted on ceramic
substrate of
2000 mm2 x 1.6 mm
2 units
2
1 unit
1.5
1
0.5
0
0
0
20
40
60
80
0
100 120 140 160
20
TA - Ambient Temperature - °C
40
60
80
100 120 140 160
TA - Ambient Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
-100
PW
ID(DC)
=
1i
i
m
-10
s
i
s
0
n
s
D
at
io
i
is
si
p
m
er
D
m
-1
1i 0
Po
w
1i 0
ID - Drain Current - A
ID(pulse)
RDS(on) Limited
(VGS = −10 V)
C
Li
m
it e
d
Secondary Breakdown Limited
-0.1
Single pulse
Mounted on ceramic substrate of
2000 mm2 x 1.6 mm
-0.01
-0.01
-0.1
-1
-10
-100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - °C/W
1000
8
Single pulse
Mounted on ceramic substrate of 2000 mm2 x 1.6 mm
Rth(ch-A) = 73.5°C/Wi
100
Rth(ch-A) = 62.5°C/Wi
10
1
Rth(ch-A) (1 unit)
Rth(ch-A) (2 units)
0.1
100 μ
1m
10 m
100 m
1
PW - Pulse Width - s
Data Sheet G19921EJ1V0DS
10
100
1000
μ PA2793AGR
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
-50
-100
-10
ID - Drain Current - A
ID - Drain Current - A
-40
−10 V
-30
VGS = −4.5 V
-20
-10
Tch = −55°C
−25°C
-1
25°C
75°C
125°C
150°C
-0.1
-0.01
VDS = −10 V
Pulsed
Pulsed
-0
-0.001
-0.5
-1
-1.5
0
-2
-3
-4
-5
VGS - Gate to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
-3
-2
-1
VDS = −10 V
ID = −1 mA
-0
-50
0
50
100
150
100
Tch = −55°C
−25°C
10
25°C
75°C
125°C
150°C
1
VDS = −10 V
Pulsed
0.1
-0.1
Tch - Channel Temperature - °C
Pulsed
30
VGS = −4.5 V
25
20
−10 V
15
10
5
0
-1
-10
-10
-100
-100
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
RDS(on) - Drain to Source On-state Resistance - mΩ
40
35
-1
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
RDS(on) - Drain to Source On-state Resistance - mΩ
-1
VDS - Drain to Source Voltage - V
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate to Source Cut-off Voltage - V
-0
40
ID = −3.5 A
Pulsed
35
30
25
20
15
10
5
0
-0
-5
-10
-15
-20
VGS - Gate to Source Voltage - V
ID - Drain Current - A
Data Sheet G19921EJ1V0DS
9
μ PA2793AGR
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
40
10000
Ciss, Coss, Crss - Capacitance - pF
VGS = −4.5 V
30
−10 V
20
10
ID = −3.5 A
Pulsed
0
50
100
Ciss
1000
Crss
150
SWITCHING CHARACTERISTICS
-100
-12
-40
td(off)
100
tf
tr
10
td(on)
VDD = −20 V
VGS = −10 V
RG = 0 Ω
1
-0.1
-1
VDS - Drain to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
-10
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
1000
VDD = −32 V
−20 V
−8 V
-30
-9
-6
-20
VGS
-3
-10
VDS
ID = −7 A
-0
-0
0
-10
10
20
30
40
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
50
100
100
−10 V
10
VGS = −4.5 V
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
-1
VDS - Drain to Source Voltage - V
Tch - Channel Temperature - °C
0V
1
Pulsed
0.1
10
di/dt = −50 A/μs
VGS = 0 V
1
0
0.5
1
1.5
-0.1
VF(S-D) - Source to Drain Voltage - V
10
Coss
100
-0.1
0
-50
VGS = 0 V
f = 1 MHz
Data Sheet G19921EJ1V0DS
-1
-10
IF - Diode Forward Current - A
-100
VGS - Gate to Source Voltage - V
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
μ PA2793AGR
TAPE INFORMATION
There are two types (-E1, -E2) of taping depending on the direction of the device.
Reel side
Draw-out side
−E1 TYPE
−E2 TYPE
MARKING INFORMATION
A2793
A
Lot code
1 pin mark
Pb-free plating marking
RECOMMENDED SOLDERING CONDITIONS
The μ PA2793AGR should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, please contact an NEC Electronics
sales representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Soldering Method
Infrared reflow
Soldering Conditions
Maximum temperature (Package's surface temperature): 260°C or below
Recommended
Condition Symbol
IR60-00-3
Time at maximum temperature: 10 seconds or less
Time of temperature higher than 220°C: 60 seconds or less
Preheating time at 160 to 180°C: 60 to 120 seconds
Maximum number of reflow processes: 3 times
Maximum chlorine content of rosin flux (percentage mass): 0.2% or less
Partial heating
Maximum temperature (Pin temperature): 350°C or below
P350
Time (per side of the device): 3 seconds or less
Maximum chlorine content of rosin flux: 0.2% (wt.) or less
Caution Do not use different soldering methods together (except for partial heating).
Data Sheet G19921EJ1V0DS
11
μ PA2793AGR
• The information in this document is current as of August, 2009. The information is subject to
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M8E0904E