Technical Specification IQ65033QTA14 34-75 V @ 14A 3.3 V & 5.0 V Quarter-brick ATCA Input / Output Management Power Power Interface Module The IQ65033QTA14 iQor Power Interface Module integrates all features required by the AdvancedTCA Base Specification into a Quarter-Brick footprint. The iQor offers industry leading external hold-up capacitor volumetric density for a compact overall solution. At 90V hold-up capacitor voltage (trimmable 50-95 V), only 564 uF is required to achieve 8.70ms hold-up time at 200Win. The -48 V output voltage is conditioned for smooth operation through severe input transient events. The iQor is designed thermally and electrically to drive higher power, wide-rangeinput, DC/DC converters such as the 400W SynQor PQ60120QZB33. RoHS Compliant (see last page). The IQ65033QTA14 has signficantly reduced power loss and improved filtering, relative to the IQ65033QMA10 and IQ65033QGA12 products. Operational Features IQ65033QTA14 Module • Improved common-mode noise • Input ORing for A & B power feeds (MOSFET-based for low power dissipation) • Hot swap control with seamless ride-through of input voltage transient • EMI filter meets CISPR 22 Class B when used as directed (see applications section) • External hold-up capacitor trimmable from 50-95 V • Automatic discharge of external hold-up capacitor • Isolated management power of 3.3 V at 3.6 A and 5.0 V at 150 mA • Dual input side enable • I2C interface data reporting (optional) Protection Features • • • • Management power over-voltage protection Management power over-current protection Main output over-current protection Thermal shutdown protects the unit from abnormal environmental conditions • Input fuse/feed loss alarm Safety Features Mechanical Features • Industry standard quarter-brick size: 1.45" x 2.3" (36.8x58.4 mm) • Overall height of .72" (18.2 mm), permits better airflow and smaller card pitch • Total weight: 1.2 oz (34 g) • Flanged pins designed to permit surface mount soldering (avoid wave solder) using FPiP technique • External hold-up capacitor footprint much smaller than other solutions currently available on the market Product # IQ65033QTA14 Phone 1-888-567-9596 • • • • 2250V, 30 MΩ VRTN_A/B to LOGIC_GND and SHELF_GND isolation UL 60950-1/R:2011-12 - Pending CAN/CSA-C22.2 No. 60950-1/A1:2011 - Pending EN 60950-1/A2:2013 - Pending www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 1 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Mechanical Diagram Top View 2.30 0.15 [3,8] 1.400 1.250 1.100 0.050 [1,27] 0.950 [58,4] [35,56] [31,75] [27,94] [24,13] 0.15 [3,8] 1.45 [36,8] 1.225 [31,12] 1.000 [25,40] 0.600 0.800 [15,24] [20,32] 0.400 [10,16] 0.200 [5,08] 0.200 [5,08] 0.400 [10,16] 0.600 [15,24] 0.800 [20,32] 1.000 [25,40] 1.225 [31,12] 2.00 [50,8] Side View OVERALL HEIGHT 0.718 0.025 [ 18,24 0,63 ] BOTTOM SIDE CLEARANCE 0.045 0.015 [ 1,14 0,38 ] 0.145 [3,68] NOTES 1) 2) 3) 4) 5) 6) 7) 8) All Pins are 0.040" (1.02 mm) diameter with 0.080" (2.03 mm) diameter standoff shoulders. Other pin extension lengths available. Recommended pin length is 0.03" (0.76 mm) greater than the PCB thickness. All Pins: Material - Copper Alloy Finish - Matte Tin over Nickel plate Undimensioned components are shown for visual reference only. All dimensions in inches Tolerances: x.xx +0.02" x.xxx +0.010" Weight: 1.2 oz (34 g) typical Workmanship: Meets or exceeds IPC-A-610C Class II The flanged pins are designed to permit surface mount soldering (allowing to avoid the wave soldering process) through the use of the flanged pin-in-paste technique. * Pins 10, 11, and 12 are only available on the full feature version. See the ordering page for more information. ** Single resistor connected externally to LOGIC_GND selects the three least significant bits of I2C Address “0101xxx”. Product # IQ65033QTA14 Phone 1-888-567-9596 Pin No. Name 1 2 3 4 5 -48V_A -48V_B VRTN_A VRTN_B ENABLE_A 6 ENABLE_B 7 8 9 10 SHELF_GND 5.0V 3.3V I2C_ADR 11 12 13 14 I2C_DAT I2C_CLK LOGIC_GND ALARM 15 16 -48V_OUT HU_TRIM 17 18 VRTN_OUT HU_CAP www.synqor.com PIN DESIGNATIONS Function Negative A Feed (Externally Fused) Negative B Feed (Externally Fused) Positive A Feed (Externally Fused) Positive B Feed (Externally Fused) Enable A Input (Externally Fused) (Short Pin Tied to VRTN_A on Backplane) Enable B Input (Externally Fused) (Short Pin Tied to VRTN_B on Backplane) Shelf Ground 5.0V (Relative to LOGIC_GND) 3.3V (Relative to LOGIC_GND) I2C Address Input * (Connect External Resistor to LOGIC_GND) ** I2C Data (Relative to LOGIC_GND) * I2C Clock (Relative to LOGIC_GND) * Logic Ground Isolated A/B Feed Loss or Open Fuse Alarm (Relative to LOGIC_GND) Negative Output to Payload Power Converter Hold-Up Voltage Trim (Connect External Resistor to -48V_OUT) Positive Output to Payload Power Converter Positive Connection to Hold-Up Capacitor (Negative Connection to -48V_OUT) Doc.# 005-0006679 Rev. 1 04/09/2015 Page 2 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Technical Specification IQ65033QTA14 Electrical Characteristics Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 100ºC. Parameter Min. ABSOLUTE MAXIMUM RATINGS Input Voltage Continuous Transient Reverse Polarity Isolation Voltage (VRTN_A/B to LOGIC_GND) (VRTN_A/B to SHELF_GND) Operating Temperature Storage Temperature Hold-up Capacitor Voltage -48V DUAL FEED INPUT CHARACTERISTICS Input Voltage Range Operating Current Disabled Input Current (Below Turn-Off Threshold) Enabled No-Load Input Current Internal Input Filter Capacitance (Not Hot-Swapped) Recommended EARLY_A/B Resistors Recommended Input Fuses 3.3V ISOLATED MANAGEMENT POWER Startup Delay At 36Vin At 48Vin At 75Vin Turn-On Rise Time Input Under-Voltage Lockout Turn-On Voltage Threshold (ETSI) Turn-Off Voltage Threshold (ETSI) Total Output Voltage Range Output Voltage Ripple and Noise Peak-to-Peak RMS Operating Output Current Range Output DC Current-Limit Inception Current Limit Shutdown Voltage Hiccup Mode Restart Time Back-Drive Current Maximum Output Capacitance Switching Frequency Over-Voltage Protection Setpoint 5.0V POWER (Derived From 3.3V Converter) Total Output Voltage Range Operating Output Current Range Short Circuit Current Back-Drive Current Maximum Output Capacitance Product # IQ65033QTA14 Typ. -1 -40 -55 -34 -48 20 40 18 100 Max. Units Notes & Conditions -75 -100 +75 V V V Limited by internal TVS zener diode 1ms transient, square wave No damage, low current, output diode clamped 2250 2250 100 125 100 V V °C °C V Subject to thermal derating; see Figures 1 & 3 -75 14 30 70 22 V A mA mA μF Ω A 17 Relative to -48V_OUT Subject to the Threshold Protocol used 25ºC TBD LFM, Vin = -48V; see Figure 1 Vin = -48V Should be precharged by resistors to EARLY_A/B pins Surge rated 2010 case size (KOA SG73 series or equiv.) Time from ENABLE_A/B to 3.3/5.0Vout 150 TBD 430 310 200 TBD TBD ms ms ms ms -25.5 -24.0 3.170 -26.5 -26.0 3.350 -28.0 -27.5 3.430 V V V TBD TBD TBD TBD 3.6 6.9 mV mV A A V ms mA μF kHz V 0 3.9 5.4 1.5 130 200 4.10 4.80 0 Phone 1-888-567-9596 1 220 4.33 5.00 500 10 1000 240 4.55 5.20 150 400 1 1000 www.synqor.com V mA mA mA μF 0% to 90%; see Figure 10 At Mangement Power Converter input; See Figure A Overridden by enable Including line, load, sample, life, and temp See Figure 12 Full load, 10μF ceramic, 500MHz bandwidth " Subject to thermal derating; see Figures 1 & 3 Initiates hiccup mode Vin = -48V Negative current drawn from output source Management power converter Including line, load, sample, life, and temp Independent Thermal Protection Negative current drawn from output source Doc.# 005-0006679 Rev. 1 04/09/2015 Page 3 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Technical Specification IQ65033QTA14 Electrical Characteristics (continued) Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 100ºC. Parameter DUAL ENABLE INPUT CHARACTERISTICS ENABLE_A/B Threshold ATCA Current Drain per Enable Pin -48V OUTPUT Efficiency 500W Output Power 400W Output Power Equivalent Resistance from Input Feed Recommended External Output Filter Capacitance Hot-Swap Startup Ramp dv/dt Output Voltage Delay Output Current Limit Input dv/dt Limit (Turns Off Hot-Swap Momentarily) Short Circuit Duration to Initiate Hiccup Mode Restart Time Hiccup Mode INPUT ORING ORing MOSFET Turn On Current ORing MOSFET Turn Off Current ORing MOSFET Current Hysteresis Turn-On Time Turn-Off Time HOLD-UP CAPACITOR INTERFACE Hold-up Capacitor Trim Range Hold-up Capacitor Charge Accuracy External Hold-up Voltage Trim Resistor Power Dissipation Hold-up Capacitor Charge Current Switching Frequency -48V_OUT Threshold To Arm Hold-up Connect (ETSI) To Initiate Hold-up Connect (ETSI) dV/dt on Hold-up Connect Duration of Hold-up Connect Delay Before Hold-up Connect is (Re)Armed Hold-up Capacitor Discharge Resistance Maximum Hold-up Capacitance ISOLATED ALARM OUTPUT (ALARM = HIZ)5 Input A/B Feed Voltage Alarm Threshold Open Circuit Voltage Min. Typ. Max. 26.0 28.5 36.0 0.36 TBD TBD 99.1 99.3 35 100 230 250 40 50 2 2 Units Notes & Conditions V mA At input feed voltage -48V_A/B; see Figure A Vin = -75V No load on 3.3V/5.0V outputs, Vin = -48V 80 180 34 1.8 TBD 270 280 650 46 2.2 % % mΩ μF V/s ms A V/ms ms s 0.6 0.1 0.6 1.5 0.7 0.7 600 0.25 2.4 1.5 0.9 A A A μs μs 50 87.2 90 90.0 95 95.0 V V 160 μW 495 mA KHz 405 -32.4 -32.4 1.55 -34.5 -34.5 80 0.1 2 1.65 -36.4 -36.4 1.75 3300 V V V/ms s s kΩ μF No load; depends on external cap.; see Figure 5 Hold-up still active " Can be set either above or below input voltage 2.49kΩ external trim resistance, 1% 100ppm/ºC Hold-up power converter See Note 3 At VRTN_OUT w.r.t. -48V_OUT; see Figure A " See Note 4 48V output still enabled Yields 55ms (200 W at 90 V cap charge) 38.4 40 40.4 V V At input feed voltage -48V_A/B; see Figure A On-State Voltage 0.2 0.4 V At 50mA On-State Transistor Collector Current Off-State Transistor Collector Current 50 1 Note Note Note Note Note 1: 2: 3: 4: 5: 36.4 40 450 See Note 2 mA μA If the 5.0 V load current exceeds 100 mA, up to 200 mV of additional voltage drop is possible on the 5.0 V output. Maximum DC load at startup is 50 mA. Full load can be applied 700 ms after enable or 400 ms after the management power is up and running. Hold-up operation with Vin < 43 V not required by ATCA specification. 48 V output does not recover after hold-up event unless input is above Arm Hold-up threshold. Does not inhibit 48 V output and is non-latching. Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 4 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Technical Specification IQ65033QTA14 Electrical Characteristics (continued) Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 100ºC. Parameter Min. I2C DATA REPORTING INTERFACE Maximum Clock Rate Measurement Error Feed Voltage A/B Holdup Voltage -48V_OUT Current Temperature OVER-TEMPERATURE PROTECTION Shutdown Point Restart Hysteresis RELIABILITY CHARACTERISTICS Calculated MTBF (Telcordia) Calculated MTBF (MIL-217) Field Demonstrated MTBF TEMPERATURE LIMITS FOR POWER DERATING CURVES Semiconductor Junction Temperature Board Temperature Transformer Temperature Parameter Typ. Max. 100 400 kHz ±3 ±3 ±3 ±3 % % % °C 135 10 Units Notes & Conditions °C °C TBD TBD Clock stretching happens at the maximum rate Automatic restart 106 Hrs. TR-NWT-000332; 80% load,300LFM, 40°C Ta 106 Hrs MIL-HDBK-217F; 80% load, 300LFM, 40°C Ta See website for details 125 125 125 °C °C °C Package rated to 150°C UL rated max operating temp 130°C See Figure 3 for derating curve Notes & Conditions STANDARDS COMPLIANCE Pending UL 60950-1/R:2011-12 Basic insulation EN 60950-1/A2:2013 CAN/CSA-C22.2 No. 60950-1/A1:2011 Note: An external input fuse must always be used to meet these safety requirements. Contact SynQor for official safety certificates on new releases or download from the SynQor website. Parameter QUALIFICATION TESTING Life Test Vibration Mechanical Shock Temperature Cycling Power/Thermal Cycling Design Marginality Humidity Solderability Product # IQ65033QTA14 # Units 32 5 5 10 5 5 5 15 pins Phone 1-888-567-9596 Test Conditions 95% rated Vin and load, units at derating point, 1000 hours 10-55 Hz sweep, 0.060" total excursion, 1 min./sweep, 120 sweeps for 3 axis 100g minimum, 2 drops in x, y and z axis -40 °C to 100 °C, unit temp. ramp 15 °C/min., 500 cycles Toperating = min to max, Vin = min to max, full load, 100 cycles Tmin-10 °C to Tmax+10 °C, 5 °C steps, Vin = min to max, 0-105% load 85 °C, 95% RH, 1000 hours, continuous Vin applied except 5 min/day MIL-STD-883, method 2003 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 5 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Technical Specification Airflow: Pin 14 → Pin 1 14 13 Iout (A) 12 11 10 400 LFM (2.0 m/s) 9 300 LFM (1.5 m/s) 8 200 LFM (1.0 m/s) 7 6 100 LFM (0.5 m/s) 25 40 *Operation outside these deratings may incur a reduction in common-mode filtering. Verify max component temperature is <125°C in final application. 55 70 85 Ambient Air Temperature (°C) Figure 1: -48V output (maximum power) derating curves vs. ambient air temperature with air flowing across the module from pin 14 to pin 1 (3.3V mgmt power output @ 1.5 A). Pins 1,2,3,4,15,17 soldered to copper planes. Module oriented on its side. Derating is applicable to all input voltages. Figure 2: Thermal image of module at 12.4A load current from -48V output (595W) with 55°C air flowing at the rate of 200 LFM. Air is flowing across the module from pin 14 to pin 1 (48 Vin, 3.3V output @ 1.5 A). Pins 1,2,3,4,15,17 soldered to copper planes. Module oriented on its side. Airflow: Any Direction 4 Iout (A) 3.5 400 LFM (2.0 m/s), 0A Main Output 3 200 LFM (1.0 m/s), 0A Main Output 2.5 Natural Convection, 0A Main Output 400 LFM (2.0 m/s), 9A Main Output 2 1.5 200 LFM (1.0 m/s), 9A Main Output 25 40 55 70 85 Ambient Air Temperature (°C) Figure 3: 3.3V output (maximum power) derating curves vs. ambient air temperature (main output power output @ 0 A & 9 A). Pins 1,2,3,4,15,17 soldered to copper planes. Module oriented on its side. Derating is applicable all input voltages and all airflow directions. Figure 4: Thermal image of module at 3.5A load current from 3.3V output (11.5W) with 55°C air flowing at the rate of 200 LFM. Air is flowing across the module from pin 1 to pin 14 (48 Vin, -48V output @ 9 A). Pins 1,2,3,4,15,17 soldered to copper planes. Module oriented on its side. Figure 5: 48V hot-swap turn-on transient (100uF electrolytic filter capacitor CF). Top trace: VRTN_OUT w.r.t. -48V_OUT (20V/div), Bottom trace: Input Feed Current (1A/div). Figure 6: 8.70ms zero volt transient (564uF electrolytic hold-up capacitor CH, 100uF electrolytic filter capacitor CF). Ch 1: Input Feed A/B Voltage (20V/div). Ch 2: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 3: HU_CAP w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (200mV/div). Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 6 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Technical Specification Figure 7: Instantaneous input transient from 48V Feed A to 60V Feed B. Ch 1: Input Feed A Voltage (20V/div). Ch 2: Input Feed B Voltage (20V/ div). Ch 3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (200mV/div). Figure 8: Inductive Switching event on Feed A from 48V to 0V to TVS Zener clamping voltage. No load on -48V output. Ch1: Input Feed A Voltage (20V/ div). Ch3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (50mV/ div). 7 Power Dissipation (W) 6 5 4 3 2 36 Vin 1 48 Vin 75 Vin 0 0 0.5 1 1.5 2 2.5 3 3.5 Load Current (A) Figure 9: Power dissipation vs. 3.3V management power load current. Figure 10: Management Power turn on transient at 50% load (4ms/div). Load capacitance: 10uF ceramic capacitor. Ch 2: 3.3Vout (1V/div). Ch 3: 5.0Vout (1V/div). Figure 11: 3.3Vout response to a step-change in load current [50%-75%-50% of Iout(max): dI/dt = 1A/us]. Load capacitance: 10uF ceramic capacitor. Top trace: 3.3Vout (500mV/div). Bottom trace: Iout (1A/ div). Figure 12: 3.3Vout ripple at nominal input voltage at rated load current (20mV/ div). Load capacitance: 10uF ceramic capacitor. Bandwidth: 500MHz. Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 7 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section FEATURE DESCRIPTIONS Input ORing MOSFETs: ORing of dual -48V feeds is provided by four MOSFETs, which are individually controlled so as to operate as an ideal diode (see Figure A). If there is an input feed short of any kind, a control circuit will detect reverse current and turn off the MOSFET in 250ns (typ.), to avoid disturbing the other feed voltage. At zero current, the MOSFET is guaranteed to be off. In the case of a fuse failure, this triggers the ALARM output, due to an apparent input feed loss. Current hysteresis prevents limit cycling around the transition point between body diode and MOSFET conduction. Due to the ‘Turn On Current’ feature, at fixed input voltages the output voltage will experience one or two diode drops (0.6V or 1.2V) for currents at or below ‘Turn On Current’ thresholds. External Input Fuse Failure Detection: At zero current, the input ORing MOSFETs are guaranteed to be off. In the case of a fuse failure, an on-board bleed resistor pulls the input feed voltage down. This triggers the ALARM output due to an apparent input feed loss. There are two main down-sides to this approach. First, there is no way to distinguish between a feed loss and a fuse failure. Second, an enable fuse loss is not detected, since the enables are diode OR’d. The full featured version of the iQor offers additional data reporting that makes full fuse detection possible. Among other data, each feed voltage and each enable voltage is reported through the I2C port. These voltages can be compared with the voltages reported by the shelf manager to determine whether any board fuse is blown. ALARM Output: The ALARM pin gives an external indication of a fault condition. It is an isolated and buffered open-collector output, which is normally pulled low. In the presence of an input feed loss (which can be caused by a fuse failure), the ALARM output will be tri-stated. 5 6 ENABLE_A HU_CAP 18 ENABLE_B VRTN_A 3 Temp sense Enable Logic FET control 4 Input Enable: The ENABLE_A/B signals connect to VRTN_A/B on the backplane via the shortest pins in the zone 1 connector. They are the last pins to mate during board insertion, and the first to disconnect during board extraction. The ENABLE_A and ENABLE_B signals are diode-ORed together which lets either signal enable the module. Whenever both ENABLE pins are open, the hot-swap switch is opened. This prevents -48V output power from being drawn though the EARLY pre-charge resistors. E dV/dt sense F A Hold-up connect control circuits VRTN_B VRTN_OUT 17 FET control E Hot Swap Control Logic B F -48_A EMI Filter 1 C Currentcontrolled holdup charging converter FET control HU_TRIM 16 -48V_OUT 15 -48_B 2 D FET control Management Power converter A F 10 11 12 14 Isolation barrier LOGIC_GND E ALARM Monitoring circuits D I2C Clock SHELF_GND I2C Add. 7 I2C Data B C Discharge 3.3V 9 8 5.0 V 13 Figure A: Internal Block Diagram Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 8 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section The ENABLE signals also control the management power. On board insertion, the management power remains off until at least one of ENABLE_A/B is connected. On board extraction, the management power is disabled at the end of the 100ms hold-up period, and remains off until ENABLE_A/B is reconnected. This prevents the IPMI controller from reading an invalid hardware address when a board is partially inserted. Management power flows through the EARLY pre-charge resistors for a maximum of 100ms, which provides a margin similar to the pre-charge event in terms of resistor safe-operating-area. 48V Input voltage 0 Holdup time, tH Holdup event 48V 35V typ. (12A DS Version only) Payload output 48V 0 Thresholds at -48Vout EARLY Precharge Resistors: The EARLY_A/B signals connect to the longest pins in the zone 1 power connector, and therefore first to mate during board insertion. External resistors connected between these signals and -48V (A and B) allow the relatively small EMI filter capacitance to be pre-charged before the main power pins make contact. A 100W surge rated 2010 case size resistor is recommended (KOA SG73 series or equivalent). 26.6 V typ. 3.3V Management power 0 Alarm (Pull-up voltage lost) 0 Figure B: Sudden Loss of Input Power Hot Swap - Thermal Shutdown: To protect the unit from damage in an abnormal thermal environment, the hot-swap switch will be disabled when the thermal sensor temperature rises above the turn-off threshold. The switch will be automatically enabled again when the temperature goes below the turn-on threshold. The management power remains on during an over-temperature condition. The full featured version of the iQor reports the actual temperature through the I2C port. 48V Higher of A/B input feed voltages VRTN A/B - (-48V_A/B) Thresholds at -48V_A/B 34.9 V typ. 34.4 V typ. 26.0 0 Holdup event 48V -48V output voltage VRTNOUT - (-48V_OUT) Thresholds at -48Vout 34.5 V typical (12A DS Version only) 100ms Output is off after delay if input voltage doesn’t recover above 38.9V typ. 0 3.3V 0 Management power turned off at higher of ENABLE threshold or MP UVLO . Management power output (3.3V) - LOGIC_GND Alarm - (LOGIC_GND) (Pullup voltage lost) Figure C: Gradual Loss of Input Power Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 9 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section 48V Hot Swap - Over-Current Protection: If the -48V output current rises above the current limit threshold, the hot-swap switch will be disabled, and will immediately enter another soft-start sequence. If an output short is detected, the hot-swap switch will be disabled and will enter a hiccup mode of operation with automatic restart. 0V High Enable A/B The full featured version of the iQor reports actual output current through the I2C port. The iQor unit conditions the -48V output, providing for seamless ridethrough of input voltage transients. If the positive dV/dt of the input voltage is too high, the hot-swap switch will be disabled and will immediately enter another soft-start sequence. This limits the dV/dt seen on the -48V output, which prevents the 12V payload power converter from having such a large glitch on its output that it shuts down. The -48V output hold-up function remains active throughout, in case the hot-swap switch is forced off for too long. Passive Transient Suppression: Each input feed has a dedicated internal bidirectional TVS zener diode, rated for a minimum clamp voltage of 77.8V at 1mA. A TVS diode short due to electrical overstress will not disable the iQor module: a fuse will open, and the module can continue to run from the other feed. External Hold-up Capacitor Charge: A current controlled DC-DC converter charges the external hold-up capacitor to a voltage of 50V-95V, set by an external resistor. The charge voltage can range either above or below the input feed voltage. Constant current charging takes place whenever the hot-swap switch is enabled. Hold-up Capacitor Connect: When the hot-swap switch is enabled, 2 seconds are allocated to charge the hold-up capacitor. After this time, a comparator is armed, which connects the hold-up capacitor to the -48V output should the output ever drop below the given connect threshold. A current limit circuit protects against damage during a short circuit condition. A dV/dt limit circuit regulates the hold-up connect switch turn-on speed. When the comparator is tripped, the hold-up connect switch remains closed for 100ms, is off for 2 seconds to allow the hold-up capacitor to recharge, and then is automatically rearmed (if the output voltage is above the given arm threshold). Hold-up Capacitor Discharge: Whenever the hot-swap switch is disabled, an internal resistor bank is connected across the hold-up capacitor. This is intended to reduce the voltage on the hold-up capacitor below 60V within 1 second. Management Power: An isolated management power converter delivers both 3.3V and a low power 5.0V relative to LOGIC_GND. Overcurrent protection operates in constant current with a hiccup mode if the output voltage drops too far. Output over-voltage circuitry is included with a redundant reference and optocoupler. Product # IQ65033QTA14 Phone 1-888-567-9596 5V 3.3V 0V 0.5s 15 ms On Hot Swap Switch Off Vo Payload converter Turn on threshold Output voltage 0V 650ms Full payload current 0.5A Payload (output) current 50mA 0A Payload converter should be 650ms Inrush: ~5ms enabled after this delay. Notes: • Time relationships shown have tolerance defined in the specifications table. • Hot Swap switch output is not available to the user for monitoring • Power up inrush duration is typical with Early mate resistor of 100 Ohms. Figure D: Power up (Board insertion) timing diagram In the event of a gradual loss of input voltage (Fig. C), the main -48Vout will shut down 100ms after the beginning of the hold-up event. The -48Vout will enter a hiccup mode of operation for input voltages below the Hold-up Arm Threshold. Management power will continue to run until the input voltage (plus 0V to 1.2V for the ORing MOSFETs) decays to the management power under-voltage turn-off threshold. 20 PH=200W CF=100µF VI=-43V PH=Power at Holdup CF=Output Capacitor (Filter) VI=Voltage at Input 15 10 5 90V 80V 70V 0 The events from power up to availability of output voltage and full payload current are illustrated in the timing diagram shown in Figure D. Hot Swap – Shutdown Timing: In the event of a sudden loss of input voltage (see Figure B), a hold-up event will be triggered. When the output voltage (plus a diode drop for the hot-swap body diode) decays to the management power under-voltage turn-off threshold, the main -48V output and the 3.3V/5.0V outputs will shut down simultaneously. Low 3.3V, 5V outputs Hold-up Time (ms) Hot Swap - Transient Suppression: Input transient events can occur if there is a short on an adjacent board or backplane. The short builds up a large current in the wiring inductance, and when a fuse blows, the voltage behind the fuse spikes very quickly. This can cause a loss of redundancy since many other boards could be exposed to this spike. Turn on threshold 48V in 300 400 500 600 700 800 900 1000 Hold-up Capacitance (µF) Figure E: Hold-up Time (ms) vs. Hold-up Capacitance (µF) at Hold-up Charge Voltages of 70V, 80V, and 90V (see Equation A). The AdvancedTCA holdup time requirement is at most 8.70ms (solid horizontal line). The capacitor tolerance is not factored into this result. Error bars indicate the worst case range of hold-up time for a given hold-up capacitance. www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 10 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section EXTERNAL HOLD-UP CAPACITOR SELECTION 100 CH is the hold-up capacitance (electrolytic capacitors typically have a ±20% tolerance): 2tHPH Equation A V2H - V2U Typically a strong function of VH (see Figure E). The ATCA specification requirement is 8.70ms (see Figure F). Where: VH VU = = hold-up capacitor charge voltage. minimum operating voltage on the 48V output; the greater of the under-voltage lockout threshold of the payload power converter, and the under-voltage lockout threshold of the management power converter. tU = time from when the highest input feed voltage drops below VF, to the time when the highest input feed voltage rises above VU. VF PH = = voltage at which the hold-up capacitor is engaged. power drawn from the hold-up capacitor, the sum of the input power of the payload power converter, and the input power of the 3.3V mgmt power converter (see Figure 9): PH = Pout 12V η12V + PIN 3.3V Equation B Pout12V = output power delivered by the payload converter. η12V = efficiency of the 12V payload converter. = output power delivered by the payload converter. PIN 3.3V Fuse-Blowing type transient that cause a drop in both input feeds simultaneously. 80 Input Feed Voltage (V) CH = 90 70 60 50 43.0V 41.0V 40 36.0V 30 20 10 0 0 1 2 3 4 5 6 7 8 9 10 8.70ms Time (ms) Figure F: The PICMG 3.0 R2.0 AdvancedTCA Base Specification requires continuous operation through a zero-volt transient, lasting 5ms (Section 4.1.2.2). However, this is not a square wave: the voltage starts at a minimum amplitude of -43V, falls at 50V/ms, remains at 0V for 5ms, and then rises at 12.5V/ms. At the worst case values of the hold-up connect threshold and the management power under-voltage lockout threshold, the required hold-up time is 8.70ms EXTERNAL HOLD-UP TRIM RESISTOR SELECTION Rtrim is the external hold-up trim resistance for a given desired nominal holdup capacitor charge voltage (VHU) (see Figure G): EXTERNAL HOLD-UP CAPACITOR VOLTAGE RATING Operating electrolytic capacitors near their voltage rating does not significantly affect their reliability, as it does with tantalum or ceramic type capacitors. The operating life of electrolytic capacitors is primarily determined by the capacitor internal temperature. The capacitor lifetime roughly doubles for every 10ºC reduction in internal temperature. SynQor recommends running 100V rated electrolytic capacitors at 90V, which dramatically increases hold-up time for a given capacitor volume (see Figure E). A built-in circuit automatically discharges the hold‑up capacitor when the input voltage is removed. Rtrim = 500,000 VHU - 50.0 ( - 10,000 )Ω Equation C External Hold-up Trim Resistance ( Ω ) 100000 10000 1000 50 60 70 80 90 100 Hold-up Charge Voltage (V) Figure G: Plot of Equation C, used to choose the external trim resistor value based on the desired Hold-up Capacitor charge voltage. Error bars indicate the worst case range of charge voltage for a given external trim resistor value (assumes 1%, 100ppm for external trim resistor tolerance). Worst case calculation over temp range -40ºC to 125ºC. Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 11 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section FULL FEATURE APPLICATION NOTES Data_ Pointer Value I2C Data Reporting Interface: Available on the full feature version of the module, the iQor I2C Serial Interface monitors 5 analog parameters and 6 status bits. The actual analog parameter values are calculated by multiplying by the specified scaling factors (see Table 1). The status bits are interpreted in Table 2. The initial value of all registers is zero. Data in the registers begins updating 300 ms after management power startup, and continues updating at approximately 100 ms intervals during steady-state operation. All registers are updated simulatneously. I2C Protocol: Reading from any internal register of the iQor monitor requires that an internal (pseudo) register, Data_Pointer, be initialized prior to reading (see Figure I). Data_Pointer is write-only. It is written from the second byte of any I2C WRITE message (the first byte is the 7 bit I2C Address and the R√W bit). Subsequent data bytes in a WRITE message (3rd Byte and beyond) only increment Data_Pointer. Any READ message will return the value of the internal register referenced by Data_Pointer and increments Data_Pointer by one. For instance, if the master acknowledges (AK), the next internal register referenced by Data_Pointer will be returned and Data_Pointer will be incremented by one. This process is repeated until the master does not acknowledge (NACK) and issues a STOP bit. Parameter Description Scaling Factor 1Eh Status Bits Digital Signals (see Table 2) N/A 1Fh HU_CAP Voltage between HU_CAP and -48V_OUT 0.398 V/bit 21h -48V_Current -48Vout Current 0.094 A/bit 22h -48V_A Voltage between VRTN_A and -48V_A 0.325 V/bit 23h -48V_B Voltage between VRTN_B and -48V_B 0.325 V/bit 28h Temperature Average Unit Temperature (1.961 ºC/bit) – 50 ºC Table 1: Internal register memory map. Data_Pointer is an 8bit value. It is initialized to 00h at reset, and after reaching FFh, it will not overflow. Writing to registers not defined in Table 1 has no effect. Reading from these undefined registers will return 00h. In both cases Data_Pointer is incremented. * Shield plane should extend under payload power converter Shield Plane* Payload Power Converter R trim 100µF 100V -48V_B VRTN_A RTN 48V B VRTN_B Enable A ENABLE_A Enable B ENABLE_B Shelf Gnd SHELF_GND SynQor iQor ATCA Power Input Module 2 I C interface on fullfeatured version only Alarm ALARM LOGIC_GND 100Ohms RTN 48V A PQ60120QEA25 I2C CLOCK 3.3kOhms Early B -48V_A (from IPM) -48V_OUT -48V B HU_TRIM 100Ohms VRTN_OUT Early A HU_CAP -48V A 12V 10nF CH 10nF 10Ohms Holdup capacitor I2C DATA I2C ADDRESS 3.3 V 3.3V to IPM 5.0V Blue LED bias Figure H: Application Diagram Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 12 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Application Section Bit Name 0 1 2 3 4 5 6 Description Value Translation 0 EN_A is Disabled Enable A ENABLE_A Signal State 1 EN_A is Enabled 0 EN_B is Disabled Enable B ENABLE_B Signal State 1 EN_B is Enabled 0 Primary side Alarm is not SET Alarm Signal ALARM State 1 Primary side Alarm is SET N/A Reserved Holdup Cap is not connected to 0 Holdup -48V Out HOLDUP Switch Holdup Cap is connected to State 1 -48Vout 0 Hotswap switch is OFF Hotswap HOTSWAP Switch State 1 Hotswap switch is ON VOUT_ LOW -48Vout Under-Voltage Alarm 0 Vout is below threshold 1 Vout is above threshold External programming resistances for I2C Address Selection Data_Pointer is an 8bit value. It is initialized to 00h at reset, and after reaching FFh, it will not overflow. Writing to registers not defined in Table 1 has no effect. Reading from these undefined registers will return 00h. In both cases Data_Pointer is incremented. S 7bit Address W 8 bits S 7bit Address R AK Data_Pointer 1 bit 8 bits AK ●●● 1 bit 8 bits AK Register Value AK AK ●●● P 1 bit 8 bits Register Value I2C address for write (R/W = 0) xyz from Table 3 5Eh 5Ch 5Ah 58h 56h 54h 52h 50h Table 4: I2C address selection. 111 110 101 100 11 10 1 0 R (Ω) Open 100000 40200 20000 10000 4020 2000 Short PCB layout 1 bit Dummy R/W I2C Address selection: The three bits (xyz) of the I2C Address are set with a single external resistor from the I2C_ADR (pin 10) to LOGIC_GND (pin 13). The 8 possible addresses are shown in Table 4 with the respective resistance values. Any READ message will return the value of the internal register referenced by Data_Pointer and increments Data_Pointer by one. For instance, if the master acknowledges (AK), the next internal register referenced by Data_ Pointer will be returned and Data_Pointer will be incremented by one. This process is repeated until the master does not acknowledge (NACK) and issues a STOP bit. 1 bit ACK (Data_Pointer is automatically incremented to 23h). Unit will respond with the value of -48V_B (register 23h). NACK. Stop Transmission. 8 bit I2C Address 0101 xyz* Table 3: I2C address structure. Data_Pointer is write-only. It is written from the second byte of any I2C WRITE message (the first byte is the 7 bit I2C Address and the R√W bit). Subsequent data bytes in a WRITE message (3rd Byte and beyond) only increment Data_Pointer. 8 bits 8) 9) 10) 11) Send 22h (loads 22h into Data_Pointer). STOP transmission. START next transmission. Send 57h (addresses unit for reading). Unit will respond with the value of -48V_A (register 22h as shown in Table 1). Four bits are fixed (0101), three bits (xyz) are variable, and the leastsignificant bit is the read/write bit. I2C Protocol: Reading from any internal register of the iQor monitor requires that an internal (pseudo) register, Data_Pointer, be initialized prior to reading (see Figure I). 1 bit 3) 4) 5) 6) 7) I2C Address structure: 7 bit I2C Address + R/W bit 7 N/A Reserved Table 2: The status byte represents 6 different digital signals and their digital state. Note: 1) Bit0 ⇒ LSb, Bit7 ⇒ MSb 8 bits Example from the point of view of the I2C Master: 1) START transmission. 2) Send 56h (addresses unit for writing, given address 56h was selected as shown in Table 4). Connections to the address selection resistor must follow the Kelvin method to minimize effects of DC offsets and ripple/noise present in the general GND. The interconnection between Digital GND and Power GND or GND plane should also be in such a way that noise is not coupled to the address selection circuitry. See Figure J NACK P Pin 10 PIM Figure I: Typical I2C read transmission. Note: S = START, W = WRITE, R = READ, AK = acknowledged, NACK = NOT acknowledged, P = STOP. Clear boxes originate in the I2C Master and shaded boxes originate in the I2C Slave. DIG_GND (from other circuits and RTNs from other power supplies) ADDR Address selection resistor Pin 13 DIG_GND (Gnd plane) Figure J: Resistor Diagram Product # IQ65033QTA14 Phone 1-888-567-9596 www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 13 Input:34-75 V Outputs:3.3 V & 5.0 V Current:14A Package:Quarter-brick Ordering Section PART NUMBERING SYSTEM ORDERING INFORMATION The part numbering system for SynQor’s dc-dc converters follows the format shown in the example below. The tables below show the valid model numbers and ordering options for converters in this product family. When ordering SynQor converters, please ensure that you use the complete 15 character part number consisting of the 12 character base part number and the additional 3 characters for options. Add “-G” to the model number for 6/6 RoHS compliance. IQ 6 5 0 3 3Q T A 1 4 E R S -G 6/6 RoHS Options (see Ordering Information) Output Current Model Number IQ65033QTA14xyz-G Input Voltage 34-75 V MGMT Max Output Power Current 3.3V & 5.0V 14A Thermal Design Performance Level The following options must be included in place of the w x y z spaces in the model numbers listed above. Package Size Output Voltage Input Voltage Options Description: x y z Product Family The first 12 characters comprise the base part number and the last 3 characters indicate available options. The “-G” suffix indicates 6/6 RoHS compliance. Application Notes Threshold Protocols Pin Style Feature Set E - ETSI K - 0.110" N - 0.145" R - 0.180" Y - 0.250" S - Standard F - FullFeature Not all combinations make valid part numbers, please contact SynQor for availability. See the Product Summary web page for more options. A variety of application notes and technical white papers can be downloaded in pdf format from our website. RoHS Compliance: The EU led RoHS (Restriction of Hazardous Substances) Directive bans the use of Lead, Cadmium, Hexavalent Chromium, Mercury, Polybrominated Biphenyls (PBB), and Polybrominated Diphenyl Ether (PBDE) in Electrical and Electronic Equipment. This SynQor product is 6/6 RoHS compliant. For more information please refer to SynQor’s RoHS addendum available at our RoHS Compliance / Lead Free Initiative web page or e-mail us at [email protected]. Contact SynQor for further information and to order: Phone: Toll Free: Fax: E-mail: Web: Address: Product # IQ65033QTA14 978-849-0600 888-567-9596 978-849-0602 [email protected] www.synqor.com 155 Swanson Road Boxborough, MA 01719 USA Phone 1-888-567-9596 PATENTS SynQor holds numerous U.S. patents, one or more of which apply to most of its power converter products. Any that apply to the product(s) listed in this document are identified by markings on the product(s) or on internal components of the product(s) in accordance with U.S. patent laws. SynQor’s patents include the following: 5,999,417 6,222,742 6,545,890 6,594,159 6,731,520 6,894,468 6,896,526 6,927,987 7,050,309 7,072,190 7,085,146 7,119,524 7,269,034 7,272,021 7,272,023 7,558,083 7,564,702 7,765,687 7,787,261 8,023,290 8,149,597 8,493,751 8,644,027 WARRANTY SynQor offers a three (3) year limited warranty. Complete warranty information is listed on our website or is available upon request from SynQor. www.synqor.com Doc.# 005-0006679 Rev. 1 04/09/2015 Page 14