PL1084J3

CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 1/9
5A Low Dropout Positive Voltage Regulator
TO-252(DPAK)
PL1084J3
Features
Maximum Dropout Voltage 1.5V at 5A Output Current.
 Fast Transient Response.
 Extremely Tight Line and Load Regulation.
 Current Limiting and Thermal Protection.
 Adjustable Output Voltage or Fixed 1.5V, 1.8V,2.5V,3.3V,5.0V.
 Standard 3-Pin Power Packages.


Adj/Gnd Vout Vin
Description
The PL1084J3 is a low dropout three terminal regulator with 5A output current capability. The output voltage is adjustable
with the use of a resistor divider or fixed 1.5V, 1.8V, 2.5V, 3.3V, and 5.0V. Dropout voltage is guaranteed to be at maximum
of 1.5V with the maximum output current. Its low dropout voltage and fast transient response make it ideal for low voltage
microprocessor applications. Current limit and thermal protection provide protection against any overload condition that
would create excessive junction temperatures.
Applications
Mother Board I/O Power Supplies.
Microprocessor Power Supplies.
High Current Regulator.
Post Regulator for Switching Supply.



Typical Application Circuit
Vout=3.3V
Vin=5V
3
2
PL1084-Adj
VREF
1
ADJ
C1
10μF
R1
125Ω
1%
C2
22μF
R2
205Ω
1%
VOUT=VREF×(1+R2/R1)+IADJ×R2
C1 is required if device is far from filter
capacitance.
C2 minimum value required for stability.
Adjustable Voltage Regulator
Vin=5V
3
2
Vout=3.3V
PL1084-3.3
C1
10μF
C2
22μF
1
C1 is required if device is far from filter
capacitance.
C2 minimum value required for stability.
Fixed Voltage Regulator
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 2/9
Ordering Information
Device
PL1084-AdjJ3-0-T3-G
PL1084-1.5J3-0-T3-G
PL1084-1.8J3-0-T3-G
PL1084-2.5J3-0-T3-G
PL1084-3.3J3-0-T3-G
PL1084-5.0J3-0-T3-G
Output Voltage
Adjustable
1.5V
1.8V
2.5V
3.3V
5.0V
Package
Shipping
TO-252
(Pb-free lead plating and
halogen-free package)
2500 pcs/Tape & Reel
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and
green compound products
Packing spec, T3 : 2500 pcs / tape & reel, 13” reel
Product rank, zero for no rank products
Product name
Absolute Maximum Ratings
Symbol
Vin
PD
TSTG
TJ
TLEAD
VESD
Parameter
DC supply voltage
Power Dissipation
Storage Temperature
Operating Junction Temperature Range
Lead Temperature (Soldering 10 sec)
Minimum ESD rating (HBM)
Ratings
+15
Unit
V
Internally Limited
-65 ~ +150
℃
-40 ~ +125
℃
300
℃
2000
V
Electrical Characteristics (ILOAD=0mA,Tj=25℃, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
VIN=5V, ILOAD=10mA
1.238 1.250 1.262
VIN=2.75V to 10V, ILOAD=10mA to 5A
PL1084-1.5 VIN=3.0V
PL1084-1.8 VIN=3.3V
PL1084-2.5 VIN=4.0V
PL1084-3.3 VIN=4.8V
PL1084-5.0 VIN=6.5V
1.225
1.485
1.782
2.475
3.267
4.950
1.250
1.500
1.800
2.500
3.300
5.000
1.275
1.515
1.818
2.525
3.333
5.050
VO
Output Voltage
(fixed model)
ILOAD=0mA to 5A
PL1084-1.5 VIN=3.0V to 11.5V
PL1084-1.8 VIN=3.3V to 11.8V
PL1084-2.5 VIN=3.8V to 12.5V
PL1084-3.3 VIN=4.8V to 13.3V
PL1084-5.0 VIN=6.5V to 15.0V
1.470
1.764
2.450
3.234
4.900
1.500
1.800
2.500
3.300
5.000
1.530
1.836
2.550
3.366
5.100
Vo
Line Regulation
(All version)
ILOAD=10mA
VIN-VOUT=1.5V to 10V
-
0.04
0.2
VREF
Vo
PL1084J3
Reference Voltage
(adjustable model)
Output Voltage
(fixed model)
Units
V
V
V
%
CYStek Product Specification
CYStech Electronics Corp.
Vo
IL
IAdj
IQ
Is
RR
VD
TC
θJA
θJC
Load Regulation
(Note 1, 2)
Minimum Load Current
Adj
VIN=2.75V, 10mA≤Io≤5A
PL1084-1.5 VIN=3.0V, 10mA≤Io≤5A
PL1084-1.8 VIN=3.3V, 10mA≤Io≤5A
PL1084-2.5 VIN=4.0V, 10mA≤Io≤5A
PL1084-3.3 VIN=4.8V, 10mA≤Io≤5A
PL1084-5.0 VIN=6.5V, 10mA≤Io≤5A
VIN=5V, VADJ=0V(adjustable model)
VIN=2.75V to 10V, ILOAD=10mA
Adjust Pin Current
(adjustable model)
VIN-VOUT=1.5V, ILOAD=10mA to 5A
Ground Pin Current
(fixed model)
Current Limit(All version)
VIN-VOUT=1.5V
Ripple Rejection (All version) VIN-VOUT=3V, ILOAD=5A
Dropout Voltage(All version) ILOAD=5A (Vout=1%Vout)
Temperature Coefficient
VIN-VOUT=1.5V, ILOAD=10mA
Thermal Resistance, Junction
to Ambient(No Heat Sink; No
air flow)
Thermal Resistance,
Junction to Case
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 3/9
-
2.5
3
3.6
5
6.6
10
3
10
12
15
20
26
40
7
-
40
90
μA
-
7
10
mA
5
60
-
6.5
65
1.3
0.005
1.5
-
A
dB
V
%/ °C
-
98
-
mV
mA
°C/W
-
15
-
Note: 1. See thermal regulation specifications for changes in output voltage due to heating effects. Line and load regulation are
measured at a constant junction temperature by low duty cycle pulse testing. Load regulation is measured at the output
lead =1/18” from the package.
2. Line and load regulation are guaranteed up to the maximum power dissipation of 15W. Power dissipation is determined
by the difference between input and output and the output current. Guaranteed maximum power dissipation will not be
over the full input/output range.
Block Diagram
PL1084J3
CYStek Product Specification
G
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 4/9
Functional Description
Introduction
The PL1084 adjustable Low Dropout(LDO) regulator is a 3 terminal device that can easily be programmed with the
addition of two external resistors to any voltages within the range of 1.25V to 2.5V. The PL1084 only needs 1.5V
differential between Vin and Vout to maintain output regulation. In addition, the output voltage tolerances are also
extremely tight and they include the transient response as part of the specification. For example, Intel VRE
specification calls for a total of ±100mV including initial tolerance, load regulation and 0 to 5A load step. The
PL1084 is specifically designed to meet the fast current transient needs as well as providing an accurate initial voltage,
reducing the overall system cost with the need for fewer output capacitors.
Output Voltage Setting
The PL1084 can be programmed to any voltages in the range of 1.25V to 5V with the addition of R1 and R2 external
resistors according to the following formula:
Vout=Vref(1+R2/R1)+Iadj*R2, where Vref=1.25V typically, Iadj=40μA typically
The PL1084 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across these
two pins, a constant current flows through R1, adding to the Iadj current requirement of the PL1084. R1 is typically
selected to be 121Ω resistor so that it automatically satisfies the minimum current requirement. Notice that since
Iadj is typically in the range of 40μA, it only adds a small error to the output voltage and should only be considered
when a very precise output voltage setting is required. For example, in a typical 3.3V application where R1=121Ω
and R2=200Ω, the error due to Iadj is only 0.3% of the nominal set point.
Load Regulation
Since the PL1084 is only a 3 terminal device, it is not possible to provide true remote sensing of output voltage at the
load. The best load regulation is achieved when the bottom side of R2 is connected to the load and the top side of R1
is connected directly to the case or the Vout pin of the regulator and not to the load. It is important to note that for
high current applications, this can represent a significant percentage of the overall load regulation and one must keep
the path from the regulator to the load as short as possible to minimize this effect.
Stability
The PL1084 requires the use of an output capacitor as part of the frequency compensation in order to make the
regulator stable. The addition of 150μF aluminum electrolytic or a 22μF solid tantalum capacitor will ensure stability
for all operating conditions.
When the adjustment terminal is bypassed with a capacitor to improve the ripple rejection, the requirement for an
output capacitor increases. The value of 22μF tantalum or 150μF aluminum covers all cases of bypassing the
adjustment terminal. Without bypassing the adjustment terminal, smaller capacitor can be used with equally goo
result.
To ensure good transient response with heavy load current changes, capacitor values on the order of 100μF are used
in the output of many regulators. To further improve stability and transient response of these devices, larger values of
output capacitors can be used.
Thermal Design
The PL1084 incorporates an internal shutdown that protects the device when the junction temperature exceeds the
maximum allowable junction temperature. Although this device can operate with junction temperatures in the range
of 150℃, it is recommended that the selected heat sink be chosen such that during maximum continuous load
operation, the junction temperature is kept below the temperature.
Layout Consideration
The output capacitors must be located as close to the Vout terminal of the device as possible. It is recommended to
use a section of a layer of the PC board as a plane to connect the Vout pin to the output capacitors to prevent any high
frequency oscillation that may result due to excess trace inductance.
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 5/9
Recommended soldering footprint
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 6/9
Characteristic Curves
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 7/9
Reel Dimension
Carrier Tape Dimension
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 8/9
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5C of actual peak
temperature(tp)
Ramp down rate
Time 25 C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3C/second max.
3C/second max.
100C
150C
60-120 seconds
150C
200C
60-180 seconds
183C
60-150 seconds
240 +0/-5 C
217C
60-150 seconds
260 +0/-5 C
10-30 seconds
20-40 seconds
6C/second max.
6 minutes max.
6C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
PL1084J3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C512J3
Issued Date : 2007.07.04
Revised Date : 2014.12.29
Page No. : 9/9
TO-252AA Dimension
Marking:
4
Device
Name
Date
Code
1084□□□
□□□□
1
3-Lead TO-252AA Plastic Surface Mount Package
CYStek Package Code: J3
Inches
Min.
Max.
0.087
0.094
0.000
0.005
0.039
0.048
0.026
0.034
0.026
0.034
0.018
0.023
0.018
0.023
0.256
0.264
0.201
0.215
0.236
0.244
DIM
A
A1
B
b
b1
C
C1
D
D1
E
Millimeters
Min.
Max.
2.200
2.400
0.000
0.127
0.990
1.210
0.660
0.860
0.660
0.860
0.460
0.580
0.460
0.580
6.500
6.700
5.100
5.460
6.000
6.200
2
1.5V→ -15
1.8V→ -18
2.5V→ -25
3.3V→ -33
5.0V→ -50
ADJ→ blank
3
Style: Pin 1.Adj(GND) 2.Vout 3.Vin
4.Vout
DIM
e
e1
H
K
L
L1
L2
L3
P
V
Inches
Min.
Max.
0.086
0.094
0.172
0.188
0.163 REF
0.190 REF
0.386
0.409
0.114 REF
0.055
0.067
0.024
0.039
0.026 REF
0.211 REF
Millimeters
Min.
Max.
2.186
2.386
4.372
4.772
4.140 REF
4.830 REF
9.800
10.400
2.900 REF
1.400
1.700
0.600
1.000
0.650 REF
5.350 REF
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
 Lead : Pure tin plated.
 Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
 CYStek reserves the right to make changes to its products without notice.
 CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
 CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
PL1084J3
CYStek Product Specification