1/4 STRUCTURE Silicon Monolithic Integrated Circuit NAME OF PRODUCT DC-AC Inverter Control IC TYPE ＢＤ９２４３ＭＵＶ FUNCTION ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ 36V High voltage process 1ch control with Full-Bridge Lamp current and voltage sense feed back control Sequencing easily achieved with Soft Start Control Short circuit protection with Timer Latch Under Voltage Lock Out Circuit protection with quick Shutdown Mode-selectable the operating or stand-by mode by stand-by pin BURST mode controlled by PWM and DC input VQFN024V4040 small package ○Absolute Maximum Ratings（Ｔａ＝２５℃） Parameter Symbol Limits Unit Supply Voltage VCC 36 V BST PIN BST 40 V SW PIN SW 36 V BST-SW voltage difference BST-SW 15 V Operating Temperature Range Topr -40～+85 ℃ Storage Temperature Range Tstg -55～+150 ℃ Maximum Junction Temperature Tjmax +150 ℃ Pd 700* mW Power Dissipation * Pd derate at 5.6mW/℃ for temperature above Ta = 25℃ (When mounted on a PCB 70.0mm×70.0mm×1.6mm) 〇Operating condition Parameter Supply voltage BST voltage Symbol Limits Unit VCC 8.0～30.0 V BST 5.0～37.5 V BST-SW 5.0～14.0 V oscillation frequency FOUT 30～110 kHz BCT oscillation frequency fBCT 0.05～1.00 kHz BST-SW voltage difference REV. A 2/4 ○Electric Characteristics（Ta=25℃、VCC=24V、STB=3.0V） Parameter Limits Symbol Unit MIN. TYP. MAX. Conditions （（WHOLE DEVICE）） Operating current Icc1 － 2.2 5.0 mA Stand-by current Icc2 － 0 10 μA FOUT=60kHz, FB=SW=GND, BST=OPEN （（STAND BY CONTROL）） Stand-by voltage H VstH 2.0 － VCC V System ＯＮ Stand-by voltage L VstL -0.3 － 0.8 V System ＯＦＦ Operating voltage (VCC) V_VCCUVP 6.17 6.50 6.83 V Hesteresis width (VCC UVLO) ⊿V_VCCUVP 0.37 0.50 0.63 V REG output voltage VREG 7.35 7.50 7.65 V REG source current IREG 20 － － mA RT Output Voltage VRT 1.05 1.50 1.95 V SRT ON Resistor value RSRT － 100 200 Ω Soft start Charge Current TSS 1.5 2.0 2.5 uA SS term start voltage VSS_ST 0 50 150 mV SS term end voltage VSS_END 2.8 3.0 3.2 V BOSC Max voltage VBCTH 1.94 2.00 2.06 V fBCT=0.3kHz BOSC Min voltage VBCTL 0.4 0.5 0.6 V fBCT=0.3kHz BOSC frequency FBCT 291 300 309 Hz BCT=10000pF IS threshold voltage VIS 1.225 1.250 1.275 V VS threshold voltage VVS 1.215 1.250 1.285 V IS source current 1 IIS1 － － 0.9 μA DUTY=2.2V IS source current 2 IIS2 40 50 60 μA DUTY=0V IS=1.0V VS source current IVS － － 0.9 μA IS COMP detect voltage VISCOMP 0.606 0.625 0.644 V LN output sink resistance RsinkLN 1.5 3 6 Ω LN output source resistance RsourceLN 5 10 20 Ω HN output sink resistance RsinkHN 1.5 3 6 Ω HN output source resistance RsourceHN 5 10 20 Ω VBST-VSW=7.0V MAX DUTY MAX DUTY 46.0 48.5 49.5 % FOUT=60kHz, SW=GND, BST=OPEN OFF period TOFF 100 200 400 ns SW=GND, BST=OPEN Drive output frequency FOUT 57.9 60.0 62.1 kHz RT=82kΩ （（VCC UVLO BLOCK）） （（REG BLOCK）） VCC>8.5V, Io=10mA （（OSC BLOCK） （（SOFT START BLOCK）） （（BOSC BLOCK）） （（FEED BACK BLOCK）） （（OUTPUT BLOCK）） （（TIMER LATCH BLOCK） CP timer latch detect voltage VCP 1.9 2.0 2.1 V CP timer latch charge current ICP 0.85 1.0 1.15 μA COMP1 over voltage detect voltage VCOMP1 3.88 4.00 4.12 V Hysteresis width （COMP1） ⊿VCOMP1 0.15 0.20 0.25 V COMP2 over voltage detect voltage VCOMP2 3.88 4.00 4.12 V （（COMP BLOCK）） (This product is not designed to be radiation-resistant.) REV. A VBST-VSW=7.0V 3/4 〇Package Dimensions 〇Block Diagram Device Mark VCC RT REG REG BLOCK D9243 STB BLOCK STB BCT OSC BOSC DUTY DUTY BLOCK SYSTEM ON/OFF SS Lot No. BST1 BST2 FB IS F/B BLOCK ① VS PWM BLOCK ① SS CT LOGIC BLOCK ① HN1 HN BLOCK① HN2 SW1 SW2 REG PROTECT BLOCK LN BLOCK② GND VCC COMP1 COMP2 CP UVLO BLOCK LN1 LN2 PGND SRT VQFN024V4040 (UNIT:mm) ○Pin Description PIN PIN PIN NAME FUNCTION No. PIN NAME FUNCTION No. 1 GND 2 BCT Ground 13 BST1 Boot-strap input for HN1 output 14 REG Regulator output 15 LN1 NMOS FET driver (Ch. 1) 16 PGND Power Ground for FET drivers External capacitor between BCT and GND for adjusting the BURST triangle oscillator 3 DUTY Control Burst-dimming by PWM signal or DC External capacitor between SS and GND for Soft Start Control 4 SS and detect the time of Soft Start 5 CP External capacitor between CP and GND for timer latch 17 LN2 NMOS FET driver (Ch. 2) 6 FB Error amplifier output 18 BST2 Boot-strap input for HN2 output 7 IS Error amplifier input 2 19 HN2 NMOS FET driver (Ch. 2) 8 VS Error amplifier input 1 20 SW2 Lower rail voltage for HN2 output 9 COMP2 Input of over voltage detector2 21 VCC Power supply input with UVLO Protection 10 COMP1 Input of over voltage detector1 22 STB Stand-by switch 11 SW1 Lower rail voltage for HN1 output 23 SRT External resister from SRT to RT for adjusting the start-up Triangle oscilator External resistor between RT and GND for adjustment frequency of saw 12 HN1 NMOS FET driver (Ch. 1) 24 RT tooth wave REV. A 4/4 〇NOTE FOR USE １. When designing the external circuit, including adequate margins for variation between external devices and IC. Use adequate margins for steady state and transient characteristics. ２. The circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended operating range. The standard electrical characteristic values cannot be guaranteed at other voltages in the operating ranges, however the variation will be small. ３. Mounting failures, such as misdirection or miscounts, may harm the device. ４. A strong electromagnetic field may cause the IC to malfunction. ５. The GND pin should be the location within ±0.3V compared with the PGND pin. ６. If the voltage between VCC and I/O pins or GND and I/O pins is in opposite from the normal potential difference, unusual current flow into pins may occur which can destroy the IC. To avoid such occurrence it is recommended to place protection diodes for prevention against backward current flow. ７. BD9243MUV incorporate a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation of the thermal shutdown circuit is assumed. ８. Absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become significantly shortened. Moreover, the exact failure mode caused by short or open is not defined. Physical countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings. ９. About the external FET, the parasitic Capacitor may cause the gate voltage to change, when the drain voltage is switching. Make sure to leave adequate margin for this IC variation. １０. By STB voltage, BD9243MUV are changed to 2 states. Therefore, do not input STB pin voltage between one state and the other state (0.8～2.0V). １１. The pin connected a connector need to connect to the resistor for electrical surge destruction. １２．This IC is a monolithic IC which (as shown is Fig.4)has P+ substrate and between the various pins. A P-N junction is formed from this P layer of each pin. For example, the relation between each potential is as follows, ○(When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.) ○(When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.) Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. Accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin Transistor (NPN) Resistance (PinA) Ｃ (PinB) Ｐ Ｐ Ｎ Ｐ Ｐ Ｎ Ｎ Ｎ Ｂ ＧＮＤ Ｐ Ｐ Ｎ Ｎ P substrate Ｎ P substrate ＧＮＤ ＧＮＤ Parasitic diode Ｅ Parasitic diode (PinB) Ｂ (PinA) Ｃ Ｅ Parasitic diode Parasitic ＧＮＤ ＧＮＤ Other adjacent components Fig.4. Simplified structure of a Bipolar IC REV. A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. 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