APL5525/6

APL5525/5526
Dual Channel 500mA Regulator + Reset IC
Features
General Description
•
•
The APL5525/6 is a dual-channel regulator with reset
function (specific voltage monitoring), and internal
delay circuit, set to detect 3.9V or 4.2V. Maximum
input voltage is 6V, output1 and output2 deliver up to
500mA. VOUT1 typical dropout voltage is 550mV at
500mA loading and VOUT2 typical dropout voltage is
630mV at 500mA loading. Design with an internal Pchannel MOSFET pass transistor, the APL5525/6
maintains a low supply current. Other features include,
thermal-shutdown protection, current limit protection
to ensure specified output current. The APL5525/6
come in miniature SOP-8 and SOP-8-P packages.
•
•
•
•
•
•
•
•
•
•
•
Low Quiescent Current : 130µA (No load)
Low Dropout Voltage :
[email protected]
[email protected]
Fixed Output Voltage :
VOUT1=3.3V/500mA
VOUT2=2.5V/500mA
Stable with 4.7µF Output Capacitor
Stable with Aluminum, Tantalum or Ceramic
Capacitors
Reverse Current Protection
No Protection Diodes Needed
Built in Thermal Protection
Fast Transient Response
Short Setting Time
Pinouts
SOP-8, SOP-8-P with Thermal Pad Packages
Adjustment-free Reset Detection Voltage :
3.9V or 4.2V typ
Easy to Set Delay Time from Voltage
Detection to Reset Release
SOP-8 Top View
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
IN
Applications
•
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
IN
SOP-8-P Top View
CD-ROM drive.
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
IN
APL5525
C d
1
8
C O N T
R E S E T
2
7
G N D
3
6
V
O U T 2
4
5
V
O U T 1
V
D E T
V
IN
APL5526
= Thermal Pad
(connected to GND plane for better heat
dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
1
www.anpec.com.tw
APL5525/5526
Ordering and Marking Information
Package Code
K : SO P-8
KA : SO P-8-P
Tem p. Range
C : 0 to 70 °C
Handling Code
TR : Tape & Reel
Detection Voltage :
A : 3.9V
B : 4.2V
Lead Free Code
L : Lead Free Device
Blank : O riginal Device
APL5525/6 Lead Free Code
Handling Code
Tem p. Range
Package Code
Detection Voltage
APL5525/6 K / KA :
APL5525/6X
XXXXX
X
- Detection Voltage
XXXXX - Date Code
Pin Description
PIN
Name
No.
1
I/O
Cd
RESET
RESET
VDET
VIN
VOUT1
VOUT2
GND
CONT
2
3
4
5
6
7
8
O
O
I
I
O
O
I
Description
Delay time capacitor pin, RESET pin output delay time can be set by
the capacitor connected to the Cd pin. tPLH = 130000∗C, tPLH :
transmission delay time (s), C:capacitor value (F)
Input voltage detection output pin , low = VDET<VS , high = VDET>VS
Input voltage detection output pin , high = VDET<VS , low = VDET>VS
Input pin of voltage detection.
Voltage supply input pin.
Regulator output pin.
Regulator output pin.
GND pin
VOUT1 on/off-control pin, VOUT1 will be turn off when CONT pull to low.
Absolute Maximum Ratings
S ym b o l
V IN , V O U T
CONT
V DET
R T H ,JA
PD
TJ
P aram eter
Input Voltage or O ut Voltage
R atin g
6.5
U n it
V
V O U T 1 S hutdow n C ontrol P in
6.5
V
R E S E T P in S upply Voltage
T herm al R esistance – Junction to A m bient
S O P -8
S O P -8-P
P ow er D issipation
6.5
V
160
80
Internally Lim ited
°C /W
0 to 125
°C
O perating Junction Tem perature
C ontrol S ection
P ow er Transistor
T STG
TL
S torage Tem perature R ange
Lead Tem perature (S oldering, 10 second)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
2
W
0 to 150
-65 to +150
°C
260
°C
www.anpec.com.tw
APL5525/5526
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,
COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
VIN
IQ
Parameter
Test Conditions
APL5525/6
Min.
Typ.
Input Voltage
6
Unit
V
Quiescent Current
IOUT1 =0mA, IOUT2 =0mA
130
µA
Shutdown Supply
Current
CONT = low
IOUT2=0mA, VIN =6.0V
100
µA
Shutdown Input Bias
VCONT =VIN
current
High Threshold Voltage
VCONT
Low Threshold Voltage
ICCQ VDET Input Current
VDET =5V
Regulator1
ICONT
VOUT1
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
Max.
REGLINE Line Regulation
REGLOAD Load Regulation
0.1
1.6
-0.3
VIN=5V
VIN=5V
3.234
20
VIN+0.3
0.4
40
µA
3.3
3.366
V
950
V
mA
500
VOUT+0.5V< VIN<6.0V, IOUT=10mA
VIN =5V, 0mA< IOUT < IMAX
µA
mA
4
25
6
60
mV
mV
550
650
mV
(Note)
Dropout Voltage
(VOUT(Nominal)=3.3V IOUT =500mA
Version)
F≤1kHz, 1Vpp at IOUT=50mA
PSRR Ripple Rejection
Over Temperature
Shutdown
OTS
Over Temperature
Hysteresis
Shutdown Hysteresis
VDROP
TC
COUT
Output Voltage
Temperature
Coefficient
45
Ta= -20 ~ 80°c
Output Capacitor
ESR
50
dB
150
°C
10
°C
100
ppm/°C
4.7
µF
0.01
1
Ohm
2.55
V
Regulator2
VOUT2
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
VIN=5V
VIN=5V
2.45
2.5
950
500
3
mA
mA
www.anpec.com.tw
APL5525/5526
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,
COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
Parameter
REGLINE Line Regulation
REGLOAD Load Regulation
Test Conditions
APL5525/6
Min.
VOUT+0.5V< VIN<6.0V, IOUT=10mA
VIN =5V, 0mA< IOUT < IMAX
Unit
Typ.
Max.
4
30
6
50
mV
mV
630
750
mV
(Note)
Dropout Voltage
VDROP (VOUT(Nominal)=2.5V IOUT =500mA
Version)
F≤1kHz, 1Vpp at IOUT=50mA
PSRR Ripple Rejection
Over Temperature
Shutdown
OTS
Over Temperature
Hysteresis
Shutdown Hysteresis
TC
COUT
Output Voltage
Temperature
Coefficient
45
Ta= -20 ~ 80°c
Output Capacitor
ESR
52
dB
150
°C
10
°C
100
ppm/°C
4.7
µF
0.01
1
Ohm
RESET / RESET
VDET=H!L (APL5525/6A)
3.9
VDET=H!L (APL5525/6B)
4.2
Vs Temperature
Coefficient
Ta = -20~+80°C
100
Hysteresis Voltage
VDET = H!L
VOL
Low-level Output
Voltage
IOH
VS
△VS/△T
△VS
Detection Voltage
130
V
ppm/°C
180
230
mV
VDET = 3.9V, RL = 4.7kΩ
12
60
mV
Output Leakage
Current
VDET = 5V
0.5
1
µA
IOL1
Output Current1
VDET =3.9V, VRESET = 0.4V
25
30
mA
IOL2
Output Current2
VDET = 3.9V, VRESET = 0.4V
Ta = -20~+80°C
20
25
mA
tPLH
“H” Transmission Delay Cd = 0µF
Time
tPLH1
Reset Delay Time
tPHL
“L” Transmission Delay
Cd = 0µF
Time
VOPL
Threshold Operating
Voltage
VDET = 3.7V!5V, Cd = 0.1µF
VRESET = 0.4V
8
42
90
µs
13
18
ms
4
90
µs
0.95
1.25
V
Note : Dropout voltage definition : VIN- VOUT when VOUT is 2% below the value of VOUT for VIN=5V
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
4
www.anpec.com.tw
APL5525/5526
Application Circuit
3.3V
VOUT1
VIN
1µ F
RL
VDET
COUT1
4.7µ F
(ceramic)
APL5525/6
4.7k Ω
2.5V
RESET
Cd
GND
VOUT2
CONT
C OUT2
4.7µ F
(ceramic)
0.1µ F
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
5
www.anpec.com.tw
APL5525/5526
Timing Chart
APL5525
APL5526
V IN . V DET
5V
V IN . V DET
5V
Vs
Vs
Vs
RESET
5V
Vs
RESET
5V
t PLH + t PLH1
0V
0V
CONT
CONT
H
H
L
L
V O UT1
5V
V O UT1
5V
0V
0V
V O UT2
5V
V O UT2
5V
0V
0V
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
6
t PLH + t PLH1
www.anpec.com.tw
APL5525/5526
Typical Characteristics
Quiescent Current vs. Output Current
Quiescent Current vs. Input Voltage
160
600
IOUT1=IOUT2=0mA
VIN = 5V
Quiescent Current (µA)
120
100
80
60
40
20
VOUT1
500
VOUT2
400
300
200
100
0
0
0
1
2
3
4
5
0
6
100
Input Voltage (V)
200
300
400
Output Current (mA)
Output Voltage vs. Input Voltage
Output Voltage vs. Temperature
3.310
3.5
2.508
IOUT1 = IOUT2 = 0mA
2.506
VOUT1
3.305
VOUT1
2.504
2.5
3.300
VOUT1 (V)
Output Voltage (V)
3
500
VOUT2
2
1.5
2.502
VOUT2
3.295
2.500
2.498
3.290
1
VOUT2 (V)
Quiescent Current (µA)
140
2.496
3.285
0.5
2.494
3.280
0
0
1
2
3
4
-25
5
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
2.492
0
25
50
75
100
125
Temperature (°C)
7
www.anpec.com.tw
APL5525/5526
Typical Characteristics
Dropout Voltage vs. Output Current
PSRR vs. Frequency
+0
700
VIN = 5V
-10 IOUT1 = IOUT2 = 50mA
-20
500
PSRR (dB)
Dropout Voltage (mV)
600
VOUT2
400
300
VOUT1
200
-30
VOUT1
-40
-50
VOUT2
-60
100
-70
0
0
100
200
300
400
-80
10
500
100
1k
10k
100k
Frequency (Hz)
Output Current (mA)
Load-Transient Response
Load-Transient Response
VOUT1(200mV/div)
VOUT2(200mV/div)
IOUT1=1mA ~ 500mA
COUT1=4.7uF
IOUT2=1mA ~ 500mA
COUT2=4.7uF
Time (0.1m/div)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
Time(0.1m/div)
8
www.anpec.com.tw
APL5525/5526
Typical Characteristics
Shutdown Response
Line-Transient Response
RLOAD = 100 Ω
VIN = 4.5 ~ 5.5V
VOUT1 (2v/div)
VOUT1(20mV/div)
IOUT1=10mA
COUT1=4.7uF
V OUT2
CONT(2v/div)
VOUT2(20mV/div)
IOUT2=10mA
COUT2=4.7uF
Time (1ms/div)
Time(20µs/div)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
9
www.anpec.com.tw
APL5525/5526
Application Information
Capacitor Selection and Regulator Stability
The APL5538 uses at least a 1uF capacitor on the
input. This capacitor can use Aluminum, Tantalum or
Ceramic capacitors. Input capacitor with large value
and low ESR provides better PSRR and line-transient
response. The output capacitor also can use
Aluminum, Tantalum or Ceramic capacitors, and it’s
minimum values is recommended 4.7uF, ESR muse
be above 0.01Ω. Large output capacitor values can
reduce noise and improve load-transient response,
stability, and PSRR. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with
Temperature. If use this capacitor, it may be necessary to use 4.7uF or more to ensure stability at temperature below -10°C.
RESET
The RESET pin is asserted whenever VDET falls below
the reset threshold voltage or if CONT is forced low at
some special IC(refer timing chart and pin description).
The reset function ensures the microprocessor is properly reset and powers up into a known condition after
a power failure. RESET will remain valid with VIN as
low as 0.95V. The RESET output is a simple opendrain N channel MOSET structure. A pull-up resistor
must be used to pull this output up to some voltage.
For most application, this voltage will be the same
power supply that supplies VIN to the APL5538. The
APL5538 is relatively immune to negative-going
glitches below the reset threshold. Typically reset delay
time is 13ms while using o.1uF at Cd pin. If more
transient immunity is needed, a Cd capacitor can be
placed as larger as possible.
Load-Transient Considerations
Input-Output (Dropout)Voltage
The APL5538 load-transient response graphs in Typical Characteristics show the transient response. A
step change in the load current from 1mA to 500mA
at 1u second will cause less than 300mV transient
spike. Large output capacitor’s value and low ESR
can reduce transient spike.
The minimun input-output voltage differential (dropout)
determines the lowest usable supply voltage. The dropout voltage is a function of drain-to-source on resistance multiplied by the load current.
Current Limit
Shutdown/Enable
APL5538 includes two separate current-limit circuitry
for each linear regulator. The current limit protection,
which sense the current flows the P-channel MOSFET,
and controls the output voltage. The point where limiting occurs is IOUT=950mA. The output can be shorted
The APL5538 has an active high enable function. Force
CONT high (>1.6V) enables the VOUT1 , CONT low (<0.
4V) disables the VOUT1 and VOUT2 can not be affected
by CONT. Enter the shutdown mode, it also causes
the output voltage to discharge through a 500 Ω resistance to ground. In shutdown mode, the quiescent
current can reduce to 100uA. The CONT pin cannot
be floating, a floating CONT pin may cause an indeterminate state on the output. If it is no use, connect
to VIN for normal operation.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
to ground for an indefinite amount of time without damaging to the part.
10
www.anpec.com.tw
APL5525/5526
Application Information
Thermal Protection
heat into ambient air. The vias are recommended to
have proper size to retain solder, helping heat
conduction.
Thermal protection limits total power dissipation in the
APL5538. When the junction temperature exceeds
TJ=+150°C, the thermal sensor generate a logic signal to turn off the pass transistor and let IC to cool.
When the IC’s junction temperature cools by 10°C,
the thermal sensor will turn the pass transistor on again,
resulting in a pulsed output during continuous thermal
protection. Thermal protection is designed to protect
the IC in the event of fault conditions. For continual
operation, do not exceed the absolute maximum junction temperature rating of TJ=+150°C.
102 mil
118 mil
SOP-8-P
Die
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
ambient and junction air temperature, and the rate of
air flow all control the APL5538 maximum power
dissipation. The power dissipation across the device
is P = IOUT (VIN-VOUT). The maximum power dissipation
is:
PMAX = (TJ-TA) / (θJB +θBA )
where TJ-TA is the temperature difference between the
junction and ambient air.
θJB is the thermal resistance of the package, θBA is the
thermal resistance through the printed circuit board,
copper traces, and other materials to the surrounding
air. The GND pin provides an electrical connection to
ground and channeling heat away. Connect the GND
pin to ground using a large pad or ground plane as a
heat sink, it can improve maximize thermal dissipation.
Thermal
pad
Top
ground
pad
Ambient
Air
Vias
Internal
ground
plane
Printed
circuit
board
Figure 1
Figure 2 shows a board layout using the SOP-8-P
package. The demo board is made of FR-4 material
and is a two-layer PCB.
See figure 1. The SOP-8-P utilizes a bottom thermal
pad to minimize the thermal resistance of the package,
making the package suitable for high current
applications. The thermal pad is soldered to the top
ground pad and is connected to the internal or bottom
ground plane by several vias. The printed circuit board
(PCB) forms a heat sink and dissipates most of the
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
11
www.anpec.com.tw
APL5525/5526
Application Information
Top layer
Bottom layer
Figure 2
The data in Table1 was taken using 1/16” FR-4 board
with 2OZ. Copper foil.
COPPER AREA
BOARD
TOPSIDE BACKSIDE AREA
HEAT
SINK
AREA
825
4125
5200
24
Sq. mm
Sq. mm
Sq. mm
Sq. mm
3750
5600
Sq. mm
Sq. mm
0
0
PD(max)
JUNCTION
RESISTANCE
(JUNCTION-TOAMBIENT)
2.2W
57 ℃/w
1.3W
96 ℃/w
Table-1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
12
www.anpec.com.tw
APL5525/5526
Packaging Information
E
e1
0.015X45
SOP-8 pin ( Reference JEDEC Registration MS-012)
H
e2
D
A1
A
1
L
0.004max.
Dim
M illimete rs
Inches
M in .
M ax.
M in.
M ax.
A
1.35
1.75
0.053
0.069
A1
D
E
0.10
4.80
3.80
0.25
5.00
4.00
0.004
0.189
0.150
0.010
0.197
0.157
H
L
e1
e2
5.80
0.40
0.33
6.20
1.27
0.51
0.228
0.016
0.013
0.244
0.050
0.020
φ 1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
1.27BSC
0.50BSC
8°
8°
13
www.anpec.com.tw
APL5525/5526
Packaging Information
E1
E
0.015X45
SOP-8-P pin ( Reference JEDEC Registration MS-012)
H
D1
e1
e2
D
A1
A
A1
D
D1
E
E1
H
L
e1
e2
1
L
0.004max.
Dim
A
M illimeter s
Inc hes
M in .
M ax.
M in .
M ax.
1.3 5
0.1 0
4.8 0
1.7 5
0.2 5
5.0 0
0.0 53
0.0 04
0.1 89
0.0 69
0.0 10
0.1 97
3.0 0R EF
3.8 0
0.11 8REF
4.0 0
0.1 50
2.6 0R EF
5.8 0
0.4 0
0.3 3
φ 1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
0.1 57
0.1 02R EF
6.2 0
1.2 7
0.2 28
0.0 16
0.5 1
0.0 13
0.2 44
0.0 50
0.0 20
1.2 7BS C
0.5 0BS C
8°
8°
14
www.anpec.com.tw
APL5525/5526
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
T L to T P
Temperature
Ram p-up
TL
tL
Tsm ax
Tsm in
Ram p-down
ts
Preheat
25
t 25 °C to Peak
Tim e
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body
Small Body
Average ramp-up rate
3°C/second max.
(TL to TP)
Preheat
- Temperature Min (Tsmin)
100°C
- Temperature Mix (Tsmax)
150°C
- Time (min to max)(ts)
60-120 seconds
Tsmax to TL
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
183°C
- Time (tL)
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
Time within 5°C of actual Peak
10-30 seconds
10-30 seconds
Temperature(tp)
Ramp-down Rate
6°C/second max.
6 minutes max.
Time 25°C to Peak Temperature
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
245 +0/-5°C
250 +0/-5°C
10-30 seconds
20-40 seconds
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
15
www.anpec.com.tw
APL5525/5526
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B,A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C, 5 SEC
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
-65°C~150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
Carrier Tape
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
16
www.anpec.com.tw
APL5525/5526
Reel Dimensions
Application
SOP- 8/-P
A
B
330 ± 1
F
5.5± 1
J
T1
T2
W
P
E
62 +1.5
C
12.75+
0.15
2 ± 0.5
12.4 ± 0.2
2 ± 0.2
12± 0. 3
8± 0.1
1.75±0.1
D
D1
Po
P1
Ao
Bo
Ko
t
2.0 ± 0.1
6.4 ± 0.1
5.2± 0. 1
1.55 +0.1 1.55+ 0.25 4.0 ± 0.1
2.1± 0.1 0.3±0.013
(mm)
Cover Tape Dimensions
Application
SOP- 8/-P
Carrier Width
12
Cover Tape Width
9.3
Devices Per Reel
2500
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Feb., 2004
17
www.anpec.com.tw