202260A.pdf

DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
General Description
Features
The AAT3244 is a dual, low input voltage, low dropout
(LDO) linear regulator. Two integrated regulators provide
high power outputs of 300mA from an input voltage
range of 1.62V to 5.5V.
• Low Input Voltage
▪ 1.62V to 5.5V
• Ultra-Low Adjustable Output Voltage
▪ 3.6V to 0.6V
• High Output Current
▪ 300mA per LDO
• Low Dropout Voltage
▪ Typ 200mV @ 300mA
• Low 85µA Quiescent Current (Both LDOs On)
• High Output Accuracy: ±1.5%
• Independent Input Supply and Enable Pins
• Over-Temperature Protection
• 12-Pin TSOPJW Package
• -40°C to +85°C Temperature Range
The AAT3244 has independent voltage inputs and enable
pins for increased design flexibility. The device features
a very low quiescent current (typically 85µA) and low
dropout voltages (200mV at full load), making it ideal for
portable applications where battery life is critical.
The AAT3244 is available in a space-saving, Pb-free
12-pin TSOPJW package and is capable of operation over
the -40°C to +85°C temperature range.
Applications
•
•
•
•
•
Cellular Phones
Digital Cameras
Handheld Instruments
Microprocessor/DSP Core/IO Power
PDAs and Handheld Computers
Typical Application
VIN = 3.6V
INA
Enable A
VCC
VOUTA = 1.8V
OUTA
118k
ENA
FBA
59k
INB
OUTB
267k
CIN
1µF
Enable B
FBB
ENB
GND
VOUTB = 3.3V
2.2µF
2.2µF
59k
GND
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1
DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Pin Descriptions
Pin #
Symbol
1
OUTA
2
INA
3
FBA
4
FBB
5
6
8
9
7, 10, 12
11
INB
OUTB
ENB
VCC
GND
ENA
Function
300mA regulator output pin; should be closely decoupled with a low equivalent series resistance (ESR)
ceramic capacitor.
Input voltage pin for LDOA; should be closely decoupled.
Feedback input pin for LDOA. This pin is connected to OUTA. It is used to see the output of LDOA to regulate to the desired value via an external resistor divider.
Feedback input pin for LDOB. This pin is connected to OUTB. It is used to see the output of LDOB to regulate to the desired value via an external resistor divider.
Input voltage pin for LDOB; should be closely decoupled.
300mA regulator output pin; should be closely decoupled with a low ESR ceramic capacitor.
Enable pin for LDOB. Active high. VEN must be less than or equal to VCC.
Input bias supply. Connect to an “always ON” supply voltage between 2.7V and 5.5V.
Ground connection pin.
Enable pin for LDOA. Active high. VEN must be less than or equal to VCC.
Pin Configuration
TSOPJW-12
(Top View)
2
OUTA
1
12
GND
INA
2
11
ENA
FBA
3
10
GND
FBB
4
9
VCC
INB
5
8
ENB
OUTB
6
7
GND
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Absolute Maximum Ratings1
Symbol
VCC, VIN
VFB
VEN
TJ
TLEAD
Description
Input Voltage, LDO Input Voltage to GND
FB to GND
EN to GND
Operating Junction Temperature Range
Maximum Soldering Temperature (at leads, 10 sec)
Value
- 0.3 to 6.0
-0.3 to VIN + 0.3
-0.3 to 6.0
-40 to 150
300
Units
V
°C
Thermal Information
Symbol
PD
qJA
Description
Maximum Power Dissipation (TA = 25°C)
Thermal Resistance2
Value
Units
625
160
mW
°C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions
specified is not implied.
2. Mounted on an FR4 board.
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Electrical Characteristics1
VCC = VINA = VINB = 3.6V; TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C.
Symbol
Description
Bias Power Supply
VCC
Bias Power Supply Input
IQ
Quiescent Current
ISHDN
Shutdown Current
UVLO
Under-Voltage Lockout Voltage
Conditions
Min
2.7
VENA = VENB = VIN; ILOAD = 0
VENA = VENB = GND
VCC Rising
Hysteresis
LDOA, LDOB; IOUT = 300mA
VIN
Input Voltage
VOUT
VFB
VDO
DVOUT/
VOUT /DVIN
VEN(L)
VEN(H)
tEN
IOUT
ISD
TSD
THYS
Output Voltage Tolerance
IOUT = 1mA to
300mA
TA = 25°C
TA = -40°C to +85°C
Feedback Voltage
Dropout Voltage2
IOUT = 300mA
Line Regulation3
VIN = VOUT + 1.0V to 5.0V
Enable Threshold Low
Enable Threshold High
Turn-On Enable Time
Output Current
Shutdown Current
Over-Temperature Shutdown Threshold
Over-Temperature Shutdown Hysteresis
Typ
85
Max
Units
5.5
160
1.0
2.6
V
µA
µA
V
mV
5.5
2.0
3.5
0.606
300
V
V
mV
0.09
%/V
0.6
VCC
V
V
µs
mA
µA
°C
°C
200
1.62
-2.0
-3.5
0.594
0.6
200
1.5
100
VIN(MIN) = 2.5V
VIN = 5V
300
1.0
140
15
%
1. The AAT3244 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured by design, characterization, and correlation with statistical process controls.
2.VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
3.CIN = 10µF.
4
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Typical Characteristics
Dropout Voltage vs. Temperature
Output Voltage vs. Input Voltage
(VOUT = 2.5V)
220
2.60
200
2.55
100mA
Output Voltage (V)
Dropout Voltage (mV)
(VOUT = 2.5V; IOUT = 300mA)
180
160
140
120
100
80
60
-40
-15
10
35
60
2.40
2.35
2.25
Output Voltage (V)
Output Voltage (V)
1.55
1.70
1.60
1.50
100mA
200mA
300mA
1.30
2.0
2.1
2.2
2.3
2.4
3.0
1.50
1.45
1.40
1.35
100mA
200mA
300mA
1.30
1.25
1.20
1.6
2.5
Input Voltage (V)
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Input Voltage (V)
Dropout Voltage vs. Output Current
Quiescent Current vs. Input Voltage
(VOUT = 2.5V)
(VOUT = 2.5V)
180
120
Quiescent Current (µA)
Dropout Voltage (mV)
2.9
(VOUT = 1.5V; VCC = 3.6V)
1.60
1.40
2.8
Output Voltage vs. Input Voltage
1.80
1.9
2.7
Input Voltage (V)
1.90
1.8
2.6
(VOUT = 1.8V; VCC = 3.6V)
1.7
150mA
2.30
Output Voltage vs. Input Voltage
1.20
1.6
300mA
250mA
200mA
2.45
2.20
2.5
85
Temperature (°C)
50mA
2.50
160
85°C
140
120
25°C
100
80
60
40
-40°C
20
0
110
100
85°C
25°C
90
80
70
60
-40°C
50
40
0
50
100
150
200
Output Current (mA)
250
300
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Typical Characteristics
Quiescent Current vs. Temperature
Output Voltage vs. Temperature
(VOUT = 2.5V)
(VIN = 3.6V; VOUT = 2.5V)
2.60
VIN = 3.0V
86
VIN = 3.6V
84
82
2.58
Output Voltage (V)
Quiescent Current (µA)
88
VIN = 4.2V
80
78
76
74
72
-40
-15
10
35
60
2.56
2.54
50mA
2.52
300mA
2.50
2.48
2.46
2.44
2.42
-40
85
Temperature (°C)
100mA
200mA
-15
2.5
2
2.0
0
1.5
1.0
0.5
0.0
Output Voltage Error (%)
Enable (top) (V)
4
2.00
Output Voltage (bottom) (V)
3.0
Time (50µs/div)
1.50
1.00
VIN = 2.7V
0.50
VIN = 3.0V
0.00
-0.50
VIN = 3.6V
-1.00
VIN = 4.2V
-1.50
-2.00
1
10
100
1000
Output Current (mA)
Load Transient
Load Transient
(1mA–200mA; VOUT = 1.8V)
(200mA–300mA; VOUT = 1.8V)
0.1
50
25
0
-25
-50
Output Current (top) (A)
0.2
0.2
0.1
0.0
150
100
50
0
-50
-100
Time (50µs/div)
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Output Voltage (AC coupled)
(bottom) (mV)
0.3
0.3
Output Voltage (AC coupled)
(bottom) (mV)
0.4
Output Current (top) (A)
85
(VOUT = 2.5)
6
0
6
60
Load Regulation
(VOUT = 1.8V)
Time (50µs/div)
35
Temperature (°C)
Turn-On Time
0.0
10
DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Typical Characteristics
Line Transient
Over-Current Protection
(3.6V– 4.2V; VOUT = 1.8V)
3.5
3.0
2.5
100
2.0
50
1.5
0
1.0
-50
0.5
-100
Time (50µs/div)
3.5
3.0
2.5
Current (A)
Input Voltage (top) (V)
4.0
Output Voltage (AC coupled)
(bottom) (mV)
4.5
2.0
1.5
1.0
0.5
0.0
Time (50ms/div)
Ground Current vs. Input
= 4.2V
VINVoltage
Enable Threshold Voltage vs.VINInput
= 4.2VVoltage
VIN = 2.7V
1.4
130
1.3
120
Ground Current (µA)
Enable Voltage (V)
VIN = 2.7V
VIN = 3.6V
1.2
1.1
VIH
1.0
0.9
0.8
0.7
VIL
VIN = 3.6V
110
100
IOUT = 300mA
IOUT = 100mA
90
80
IOUT = 50mA
IOUT = 10mA
70
60
0.6
2.5
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
3
3.5
4
4.5
5
5.5
Input Voltage (V)
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Functional Block Diagram
INA
OUTA
ENA
FBA
VCC
LDO
Bias
Voltage
Reference
FBB
ENB
INB
OUTB
GND
Functional Description
Applications Information
The AAT3244 is a high performance, low input voltage,
dual LDO linear regulator. Both LDOA and LDOB are
capable of delivering 300mA of current within power dissipation limits. The LDOs are designed to operate with
low-cost ceramic capacitors. For added flexibility, both
regulators have independent input voltages operating
from 1.62V to 5.5V, but share a common bias voltage,
VCC. The VCC voltage should be tied to the highest system
voltage available and should be available at all times.
Each regulator has an independent enable pin. An external feedback pin for each LDO allows programming the
output voltage from 3.6V to 0.6V. The regulators have
thermal protection in case of adverse operating conditions.
To assure the maximum possible performance is obtained
from the AAT3244, please refer to the following application recommendations.
Refer to the Thermal Considerations section of this
datasheet for details on device operation at maximum
output current loads.
Input Capacitor
A 1µF or larger capacitor is typically recommended for
CIN in most applications. A CIN capacitor is not required
for basic LDO regulator operation. However, if the
AAT3244 is physically located more than three centimeters from an input power source, a CIN capacitor will be
needed for stable operation.
CIN should be located as close to the device supply pin as
practically possible. CIN values greater than 1µF will offer
superior input line transient response and will assist in
maximizing the highest possible power supply ripple
rejection.
Ceramic, tantalum, or aluminum electrolytic capacitors
may be selected for CIN. There is no specific capacitor
ESR requirement for CIN. However, for 300mA LDO regu-
8
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
lator output operation, ceramic capacitors are recommended due to their inherent capability to withstand
input current surges from low impedance sources such
as batteries in portable devices, over tantalum capacitors, for CIN.
Output Capacitor
For proper load voltage regulation and operational stability, a capacitor is required between pins OUT and
GND. The COUT capacitor connection to the LDO regulator
ground pin should be made as direct as practically possible for maximum device performance.
The AAT3244 has been specifically designed to function
with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended.
Typical output capacitor values for maximum output current conditions range from 1µF to 10µF. Applications
requiring low output noise and optimum power supply
ripple rejection should use 2.2µF or greater for COUT. If
desired, COUT may be increased without limit. In low output current applications where output load is less than
10mA, the minimum value for COUT can be as low as
0.47µF.
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use with the
AAT3244. Ceramic capacitors offer many advantages
over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically has very low ESR, is
lower cost, has a smaller PCB footprint, and is nonpolarized. Line and load transient response of the LDO
regulator is improved by using low ESR ceramic capacitors. Since ceramic capacitors are non-polarized, they
are not prone to incorrect connection damage.
Ceramic Capacitor Materials
Ceramic capacitors less than 0.1µF are typically made
from NPO or C0G materials. NPO and C0G materials generally have tight tolerance and are very stable over temperature. Larger capacitor values are usually composed of
X7R, X5R, Z5U, or Y5V dielectric materials. The last two
material types are not recommended for use with LDO
regulators since the capacitor tolerance can vary more
than ±50% over the operating temperature range of the
device. A 2.2µF Y5V capacitor could be reduced to 1µF
over temperature; this could cause problems for circuit
operation. X7R and X5R dielectrics are much more desirable. The temperature tolerance of X7R dielectric is better
than ±15%. Capacitor area is another contributor to ESR.
Capacitors which are physically large in size will have a
lower ESR when compared to a smaller sized capacitor of
an equivalent material and capacitance value. These
larger devices can improve circuit transient response
when compared to an equal value capacitor in a smaller
package size. Consult capacitor vendor datasheets carefully when selecting capacitors for LDO regulators.
Enable Function
The AAT3244 features an LDO regulator enable/disable
function. Each LDO has its own dedicated enable pin.
These pins (ENA, ENB) are active high and are compatible with CMOS logic. To assure the LDO regulators will
switch on,
1.5V ≤ VEN ≤ VCC
In shutdown, the AAT3244 will consume less than 1.0µA
of current. If the enable function is not needed in a specific application, it may be tied to VCC to keep the LDO
regulator in a continuously on state.
Equivalent Series Resistance
ESR is a very important characteristic to consider when
selecting a capacitor. ESR is the internal series resistance associated with a capacitor that includes lead
resistance, internal connections, size and area, material
composition, and ambient temperature.
Typically, capacitor ESR is measured in milliohms for
ceramic capacitors and can range to more than several
ohms for tantalum or aluminum electrolytic capacitors.
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9
DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Thermal Protection
VOUT from exceeding VIN. In applications where there is a
greater danger of VOUT exceeding VIN for extended periods of time, it is recommended to place a Schottky diode
across INA/B to OUTA/B (connecting the cathode to
INA/B and anode to OUTA/B). The Schottky diode forward voltage should be less than 0.45V.
The AAT3244 has an internal thermal protection circuit
which will activate when the device die temperature
exceeds 140°C. The LDO regulator output will remain in
a shutdown state until the internal die temperature falls
back approximately 15°C below the trip point.
Low Voltage Input Bias Considerations
No-Load Stability
The input voltage of both LDOs is designed to operate
down to 1.62V input. However, to operate the LDO to its
full potential, the AAT3244 requires a minimum bias
voltage (VCC) of 2.7V for all LDO input voltages between
1.62V and 2.7V. In portable systems utilizing single-cell
Lithium-ion batteries, the VCC pin may be connected
directly to the battery. In non-portable applications, the
voltage can be connected to any supply from 2.7V to
5.5V. In the event that one of the input supplies is above
2.7V, this can also be connected to VCC, assuming that
the supply will always be available.
The AAT3244 is designed to maintain output voltage
regulation and stability under operational no-load conditions. This is an important characteristic for applications
where the output current may drop to zero.
Reverse Output-to-Input Voltage
Conditions and Protection
Under normal operating conditions, a parasitic diode
exists between the output and input of the LDO regulator. The input voltage should always remain greater than
the output load voltage, maintaining a reverse bias on
the internal parasitic diode.
Adjustable Output Resistor Selection
Resistors R1, R2 and R3, R4 of Figure 1 program the
outputs to regulate at a voltage higher than 0.6V. To
limit the bias current required for the external feedback
resistor string while maintaining good noise immunity,
the suggested value for R2 and R4 is 59kW. Decreased
resistor values are necessary to maintain noise immunity on the FB pin, resulting in increased quiescent current. Table 1 summarizes the resistor values for various
output voltages.
Conditions where VOUT might exceed VIN should be avoided since this would forward bias the internal parasitic
diode and allow excessive current flow into the OUTA/B
pins, possibly damaging the LDO regulator. In applications where there is a possibility of VOUT exceeding VIN for
brief amounts of time during normal operation, the use
of a larger value CIN capacitor is highly recommended. A
larger value of CIN with respect to COUT will result in a
slower CIN decay rate during shutdown, thus preventing
VCC
9
12
7
INA
2
C1
1uF
ENA
11
GND
TSOPJW-12
VCC
OUTA
R1
Adj.
GND
FBA
ENA
INB
C2
1uF
ENB
8
ON/OFF
C4
R2
59K
AAT3244
FBB
GND
10
(Optional)
6
R3
Adj.
INB
ENB
22pF
2.2uF
OUTB
5
OUTA
C6
3
INA
ON/OFF
(Optional)
1
4
OUTB
C7
22pF
C5
2.2uF
R4
59K
Figure 1: AAT3244 Schematic.
10
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
 VOUT 
R1 = V
- 1 · R2
 REF 
With enhanced transient response for extreme pulsed
load application, an external feed-forward capacitor, (C6
and C7 in Figure 1), can be added.
VOUT (V)
R2 = 59kW
R1 (kW)
R2 = 221kW
R1 (kW)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.8
1.85
2.0
2.5
3.3
3.6
19.6
29.4
39.2
49.9
59.0
68.1
78.7
88.7
118
124
137
187
267
295
75
113
150
187
221
261
301
332
442
464
523
715
1000
1105
Table 1. Adjustable Resistor Values For
LDO Regulator.
Thermal Considerations and High Output
Current Applications
The AAT3244 is designed to deliver continuous output
load currents of 300mA under normal operating conditions and can supply up to 600mA during circuit start-up
conditions. This is desirable for applications where there
might be a brief high inrush current during a power-on
event. The limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal
limit of the device. In order to obtain high operating currents, careful board layout and circuit operating conditions need to be taken into account. The following discussions will assume the LDO regulator is mounted on a
printed circuit board utilizing the minimum recommended footprint as stated in the layout considerations section of this document. At any given ambient temperature
(TA), the maximum package power dissipation can be
determined by the following equation:
PD(MAX) =
TJ(MAX) - TA
θJA
Constants for the AAT3244 are TJ(MAX) (the maximum
junction temperature for the device, which is 125°C) and
qJA = 160°C/W (the package thermal resistance).
Typically, maximum conditions are calculated at the
maximum operating temperature of TA = 85°C and under
normal ambient conditions where TA = 25°C. Given TA =
85°C, the maximum package power dissipation is
250mW. At TA = 25°C, the maximum package power dissipation is 625mW. The maximum continuous output current for the AAT3244 is a function of the package power
dissipation and the input-to-output voltage drop across
the LDO regulator. To determine the maximum output
current for a given output voltage, refer to the following
equation. This calculation accounts for the total power
dissipation of the LDO regulator, including that caused by
ground current.
PD(MAX) = [(VIN - VOUTA)IOUTA + (VIN · IGND)] + [(VIN - VOUTB)IOUTB + (VIN · IGND)]
This formula can be solved for IOUTA to determine the
maximum output current for LDOA:
IOUTA(MAX) =
PD(MAX) - (2 · VIN · IGND) - (VIN - VOUTB) · IOUTB
VIN - VOUTA
The following is an example for a 2.5V output:
VOUTA = 2.5V
VOUTB = 1.5V
IOUTB = 150mA
VIN = 4.2V
IGND = 125µA
IOUTA(MAX) =
625mW - (2 · 4.2V · 125µA) - (4.2 - 1.5) · 150mA
4.2 - 2.5
IOUTA(MAX) = 129mA
From the discussion above, PD(MAX) was determined to
equal 625mW at TA = 25°C.
Therefore, with Regulator B delivering 150mA at 1.5V,
Regulator A can sustain a constant 2.5V output at a
129mA load current at an ambient temperature of 25°C.
Higher input-to-output voltage differentials can be
obtained with the AAT3244, while maintaining device
functions within the thermal safe operating area. To
accomplish this, the device thermal resistance must be
reduced by increasing the heat sink area or by operating
the LDO regulator in a duty-cycled mode.
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11
DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
For example, an application requires VIN = 4.2V while
VOUTA = 1.5V at a 300mA load, VOUTB = 1.5V at a 200mA
load, and TA = 25°C. To maintain this high input voltage
and output current level, the LDO regulator must be
operated in a duty-cycled mode.
Refer to the following calculation for duty-cycle operation:
IGND = 125μA
IOUTA = 300mA
IOUTB = 200mA
VIN = 4.2V
VOUT = 1.5V
PD(MAX) is assumed to be 625mW
%DC =
100(PD(MAX))
[(VIN - VOUTA)IOUTA + (VIN · IGND)] + [(VIN - VOUTB)IOUTB + (VIN · IGND)]
%DC =
100 · 625mW
[(4.2V - 1.5V)300mA + (4.2V · 125µA)] + [(4.2V - 1.5V)200mA + (4.2V · 125µA)]
%DC = 46.3%
%DC = 46.3%
For a 300mA output current and a 2.7V drop across the
AAT3244 at an ambient temperature of 25°C, the maximum on-time duty cycle for the device would be 46.3%.
Under-Voltage Lockout
Under-voltage lockout (UVLO) guarantees sufficient VCC
bias and proper operation of all internal circuits prior to
activation.
Printed Circuit Board Layout
Recommendations
The suggested PCB layout for the AAT3244 in a TSOPJW-12
package is shown in Figures 2 and 3. The following guidelines should be used to help ensure a proper layout.
1. Connect the input capacitors (C1 and C2) connect as
close as possible to input pins (Pin 2 and Pin 5) and
GND (Pin 10).
2. Separate the output traces of the feedback resistors
(R1 and R3) from any power trace and connect as
close as possible to the load point. Sensing along a
high-current load trace will degrade DC load regulation. Place feedback resistors as close as possible to
the FB pin (Pin 3 and Pin 4) to minimize the length
of the high impedance feedback trace.
3. Keep the resistance of the trace from the load
returns to GND (Pin 10) to a minimum. This will help
to minimize any error in DC regulation due to differences in the potential of the internal signal ground
and the power ground.
4. The feedback node is connected directly to the noninverting input of the error amplifier, thus any noise
or ripple from the divider resistors will be subsequently amplified by the gain of the error amplifier.
This effect can increase noise seen on the LDO regulator output, as well as reduce the maximum possible power supply ripple rejection. For low output
noise and highest possible power supply ripple rejection performance, it is critical to connect the divider
resistors (R2 and R4) and output capacitors (C4 and
C5) directly to the LDO regulator ground pin. This
method will eliminate any load noise or ripple current feedback through the LDO regulator.
Evaluation Board Layout
The AAT3244 evaluation layout follows the recommended printed circuit board layout procedures and can be
used as an example for good application layouts (see
Figures 2 and 3).
Note: Board layout shown is not to scale.
12
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Figure 2: AAT3244 Evaluation Board Top Side Layout.
Figure 3: AAT3244 Evaluation Board Bottom Side Layout.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
202260A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • August 10, 2012
13
DATA SHEET
AAT3244
300mA Adjustable Dual CMOS Low Voltage LDO Linear Regulator
Ordering Information
Voltage
Package
LDO A
LDO B
Marking1
Part Number (Tape and Reel)2
TSOPJW-12
0.6V
0.6V
WTXYY
AAT3244ITP-AA-T1
Skyworks Green™ products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of Green™, document number
SQ04-0074.
Package Information
TSOPJW-12
2.85 ± 0.20
2.40 ± 0.10
0.20 + 0.10
- 0.05
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
7° NOM
0.055 ± 0.045
All dimensions in millimeters.
0.04 REF
0.15 ± 0.05
+ 0.10
1.00 - 0.065
0.9625 ± 0.0375
3.00 ± 0.10
4° ± 4°
0.45 ± 0.15
0.010
2.75 ± 0.25
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
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