ANP017: Designing low-cost, multiple output DC/DC converters

APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
1. Introduction _________________________________________________
Power supply circuitry is always limited by cost, PCB area, height and by the desire to reduce complexity.
The majority of systems today are mixed-signal, and in all but the simplest cases, the various analog and
digital circuits need several different supply voltages to operate. One way to add additional outputs to a
power supply without adding additional control ICs is to replace the standard inductor of a buck regulator
with a multi-winding inductor. One winding is energized by the buck regulator, and there are many ways to
create a second output by rectifying and filtering the voltage induced in the second winding. Buck regulators
are found in nearly every power supply architecture, and the multi-winding inductor can be custom-wound to
provide various turns ratios and even multiple outputs, but in the interest of controlling both complexity and
cost, this application note will focus on off-the-shelf, 1:1 coupled inductors. Würth Elektronik eiSos offers
several families of 1:1 coupled inductors with varying power levels and pinouts, many of which are suitable
for adding a secondary output to a buck regulator.
2. The Three Most Common Used Topologies _______________________
Figures 1a, 1b and 1c show the three topologies that are most often used. Figure 1a shows how the
secondary voltage, VOUT2 can be stacked on the main output voltage, VOUT1, creating a total voltage with
respect to system ground of (2 x VOUT1).
Figure 1b shows how the return of the secondary output can be connected to the common of an isolated
secondary, creating an isolated voltage that could be used to power sensors or isolated communications
equipment. (Note: most 1:1 inductors are not rated to withstand the voltages in isolated AC mains or telecom
circuits. Isolation with 1:1 inductors is used to insulate against electrical noise.) In this case, the average
value of VOUT2 is equal to VOUT1.
Figure 1c shows how the system ground can be shifted to the other side of the secondary output capacitor to
create a negative voltage. In this case, the absolute value of V OUT2 is equal to VOUT1.
Figure 1a: Stacked for 2x VOUT
Figure 1b: Isolated VOUT2
Figure 1c: Negative VOUT2
In all three cases the control loop of the buck regulator only regulates VOUT1, and hence the actual value of
VOUT2 will vary with input voltage, with the voltage drops across the output diode in the secondary, with the
load currents in both the main output and the secondary output and with duty cycle. For this reason a linear
regulator is often used on the secondary to provide a truly regulated secondary output voltage.
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
3. Design Example ______________________________________________
The following equations and design philosophies will guide the user through the steps needed to add a
secondary output to a non-synchronous buck regulator using a control IC with a fixed current limit. Most buck
regulator ICs with internal power MOSFETs have a comparator that monitors the current flowing through the
control or “high-side” MOSFET (Q1 in Figure 1), which is equal to the main inductor current when this
MOSFET is on. Good quality ICs will specify a minimum threshold for this current limit over the full range of
operating temperature, and in most cases when this limit is reached the IC will immediately turn the
MOSFET off. As will be shown, this represents a maximum output power that must be shared between the
main output and the secondary output. For the design example the IC used will be the TPS54160 from
Texas Instruments. The Electrical Characteristics table of the datasheet states that the minimum current limit
threshold over the full temperature range is 1,8A. The design specifications are as follows:
VIN = 10 V to 14 V, nominal 12 V. Input ripple voltage ∆vIN = 0,2 VP-P
VOUT1 = 5,0 V, IO1 = 400 mA to 500 mA, continuous. Output ripple ∆vO1 = 60 mVP-P
VOUT2 = 5 V (by definition), IO2-MAX = 200 mA. Output ripple ∆vO2 = 60 mVP-P
Switching Frequency, fSW = 500 kHz
Estimated Efficiency, η = 90 %
POUT = 3,5 W
The selection of the external components is the same regardless of how the secondary is connected; hence
these calculations are valid for the cases shown in Figure 1a, 1b and 1c.
4. The 1:1 Inductor ______________________________________________
Magnetics form the heart of any switching converter, from this example delivering 3,5 W to a multiphase fullbridge converter delivering kilowatts of power. For the 1:1 coupled buck the principal difference from a
standard buck is the increase in peak-to-peak ripple current induced in the main (primary) winding. This is
due to the additional energy stored and delivered to the secondary output, and the induced current changes
the waveshape from a triangle wave to a trapezoid wave. Figure 2 shows the currents in the primary winding
in pink and the secondary winding in green. The dot convention of the two windings is arranged so that the
secondary winding conducts while the control MOSFET is off and the recirculating diode (D1) is on. In this
way the average voltage over a switching cycle applied to the secondary is approximately equal to V OUT1.
Figure 2: Primary (pink) and Secondary (green) Currents in the 1:1 Coupled Inductor
VIN = 12,0 V, VO1 = 5,0 V, VO2 ≈ VO1, IO1 = 500 mA, IO2 = 100 mA
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
It is important to distinguish between the average current and the DC current for the secondary. “Average
Current”, IS-AVG, refers to the average height of the trapezoid waveform. “DC Current”, I O2-MAX, refers to the
average current delivered to the load on the secondary. These two currents are not the same value, and
much confusion can result from mixing them up. For clarity, the Average Current of a trapezoid waveform is
equal to the DC Current divided by one minus the duty cycle. For the case of the secondary in a 1:1 coupled
buck the maximum values are of interest for worst case calculations:
DMAX 
VOUT 1  VD1
5  0,5

 0,54 EQ.1
VIN  MIN  VD1 10  0,5
I A AVG 
I O 2 MAX
0,2 A

 0,43 A EQ.2
1  DMAX
0,46
VD1 is the typical forward voltage of the recirculating diode, D1
The inductance per winding is selected in the same way as with a standard buck, and is based upon the
control of the peak-peak ripple current in the primary winding, denoted Δip-TRI:
DMIN 
VOUT 1  VD1
5  0,5

 0,39 EQ.3
VIN  MAX  VD1 14  0,5
LMIN  DMIN
VIN  MAX  VOUT 1
EQ.4
i P TRI  f SW
5. Inductor Ripple Current _______________________________________
One of the most important decisions to be made in designing the converter is how much ripple to allow. In
normal buck converters the peak-peak ripple is usually set at 20 % to 40 % of the maximum DC output
current. The range of 20 % to 40 % represents a good compromise, tested and confirmed by the design of
countless switching converters, and gives a balance between size (larger ripple requires less inductance and
therefore smaller inductors) and efficiency/noise (smaller ripple leads to lower RMS currents and lower EMI).
EQ.4 selects the inductance for the purely triangular portion of the primary ripple current, but the total ripple
current, ∆iP, is equal to the sums of primary triangular and the total secondary ripple currents. Due to this
additional ripple, the recommended range for ∆iP-TRI is lower - from 10 % to 30 % of the maximum output
current of the primary, IO1-MAX. For this example ∆iP-TRI = 30 % = 0,15 A:
LMIN  0.39
14V  5V
 45,5H
0.15 A  500kHz
The next highest standard value of inductance is 47 µH, and this value, denoted L1, will be used henceforth.
The triangular portion of primary ripple current is then:
i P TRI  DMIN
VIN  MAX  VOUT 1
14V  5V
 0.39
 0,146 AP  P
L1  f SW
47 H  500kHz
Calculating the ripple current in the secondary is unfortunately much less straightforward. This quantity is
highly dependent upon the leakage inductance of the 1:1 inductor, the load current, the forward voltage drop
of the output diode, and the DC resistance (DCR) of the inductor windings (Figure 3).
RDC
+
LLEAK/2
LLEAK/2
RDC
+VRDC-
VOUT1
-
+VD2-
IOUT2
Figure 3: 1:1 Inductor with 1st Order Parasitic Components and Voltage Drops
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
Closer inspection, especially at higher secondary output currents reveals that Δi S is not purely triangular, but
is in fact a parabola due to the trapezoid waveform of the voltage applied across the leakage inductance. An
approximate equation is given here, based upon the assumption that the average voltage across the leakage
inductance is constant and is equal to the forward voltage of the output diode:
iS 
2  VD 2
2  0,5V
(1  DMIN )  iS 
(0,62)  0,40 AP  P EQ.5
LLEAK  f SW
3,1H  500kHz
The difficulty in using this expression stems from accurately measuring the leakage inductance and from
accurately predicting (or measuring) the diode voltage VD2. Leakage inductance is not always specified by
inductor manufacturers, but it can be measured by short-circuiting one set of terminals of the inductor and
measuring the inductance of the other terminals. For this example LLEAK was measured as 3,1 µH. Diode
voltage must be assumed, hence a value of 0,5 V will be used. With ΔiS estimated the total primary ripple
current can be calculated:
iP  iPTRI  iS  0,146 A  0,40  0,55 AP P EQ.6
Peak current can now be calculated for the primary:
I P  PEAK  I O1 MAX 
i P
0,55 A
 0.5 A 
 0,77 A EQ.7
2
2
Peak current can be calculated for the secondary after the peak-peak secondary ripple current has been
calculated:
I S  PEAK  I S  AVG 
iS
0,40 A
 0,42 A 
 0,62 A EQ.8
2
2
The final step required before an actual inductor can be selected is to calculate the RMS currents for both
the primary and the secondary. For the primary, using the DC output current is quick and very close to the
true RMS value. For the secondary, the RMS value of a trapezoid wave is:
I S  RMS  I S  AVG 1  DMAX
1  iS
1  
3  I S  AVG
2

  0,33 ARMS

EQ.9
6. The Right Inductor ____________________________________________
In conclusion, the desired inductor should have an inductance of 47 µH per winding, be able to support a
peak current of 0,77 A without saturating, and able to carry RMS currents of 0,5 A in one winding and 0,33 A
in the other without overheating. With 1:1 coupled inductors it is especially important to read the datasheets
carefully and to understand the conditions under which the saturation and RMS current ratings are valid.
Good quality manufacturers will state these conditions explicitly. The Würth Elektronik WE-DD series of
coupled inductors includes the 744 878 470, whose electrical characteristics are repeated below:
Order
L
Code
(µH)
744878470 47
IR
(A)
0,9
ISAT
(A)
1
RDC-TYP
(Ω)
0,6
IR 40ºK over ambient temperature when both windings in series are energized by rated current mentioned. ISAT
inductance drop of 10% typical when one winding by saturation current mentioned
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
The ISAT rating is for the combination of the currents in both windings, however one fortunate aspect of 1:1
coupled bucks is that when current in one winding is at its peak, current in the other winding is at its valley,
and hence the primary peak current IP-PEAK represents the worst case.
7. Limits for Maximum Secondary Current __________________________
Two conditions limit the maximum current that the secondary output of a 1:1 coupled buck can deliver. The
first is derived from the current limit threshold of the control IC. For this example where I LIM = 1,8 A:
I O 2 LIMIT  (1  DMIN )(2  I LIM  2  I O1MAX  iPTRI )  0.62  (3,6 A  1,0 A  0,146 A)  1,52 A EQ.10
This condition is most likely to occur when both outputs are delivering maximum load current and when input
voltage is at a maximum.
The second limitation comes from the boundary between Continuous Conduction Mode (CCM), where the
current in the primary winding never reaches zero, and Discontinuous Conduction Mode (DCM), where
primary current falls to zero before the end of the switching cycle. This limitation applies to non-synchronous
buck converters and some synchronous buck converters if their control ICs do not allow inductor current to
reverse polarity. Once the converter enters DCM the average voltage across the primary winding is less than
VOUT1. VOUT2 tends to droop or even collapse, depending upon the load current it supplies. For all switching
regulators the CCM/DCM boundary can be defined as the point when average inductor current equals onehalf of the ripple current. Referring back to Figure 2, it is clear that this condition is most likely to occur when
primary load current is low and secondary load current is high.
Writing a useful equation is difficult because of the high variability of the secondary ripple current and its
dependence upon the non-linear relationship of the secondary output diode forward voltage to forward
current. Lab testing is the best way to determine when the converter will enter DCM, and a current probe will
show the exact point where primary current hits zero. If a current probe is not available, then a voltage probe
and a multimeter will work. Figure 4 shows the switch-node voltage of the primary (where the control FET,
inductor primary and diode all connect) just in DCM. The voltage probe will reveal the onset of a damped
oscillation before the end of each switching cycle, and a multimeter will show the rapid drop in V O2 once
DCM is reached.
Figure 4: Primary switch node voltage (yellow). The section circled in red indicates DCM.
VIN = 10,0 V, VO1 = 5,0 V, VO2 ≈ 3,0 V, IO1 = 500 mA, IO2 = 200 mA
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
If the desired secondary load current IO2-MAX is higher than the lower of these two limits, there are several
remedies:
1. Current ripple can be reduced by increasing the inductance, increasing the switching frequency, or
both. This helps with both types of limit.
2. For current limit: a different control IC with a higher current limit threshold or a controller with external
power MOSFETs and an adjustable threshold can be used.
3. For DCM limit: switching to a synchronous buck regulator that allows current in the inductor to
reverse polarity and flow below zero allows the converter to maintain an average voltage of V OUT1
across the windings of the 1:1 inductor even when IO1 = zero. Several semiconductor companies
have released small, cost-effective synchronous buck regulators targeted towards this application.
There is also a minimum current that the secondary output must supply in order to prevent V OUT2 from
increasing at light or no-load conditions. The cause of this increase is a gradual transfer of energy to the
secondary output capacitors from the energy in the leakage inductance of the inductor. Measuring leakage
inductance and attempting to calculate the minimum load is generally impractical, and for this example lab
testing with a potentiometer proved quick and effective. To keep the absolute value of V OUT2 below 5,5 V a
maximum resistance of 1,1 kΩ is needed, and in the BOM a 1 kΩ resistor is used.
8. Accurac y of the Secondary Output Voltage _______________________
One disadvantage of using coupled inductors to generate secondary outputs is that only the primary output
voltage is regulated by the feedback loop. Depending upon the tolerance of the reference voltage and of the
feedback divider resistors, the main output V OUT1 enjoys a typical tolerance of ±1% to ±4% of the average
VOUT1 value. VOUT2 is unregulated, however, and will shift with changes in input voltage and duty cycle. V OUT2
also shows a greater shift than VOUT1 with respect to the load currents of both the primary and the secondary.
This is due to the voltage drops across the diodes and across the DC resistance (DCR) of the inductor
windings and the PCB traces. Figure 5 shows a 1:1 inductor treated as an ideal transformer with a coupling
efficient of 1, driven by a voltage equal to VOUT1 on the primary. By reflecting the voltage drops from the
primary to the secondary it can be seen that VOUT2 is directly proportional to IO1 and is inversely proportional
to IO2.
VD2
+
-
RDC
VOUT1
+
+
IO1
IO2
VD1
VOUT2
-
+
-
RDC
Figure 5: Primary and secondary voltage drops affect V OUT2
The first-order equation governing VOUT2 is then:
VOUT 2  VOUT 1  I O1  DCR  VD1  I O 2  DCR  VD 2 EQ.11
In most design guides the forward voltage of a Schottky diode is assumed to be 0,5 V, however if VOUT2 is to
be predicted with any accuracy the datasheets of the Schottkys used must be consulted or, better yet, the
actual voltage drop measured. In practice the tolerance is also affected by the coupling coefficient between
the two windings, and the effort of predicting VOUT2 to an accuracy of less than ±10 % is likely wasted,
especially when the effect of load transients on either V OUT1 or VOUT2 are considered. For this example, even
if the converter were sitting at just the right operating point to make the positive and negative terms of EQ.11
cancel, any load transient ∆i would cause a shift of ∆I * DCR. In conclusion, using V OUT2 without a linear
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
regulator is only practical for loads that have few or no load transients and that can tolerate a fairly wide
range.
Table 1 shows the tolerance of VOUT2 for this example over various load and line conditions:
VIN
(V)
IO1
(mA)
IO2
(mA)
VOUT2
(V)
VIN
(V)
IO1
(mA)
IO2
(mA)
VOUT2
(V)
VIN
(V)
IO1
(mA)
IO2
(mA)
VOUT2
(V)
10.0
10.0
10.0
10.0
10.0
50
100
200
500
50
25
25
25
25
50
4.65
4.95
5.03
5.25
3.55
12.0
12.0
12.0
12.0
12.0
50
100
200
500
50
25
25
25
25
50
4.84
5.02
5.13
5.37
4.14
14.0
14.0
14.0
14.0
14.0
50
100
200
500
50
25
25
25
25
50
4.89
5.05
5.16
5.41
4.41
10.0
10.0
10.0
10.0
10.0
10.0
100
200
500
50
100
200
50
50
50
100
100
100
4.51
4.75
4.93
1.67
3.07
4.00
12.0
12.0
12.0
12.0
12.0
12.0
100
200
500
50
100
200
50
50
50
100
100
100
4.74
4.89
5.12
2.38
3.79
4.40
14.0
14.0
14.0
14.0
14.0
14.0
100
200
500
50
100
200
50
50
50
100
100
100
4.85
4.98
5.23
2.93
4.15
4.58
10.0
10.0
500
200
100
200
4.23
2.22
12.0
12.0
500
200
100
200
4.62
3.02
14.0
14.0
500
200
100
200
4.81
3.50
10.0
500
200
3.28
12.0
500
200
3.69
14.0
500
200
4.02
Table 1: Secondary Voltage vs. Input Voltage, Primary Load and Secondary Load
9. Output Capacitors ____________________________________________
Capacitors for smoothing the voltages at the converter outputs are selected with a similar philosophy as the
inductor, but with a focus on maintaining a given maximum peak-to-peak ripple voltage instead of a ripple
current. For the main output the ripple voltage is a function of the output capacitor´s impedance at the
switching frequency and the peak-peak ripple current. The following equations assume that half of the
impedance is due to the capacitive reactance, and half comes from the equivalent series resistance (ESR):
CO1 MIN 
i P
0,55 A

 4,55F EQ.12
vO1  f SW  4 60mV  500kHz  4
ESR1MAX 
vO1
60mV

 55m EQ.13
2  i P 2  0,55 A
For this example, a solid tantalum capacitor with 220 µF and ESR of 40 mΩ meets both requirements and
provides much extra capacitance for responding to load transients. As a general practice, any time tantalum,
aluminum or other high-ESR type capacitors are used at a switching converter´s input or output a 100 nF
multi-layer ceramic capacitor (MLCC) placed in parallel will help reduce high frequency noise.
The secondary output requires that CO2 both filter and hold up VOUT2 while the control FET is on. This
requires higher capacitance and a higher RMS current rating for an output of the same power. Fortunately
VOUT2 only delivers a maximum of 200 mA. Minimum capacitance and maximum ESR are determined as
follows:
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
CO 2 MIN 
I S  AVG  DMAX
0,42 A  0,52

 7,33F EQ.14
vO 2  f SW
60mV  500kHz
ESR 2 MAX 
vO 2
60mV

 143m EQ.15
I A AVG 0,42 A
Here it is important to calculate the RMS current as well:
I CO2 RMS  I O 2 MAX
DMAX
0,52
 0,2 A
 0,18 ARMS EQ.16
1  DMAX
0,38
Tantalum and aluminum capacitors are possibilities, but in the face of heavy RMS current, MLCCs are the
best choice. For this example a 22 µF device rated at 10V with X5R dielectric and 1210 case size will be
used. The ESR is approximately 3 mΩ and the RMS current rating is about 3 A. One important consideration
for MLCCs is their loss of capacitance under a DC voltage bias. This particular capacitor drops to about 16
µF when used at 5 VDC.
10. Input Capacitors _____________________________________________
Input ripple voltage is often overlooked, but plays a vital role in conducted EMI. Input capacitors to buck
regulators must withstand a discontinuous, heavy RMS current because they supply most of the AC current
to the converter when the control FET is on. As with the secondary output capacitors, after minimum
capacitance and maximum ESR have been selected, the capacitor or capacitors chosen must be evaluated
for their RMS current ratings.
C IN  MIN  ( I O1 MAX  I O 2 MAX )
I IN  PK 
DMAX (1  DMAX )
0,52  0,48
 0,7 A
 1,75F EQ.17
v IN  MAX  f SW
0,2V  500kHz
PO  MAX
i
3,5W
0,55 A
 P 

 1,02 A EQ.18
VIN  MIN  
2
10V  0,9
2
ESR IN  MAX 
v IN
200mV

 197m
I IN  PK
1,02 A
EQ.19
The RMS current through the input capacitor is calculated as:
I CIN  RMS  ( I O1MAX  I O 2MAX ) DMAX (1  DMAX )  0,7 A 0,52  0,46  0,35 ARMS EQ.20
MLCCs are again the best choice due to their low ESR and high RMS current ratings. Here, a 25 V rated
10 µF device with X5R dielectric will be used. When biased at 14 V, the actual capacitance is approximately
7 µF.
11. Diodes _____________________________________________________
The recirculating diode for the main output (D1) and the output diode for the secondary (D2) are selected by
calculating the average current carried and multiplying by the forward voltage to determine the power
dissipation. The diode package is then selected based upon control of the temperature. Schottky diodes are
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APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
preferred whenever they are available for their low forward voltage and near-zero reverse recovery charge,
two features which combine to make them more efficient and less electrically noisy than PN diodes. For
safety and margin when dealing with noise and transients, the reverse blocking voltage of the diodes should
be selected at least 20% above the highest voltage in the system, which is VIN-MAX for bucks and coupled
bucks. 20% above 14 V is 16,8 V, hence 20 V or higher rated diodes will be used. Power dissipation is
determined by the following equations:
PD1MAX  I O1MAX  VD1 (1  DMIN )  0,5 A  0,5V (1  0,38)  0,16W EQ.21
PD 2MAX  I O 2MAX  VD 2  0,2 A  0,5V  0,1W EQ.22
The industry standard SMA package with a typical thermal resistance of 95ºC/W is a cost-effective choice,
and 20V rated devices are available from many different manufacturers.
12. Control Loop Compensation ___________________________________
Peak Current Mode control (PCM) is a good choice for controlling a buck using coupled inductors for several
reasons. When properly designed this control method simplifies the design of the compensation of the error
amplifier. As the name implies, PCM also controls peak current in the inductor (in this case in the primary
winding) naturally and on a cycle-by-cycle basis. Adding a second winding and a second load to a buck
converter changes the control-to-output transfer function of the power stage, comprised of the duty cycle
modulator and the output filter. The basic goal of compensating the control loop stays the same, however.
This is provide a high gain at DC (for best tolerance of the main output voltage), a high bandwidth (for fast
response to load transients) and a high phase margin (for stable response to load and line transients.) There
are many design philosophies for compensating control loops, and this application note will focus on a basic
method that provides a conservative design that is very stable.
13. Defining the Pow er Stage ____________________________________
The inputs that are needed to develop a linear, small-signal model of the power stage of a 1:1 coupled buck
regulator are as listed along with their values for this design example:
VIN-MIN = 10 V
VOUT = 5,0 V
IO = IO1-MAX + IO2-MAX = 0,5 A + 0,2 A = 0,7 A
fSW = 500 kHz L1 = 47 µH,
Power Stage Resistance, RL = RDSON of control MOSFET + DCR per winding of L1 = 200 + 600 = 800 mΩ
Total Output Capacitance, CO = CO1 + CO2 = 220 µF + 16 µF = 236 µF
ESR of Output Capacitors, RC = 40 mΩ
Current Sense Gain, GI = 1
Load Resistance, RO = VOUT / IO
Current Sense Resistance, RSN = 167 mΩ
Reference Voltage, VFB = 0,8 V
Maximum Duty Cycle, DMAX = 0,52
Slope Compensation Ramp, VM = 0,417 V
The slope compensation ramp is used to correct for the error between the current at the point in time when it
is sensed (at its peak) and the average value of that current. Without this additional slope, PCM switching
converters exhibit a sub-harmonic oscillation for duty cycles of 50 % and above. Because the inductor ripple
current is higher in a coupled buck than in a normal buck, a higher slope compensation ramp is needed.
Very few buck control ICs allow this ramp to be adjusted, hence it is important to evaluate the ideal slope
compensation ramp to foresee any possible problems.
2013-09-10, ChrR
Page 9 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
For PCM the ideal compensation ramp is equal to the slope of the current during the off-time of the control
FET. For simplicity it is assumed that the waveform is a triangle wave, but having the same peak-peak value
as the actual trapezoid wave of ∆iP. The ideal compensation slope is then:
VSL IDEAL  iP  RSN  GI  0,55 A  0,167  1  0,092V EQ.23
The fixed ramp of 0,417 V used in the TPS54160 is higher than the ideal ramp, eliminating the danger of sub
harmonic oscillation in this example. It should be noted that V M cannot be made too high without
consequences – if its value is far greater than the actual sensed slope, the converter becomes more of a
voltage mode type and requires more careful compensation around the error amplifier to ensure an adequate
phase margin.
L1EFF is used to correct for the difference between the slope of the triangular waveform of inductor current in
a standard buck and the trapezoidal waveform of the inductor current in a coupled buck.
L1EFF 
VIN  MIN  VOUT
10V  5V
 DMAX 
 0,52  9,45H EQ.24
i P  f SW
0,55 A  500kHz
AFB is the gain reduction that comes from the output divider resistors. KM is the modulator gain, representing
the balance between the sensed current slope (the first term in the denominator) and the compensation
slope (second term in the denominator.)
V
AFB  20  log FB
 VOUT
KM 

  15,9dB EQ.25

1
(0,5  DMAX ) RSN
VM
1

L1EFF  f SW VIN  MIN
 24,6
V
EQ.26
V
The DC gain of the power stage APS can be defined as follows:
APS 
K M  RO
 14,3dB EQ.27
RO  RL  RSN  K M  RSN  GI
The frequency-dependent terms of the power stage are the load pole ωC, the ESR zero ωZ, and the doublepole derived from the sampling function of the inductor current with corner frequency ωL.
C 
1
CO
 1
1


 RO K M RSN GI

krad
  1,63
EQ.28
s

Z 
1
krad
EQ.29
 106
RC CO
s
RO RC
 RL  RSN  K M RSN G I
RO  RC
krad
EQ.30
L 
 534
L1EFF
s
The control-to-output transfer function can now be written in the LaPlace domain:
1
GPS ( s )  APS
2013-09-10, ChrR

s
1 
 C
s
Z


s
s2
1 


2 
 L (  f SW ) 
EQ.31
Page 10 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
The frequencies in Hertz of the poles and zero are calculated by dividing each in term in radians/sec by (2π):
fC 
C
 260 Hz
2
fZ 
Z
 17kHz
2
fL 
L
 85kHz
2
Plotting gain and phase graphically provides an intuitive way to place the gain and phase response needed
for the error amplifier. Figure 6 shows the gain of GPS(s):
Figure 6: Power Stage Gain and Phase
From a graphical perspective, the goal of error amplifier compensation is to create a complete control loop
gain that starts at a high level and rolls off at a slope of -20 dB/decade. The bandwidth or “crossover
frequency” is defined as the point where the overall loop gain equals 0 dB, and in general bandwidth is made
as high as possible while still maintaining a high phase margin. Phase margin turn is defined as the
difference between the phase of the loop when gain equals zero dB and -360 º, the point at which the
negative feedback becomes positive and implies an unstable control loop. (In practice the result is usually an
unstable duty cycle and fluctuations of the output voltage.) A minimum phase margin of 45 º will ensure a
transient response with little or no overshoot or oscillation while still allowing the bandwidth to be as much as
1/5th of the switching frequency. In theory the bandwidth could be as much as 1/2 of the switching frequency,
but in practice 1/5th is a good upper limit.
In this example the compensation will be Type II, consisting of a pole at 0 Hz to ensure high DC gain at low
frequencies, one pole whose frequency can be set arbitrarily and a zero whose frequency can also be set as
desired. A good starting point is to set the compensation zero frequency f Z1 equal to the load pole fC and to
set the compensation pole frequency f P1 equal to the ESR zero frequency fZ. The compensator pole and zero
effectively cancel the power stage zero and pole, leaving only the pole at the origin, and in this way the high
gain and continuous -20 dB/decade slope is maintained up until the sampling double pole frequency.
The remaining variable to be determined is the gain of the compensation between f Z1 and fP1, often called the
“mid-band gain”. A good way to start is to set the overall control loop to cross 0 dB and define the bandwidth
in this area of flat gain. This can be done by finding the gain of the power stage at the desired crossover
frequency and then setting the gain of compensation to be equal in magnitude but opposite in sign, thus
forcing the overall bandwidth to be zero at that point.
The TPS54160 uses a transconductance error amplifier with a gain of 97 µS along with two external
capacitors and one external resistor to set the poles, zero, and mid-band gain. Figure 7 shows the error
amplifier and the external components:
2013-09-10, ChrR
Page 11 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
VO
RTOP
RBOT
VCOMP
+
R1
C2
+
- VREF
C1
Figure 7: Transconductance Error Amplifier
The transconductance of the error amplifier can be read from the datasheet of the control IC, and for the
TPS54160 this is gM = 97 µS. The mid-band gain, pole and zero frequencies are as follows:
f Z1 
AMID  g M  R1 EQ.32
1
EQ.33
2  R1  C1
f P1 
1
EQ.34
2  R1  C 2
Referring to Figure 6, the gain of GPS(S) at a conservative 1/10th of the switching frequency, or 50 kHz, is
around -14 dB. Here there is one detail that is sometimes overlooked – the gain reduction from the feedback
divider resistors, AFB, defined in EQ.25. This term can be summed with the power stage or with the error
amplifier – it makes no difference once the loop is closed. This example assumes that A FB is part of the error
amplifier, and since it is a DC gain, it affects the mid-band gain:
 0,8V 
AFB  20 log
  15,9dB
 5V 
AMID  10
A0 dB ( 1)  AFB
20
 10
14( 1) 15, 9
20
 31,3
V
EQ.35
V
Now that mid-band gain has been calculated, R1, C1 and C2 can be calculated:
R1 
31,3V / V
 322k
97 S
C2 
C1 
1
 1,9nF
2  322k  260 Hz
1
 29 pF
2  322k  17kHz
The closest 1 % resistor value is 316 kΩ and the closest 10 % capacitor values are 1,8 nF and 27 pF,
respectively. These are substituted into the compensation transfer function:
GEA ( s )  g M AFB
2013-09-10, ChrR
s  R1  C1  1
EQ.36
s( s  R1  C1  C 2  C1  C 2)
Page 12 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
Figure 8 shows the gain and phase of the error amplifier:
Figure 8: Error Amp Gain and Phase
The final step is to close the loop by multiplying the power stage and error amplifier transfer functions
together. The final gain plot shows bandwidth and the final phase plot shows the phase margin:
Figure 9: Overall Control Loop Gain and Phase
The actual bandwidth is 20 kHz and the phase margin 79 º, indicating a somewhat slow but very stable
control loop. The reason bandwidth and phase margin don´t match the predictions perfectly is the relatively
low frequency of the compensation pole. This is typical for converters using output capacitors with high ESR
such as aluminum electrolytic and tantalum. The frequency of the compensation pole can be increased up to
½ of the switching frequency if desired. In fact, for converters with purely ceramic output capacitors the ESR
zero frequency is typically in the MHz range, and in such cases ½ of the switching frequency is the
recommended compensation pole frequency. Increasing the mid-band gain and/or increasing the
compensation pole frequency will increase the control loop bandwidth, but will also decrease the phase
margin. Several iterations of incrementing the bandwidth and monitoring the phase margin can be performed
until phase margin has dropped to 45 º, at which point the maximum recommended bandwidth is reached.
2013-09-10, ChrR
Page 13 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
14. L-C Input Filter w ith Damping __________________________________
Buck converters, buck-boost converters and flyback converters are the three principal topologies that draw a
discontinuous current from the input source. Even with good quality input capacitors to supply the heavy AC
current, the source will supply some current at AC, and the result is conducted electromagnetic interference
(EMI) on the input lines. The longer the leads, PCB traces and wiring harnesses that connect these high
ripple DC-DC converters to their input sources, the more likely that this conducted EMI also becomes
radiated EMI owing to the unwanted antenna behavior of the leads. An input L-C filter placed close to the
DC-DC converter is a good way to reduce conducted EMI, and by filtering before the noise can
“contaminate” the input leads radiated EMI is reduced as well.
Not every laboratory has access to dedicated equipment for measuring and testing conducted EMI, let alone
the special antennas and anechoic chambers needed for radiated EMI. The following procedure is based
upon correlation of time-domain current waveforms that can be predicted and measured with a common
oscilloscope to differential-mode conducted noise in the frequency domain.
15. Estimating Noise Amplitude ___________________________________
The following equation can be used to estimate the amplitude of the first harmonic of the differential mode
conducted noise based upon the input current waveform:
A1ST
 I IN  AVG

sin(  DMAX ) 
 2
 C IN f SW
 EQ.37
 20  log


1V




Figure 10 shows the input current of the example circuit during maximum load and minimum input voltage –
the worst-case for EMI.
Figure 10: Primary switch node (yellow), ΔvIN (AC-coupled, blue), IIN (pink)
VIN = 10V, IO1 = 500 mA, IO2 = 180 mA
2013-09-10, ChrR
Page 14 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
Average input current, or the average height of the pedestals of trapezoid wave input current can be
calculated as:
I IN  AVG 
I IN
DMAX
I IN 
EQ.38
VOUT ( I O1  I O 2 ) 5V (0,5 A  0,2 A)

 0,39 A EQ.39
VIN  MIN  
10V  0,9
Maximum duty cycle was defined in EQ.1 as 0,52, and the average current is then 0,39 / 0,52 = 0,75 A. The
total input capacitance CIN is 7 µF. The estimated noise of the first harmonic is:
A1ST
0,75 A


sin(  0,52) 
 2
  7 F  500kHz
  86,6 dBV
 20  log


1V




The limit for average common mode noise in many standards for conducted EMC, e.g.: IEC55022 in the
range of 500 kHz is 46 dBµV, hence the attenuation needed is equal to the noise A1ST minus this limit. For
this example the required attenuation is then ATT = 86,6 – 46 = 41 dBµV.
16. Selecting L and C ____________________________________________
Either the inductance or the capacitance of the input filter must be chosen arbitrarily, and for this example it
is the inductance that will be chosen first. Values of inductance between 1 and 10 µH provide a good
compromise between size, cost, and the resulting resonant frequency of the input L-C filter. The RMS current
rating of the inductor must be greater than the input current IIN, and the peak current rating must be higher
than the sum of the average current and one-half of the AC ripple:
I SAT  MIN  I IN  PK  I IN  AVG 
i P
0,55 A
 0,75 A 
 1,02 A EQ.40
2
2
The Würth Elektronik WE-TPC 2828 series 744 025 002 is a shielded 2,2 µH device in a small footprint
(2,8 x 2,8 x 2,8 mm) with a DCR of 60 mΩ and current ratings of IRMS = 1,8 A and ISAT = 2,4 A that is well
suited for this example. With inductance chosen, two equations exist for selecting the required capacitance.
The first is based upon the resonant frequency of the filter, which should be kept to 1/10 th of the switching
frequency or less:
C F  MIN 1 
C IN
 2f SW 
C IN  LF 
 1
 10 
2

7 F
 2  500kHz 
7 F  2,2H 
 1
10


2
 13,5F EQ.41
The result of EQ.41 may be negative – this would indicate that with the chosen inductor value it is not
possible to attain a filter resonance frequency 10x lower than the switching frequency. The inductor value
can be increased if desired, though this comes at a penalty of lower efficiency and/or a larger inductor due to
the higher DCR and higher core losses that accompany higher inductance. Setting resonant frequency 10x
below switching frequency is a guideline, not a hard limit.
2013-09-10, ChrR
Page 15 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
The second equation is a hard limit, and it predicts the minimum capacitance needed to ensure that the
voltage ripple at the input to the converter is below the limit set by A TT:
C F  MIN 2
 ATT
1  10 40


LF  2f SW

2


1
 
2,2H


2
41




10 40

  5,0F EQ.42
 2  500kHz 


The capacitor chosen should be greater than the larger of the two values given by CF-MIN1 and CF-MIN2, and
multi-layer ceramic capacitors are the best choice. When using MLCCs the loss in capacitance due to a
DC voltage bias must be taken into account. Depending upon the case size and voltage rating it would likely
take two or more 10 µF capacitors in parallel to provide a true 14 µF or more of capacitance. Before
selecting the final value for CF, however, the damping of the input filter must be considered.
17. Filter Damping _______________________________________________
Any time an L-C filter feeds into a switching regulator the potential exists for an oscillation (often called
“ringing” or also “power supply interaction”) stemming from the output impedance of the filter and the input
impedance of the switcher. Properly designed switchers maintain high power efficiency over a range of input
voltage, and one effect of this is that as input voltage rises, input current decreases, and vice-versa. The
result is effective negative input impedance. If |-ZIN| is less than or equal to ZOUT of the L-C filter, the input
line is likely to oscillate, a behavior that is never beneficial.
Even in the absence of an input inductor, the input leads have a parasitic inductance, and when switchers
use purely MLCC input capacitors with their very low ESR the potential for oscillation is very real. In this
example there is a discrete inductor whose inductance and DCR are both known. With these quantities a
damping capacitor CD can be selected to go in parallel with CIN, shown in Figure 11.
LF
+
VIN - CF
CD
CIN
Figure 11: L-C filter with damping capacitor
Besides stopping any oscillations, CD reduces the ripple voltage at the input, lowering the amplitude of A 1ST
and ATT, and in turn reducing the capacitance needed for C F. The following two equations define the
minimum capacitance and the minimum ESR needed for CD to critically damp the filter formed by LF and CIN:
CD  CIN  4  7F  4  28F EQ.43
ESR 
2013-09-10, ChrR
1 LF
1 2,2H
 DCR 
 0,06  0,22 EQ.44
2 C IN
2 7F
Page 16 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
A negative value for the ESR would indicate that the inductor DCR already provides enough damping
resistance. The typical choice for CD is an aluminum electrolytic capacitor. Surface mount aluminum
capacitors rated to 16 V or 25 V with 33 µF are available at reasonable cost from many different
manufacturers. What´s more, for damping the normally “bad” characteristic, high ESR, is actually helpful. A
surface mount aluminum electrolytic capacitor rated at 25 V provides 33 µF with an ESR of 0,34 Ω in a
compact 6,3 mm radius footprint, or Radial D8 Case.
18. Re-evaluate C F ______________________________________________
The total capacitance of CIN is now equal to (7 µF + 33 µF), so another iteration of the filter capacitor design
is needed. For simplicity the results will simply be stated: the final C F value needed is 5,2 µF. Another 25 V
rated, nominal 10 µF MLCC identical to CIN will be used, and since the DC bias is the same, this capacitor
will provide at least 7 µF of capacitance.
19. Conclusion __________________________________________________
Using a coupled inductor can help derive a second output voltage without the cost of another complete
switching power supply, but the tolerance of the secondary output voltage and the DCM threshold in the
primary are difficult to predict with pure mathematical expressions. Successful 1:1 coupled buck designs
should be lab tested thoroughly, over line, load and temperature. In most cases the secondary output voltage
tolerance is too wide, line regulation too high and load regulation too high to be used directly. For all of these
reasons a linear regulator is the recommended way to provide a well-regulated secondary output.
20. Graphs and Oscilloscope Captu res _____________________________
Figure 12: Steady State Waveforms. IO1 = 500 mA, IO2 = 100 mA
Ch.1 = Primary SW, Ch.2 = VOUT1 AC-coupled, Ch.3 = Secondary SW, Ch.4 = VOUT2 AC-coupled
2013-09-10, ChrR
Page 17 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
Figure 13: Load Transient on Primary. IO1 varies from 200 to 500 mA, IO2 = 100 mA
Ch.2 = VOUT1 AC-coupled, Ch.3 = IO1, Ch.4 = VOUT2 AC-coupled
Figure 14: Load Transient on Secondary. IO1 = 500 mA, IO2 varies from 50 to 100 mA
Ch.2 = VOUT1 AC-coupled, Ch.3 = IO1, Ch.4 = VOUT2 AC-coupled
2013-09-10, ChrR
Page 18 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
Power Efficiency, IO2 = 25 mA
Power Efficiency, IO2 = 50 mA
Power Efficiency, IO2 = 100 mA
Power Efficiency, IO2 = 200 mA
21. Complete Circuit Schematic _________________________________
2013-09-10, ChrR
Page 19 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
22. Bill of Materials ____________________________________________
Designat
or
Quant
ity
Packag
e/Size
Part
Number
Value1
Valu
e2
Value3
Manufacture
r
C10
1
Capacitor
SMT
Polarized
D Case
D-Case
10TPB220
M
220u
10V
4mohm
SANYO
C2
1
Capacitor
SMT
Polarized
D8 Case
Radial
D8
EEEFK1E330P
33u
25V
0.34ohm
Panasonic
3
Terminal
Block
3.81mm
Wire to
Board
7.62x7.
4x
8.5mm
69121431
0002
300Vrm
10A
s
3.81mm
Würth
Elektronik
3
Resistor
Thick Film
0603
75V
Vishay-Dale
R2
1
Resistor
Thick Film
0603
75V
Vishay-Dale
R3
1
Resistor
Thick Film
0603
75V
Vishay-Dale
R4
1
Resistor
Thick Film
0603
75V
Vishay-Dale
R5
1
Resistor
Thick Film
0805
150V
Vishay-Dale
R8
1
Resistor
Thick Film
0603
75V
Vishay-Dale
C1, C3
2
Capacitor
MLCC
1210
C4, C5,
C6, C11
4
Capacitor
MLCC
0603
C7
1
Capacitor
MLCC
0603
C8
1
Capacitor
MLCC
0603
C9
1
Capacitor
MLCC
1210
D1, D2
2
Schottky
Diode
SMA (DO214AC)
SMA
L1
1
Inductor
Shielded
Drum Core
L2
1
Inductor
U1
1
IC
CN1,
CN2,
CN3
R1, R6,
R7
2013-09-10, ChrR
Componen
Description
t Type
CRCW060
31002FK
CRCW060
31621FK
CRCW060
32553FK
CRCW060
33163FK
CRCW080
51001FK
CRCW060
31911FK
C3225X5R
1E106M
C1608X7R
1E104M
C1608CO
G1H182J
C1608CO
G1H270J
C3225X5R
1A226M
10k
1.62k
255k
316k
1k
1.91k
0.1
W
0.1
W
0.1
W
0.1
W
0.12
5W
0.1
W
10u
25V
X5R
TDK
100n
25V
X7R
TDK
1.8n
25V
X5R
TDK
27p
25V
X5R
TDK
22u
10V
X5R
TDK
B120-13-F
20V
1A
0.5V
Diodes Inc
2.8x2.8
x
2.8mm
74402500
2
2.2u
Shielded
1:1
Coupled
7.3x7.3
x 4mm
74487847
0
47u
Non-sync
Buck
Regulator
eMSOP TPS54160
-10
DGQ
1.8A 60mohm
1A
0.6ohm
Würth
Elektronik
Würth
Elektronik
Texas
Instruments
Page 20 of 21
APPLICATION NOTE
Designing Low-cost, Multiple Output DC-DC Converters
Using 1:1 Coupled Inductors with Buck Regulators
IMPORTANT NOTICE
Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance
of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The
responsibility for the applicability and use of WE Products in a particular customer design is always solely within the
authority of the customer. Due to this fact it is up to the customer to evaluate, where appropriate to investigate and
decide whether the device with the specific product characteristics described in the product specification is valid and
suitable for the respective customer application or not.
The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the
data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at
www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserve the
right to make corrections, modifications, enhancements, improvements, and other changes to its products and services.
WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED
UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT
RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE
USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR
ENDORSEMENT THEREOF.
WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably
expected to cause severe personal injury or death. Moreover WE products are neither designed nor intended for use in
areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control,
ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform
WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of
safety and in which the malfunction or failure of an electronic component could endanger human life or health customers
must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements
concerning their products and any use of WE products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE
AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL
APPLICATIONS.
USEFUL LINKS
Application Notes:
http://www.we-online.com/app-notes
Component Selector:
http://www.we-online.com/component-selector
Toolbox:
http://www.we-online.com/toolbox
Product Catalog:
http://katalog.we-online.de/en/
CONTACT INFORMATION
Würth Elektronik eiSos GmbH & Co. KG
Max-Eyth-Str. 1, 74638 Waldenburg, Germany
Tel.: +49 (0) 7942 / 945 – 0
Email: appnotes@we-online.de
Web:http://www.we-online.com
2013-09-10, ChrR
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