Datasheet

UNISONIC TECHNOLOGIES CO., LTD
U8021
Preliminary
CMOS IC
VOLTAGE MODE PWM
CONTROLLER WITH LINEAR
POWER REGULATOR

DESCRIPTION
The UTC U8021 provides the control and protection features
necessary for a synchronous buck converter and a linear
regulator in high performance graphic card applications.
The UTC U8021 is designed to directly drive the high and low
MOSFETs of the buck converter. It allows the converter to
operate with 4V~25V power rail and as low as 0.5V output. The
UTC U8021 is capable to drive a N-type MOSFET in a linear
regulator with as low as 0.5V output.
The UTC U8021 features soft-start, UVLO, and OCP. The
UTC U8021 monitors the output current by using the Rdson of the
low MOSFET in the buck converter that eliminates the need for a
current sensing resistor.

FEATURES
* 4V~25V power rails
* Internal LDO
* 1.5A gate drive current
* Adaptive non-overlapping gate drives provide shoot-through
protection for MOSFETs
* Programmable output voltages
* Internal soft start
* Under voltage lockout
* Short circuit protection

ORDERING INFORMATION
Ordering Number
Lead Free
U8021L-S14-T
U8021L-S14-R
Halogen Free
U8021G-S14-T
U8021G-S14-R
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Copyright © 2013 Unisonic Technologies Co., Ltd
Package
Packing
SOP-14
SOP-14
Tube
Tape Reel
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U8021
Preliminary

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PIN NAME
BST
OCS
COMP
FB
LDOG
LDFB
GND
VCC
NC
DRV
DL
GND
PN
DH
CMOS IC
DESCRIPTION
Boost input for top gate drive bias.
Current limit setting.
Compensation PIN.
Feedback voltage
External LDO gate drive.
External LDO feedback voltage.
Ground.
Power supply.
No Bonding.
Internal LDO output.
Gate drive for low MOSFET.
Ground.
Phase PIN.
Gate drive for high MOSFET.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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U8021
CMOS IC
BLOCK DIAGRAM
VCC
BIAS
OSC
LDO
BST
PWM
DH
COMP
FB
EA
S
DRIVER
R
LATCH

Preliminary
DRV
DL
VCC
Bandgop
UVLO
Soft Sart
LDO-REG
OCP
GND
LDOG
PN
LDFB
OCS
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation
outside of the parameters specified in the Electrical Characteristics section is not implied.
PARAMETER
SYMBOL
RATINGS
UNIT
Input Supply Voltage
VCC
18
V
BST to GND
VBST
40
V
BST to PN
VBST_PN
10
V
PN to GND
VPN
-1~30
V
PN to GND Negative Pulse (tpulse<20ns)
VPN_PULSE
-5
V
DL to GND
VDL
-1~+10
V
DL to GND Negative Pulse (t pulse<20ns)
VDL_PULSE
-3
V
DH to PN
VDH_PN
-1~+10
V
DH to PN Negative Pulse (tpulse<20ns)
VDH_PULSE
-3
V
DRV to GND
VDRV
10
V
Operating Ambient Temperature Range
TA
-25~85
°C
Operating Junction Temperature
TJ
-25~125
°C
Storage Temperature
TSTG
-65~150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

THERMAL RESISTANCES
PARAMETER
Junction to Ambient
Junction to Case
SYMBOL
θJA
θJC
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
RATINGS
100
32
UNIT
°C/W
°C/W
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
Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS
(Unless specified: VCC= 5V~16V, VFB=VOUT, VBST-VPN=5V~8.2V, TA=-25°C~85°C)
PARAMETER
General
VCC Supply Voltage
VCC Quiescent Current
VCC Under Voltage Lockout
BST to PN Supply Voltage
BST Quiescent Current
Internal LDO
LDO Output
Dropout Voltage
Linear Section
Reference Voltage
Load Regulation
Line Regulation
VCC Supply Rejection
Gate Sourcing Current
Gate Sinking Current
LDFB Input Bias Current
Soft Start Time
Switching Section
Reference Voltage
Load Regulation
Line Regulation
Operating Frequency
Ramp Amplitude (Note 2)
Maximum Duty Cycle (Note 2)
Minimum On-Time (Note 2)
DH Rising/Falling Time
DL Rising/Falling Time
SYMBOL
VCC
IQVCC
UVVCC
VBST_PN
IQBST
VDRV
VDROP
VOL
VREF
FS
Vm
DMAX
TON_MIN
tSRC_DH
tSINK_DH
tSRC_DL
tSINK_DL
TEST CONDITIONS
MIN
TYP
4
VCC=12V, VBST-VPN=8.2V
VHYST=100mV
5
4
VCC=12V, VBST-VPN=8.2V
8.6V<VCC<16V
4V<VCC<8.6V
0.65
TA=25°C, VCC=12V
IO=0.2~4A
VCC=10V~14V
0.495
0.75
1
1
-0.2
1.5
500
6V Swing at CL=3.3nF,
VDRV=8.2V
0.500
0.4
0.4
600
0.8
97
125
40
25
30
40
30
DH, DL Nonoverlapping Time
Voltage Error Amplifier
Output Source Current
0.9
Output Sink Current
0.9
Notes: 1. This device is ESD sensitive. Use of standard ESD handling precautions is required.
2. Guaranteed by design, not tested in production.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
UNIT
16
7
4
10
3
V
mA
V
V
mA
8
0.4
LDFB=VOL, TA=25°C, VCC=12V
IO=0~1A, VIN=3.3V, VCC=12V
VIN=3.2V~3.4V, VCC=12V
VIN=3.3V, VCC=10V~14V
VGATE=6.5V
VGATE=6.5V
LDFB=.5V
VIN=3.3V, VCC=12V TA=25°C
6V Swing at CL=3.3nF,
VBST-VPN=8.2V
MAX
V
V
0.85
0.4
0.4
0.4
-1.0
0.505
700
V
%
%
%
mA
mA
uA
ms
V
%
%
KHz
V
%
ns
ns
ns
ns
mA
mA
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
Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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