Datasheet

UNISONIC TECHNOLOGIES CO., LTD
US12231
Preliminary
CMOS IC
EXPRESSCARDTM POWER
INTERFACE SWITCH

DESCRIPTION
The UTC US12231 ExpressCardTM power interface switches
are designed to meet the ExpressCardTM specification. The UTC
US12231 distribute 3.3V, AUX, and 1.5V to the single-slot
ExpressCard|34 or ExpressCard|54 sockets. Each voltage rail is
protected with integrated current-limiting circuitry, other functions
include thermal protection circuit turns off switches to prevent
device from damage when heavy overloads or short circuits,
The UTC US12231 can use in notebook computers, desktop
computers, PDAs, and digital cameras.

TSSOP-20
FEATURES
* Meets the ExpressCardTM standard (ExpressCard|34 or
ExpressCard|54)
* Compliant with the ExpressCardTM compliance checklists
* Fully satisfies the ExpressCardTM implementation guidelines
* Supports systems with WAKE function
* TTL-Logic compatible inputs
* Short circuit and thermal protection
* -40°C ~ 85°C ambient operating temperature range

ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
US12231L-P20-T
US12231G-P20-T
US12231L-P20-R
US12231G-P20-R
Package
Packing
TSSOP-20
TSSOP-20
Tube
Tape Reel
※ ExpressCard is a trademark of Personal Computer Memory Card International Association.
www.unisonic.com.tw
Copyright © 2014 Unisonic Technologies Co., Ltd
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Preliminary
CMOS IC
MARKING INFORMATION

PACKAGE
MARKING
TSSOP-20

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
PIN NAME
I/O
DESCRIPTION
System Reset input – active low, logic level signal. Internally pulled up to
AUXIN.
1
SYSRST
I
2
SHDN
I
Shutdown input – active low, logic level signal. Internally pulled up to AUXIN.
3
STBY
I
Standby input – active low, logic level signal. Internally pulled up to AUXIN.
4, 5
6, 7
3.3VIN
3.3VOUT
I
O
3.3-V input for 3.3VOUT
Switched output that delivers 0 V, 3.3 V or high impedance to card
8
PERST
O
A logic level power good to slot 0 (with delay)
9
10
NC
GND
11
CPUSB
I
Card Present input for USB cards. Internally pulled up to AUXIN.
12
CPPE
I
TM
Card Present input for PCI Expresscards . Internally pulled up to AUXIN
13, 14
15,16
17
18
1.5VOUT
1.5VIN
AUXOUT
AUXIN
O
I
O
I
19
RCLKEN
I/O
No connection
Ground
Switched output that delivers 0 V, 1.5 V or high impedance to card
1.5-V input for 1.5VOUT
Switched output that delivers 0 V, AUX or high impedance to card
AUX input for AUXOUT and chip power
Reference Clock Enable signal. As an output, a logic level power good to host
for slot 0 (no delay – open drain). As an input, if kept inactive (low) by the host,
prevents PERST from being de-asserted. Internally pulled up to AUXIN.
20
OC
O
Overcurrent status output for slot 0 (open drain)
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
Preliminary
CMOS IC
BLOCK DIAGRAM
3.3VIN
4/5
UVLO
Current
Limit
AUXIN 18
UVLO
1.5VIN
Current
Limit
15/
16
UVLO
Current
Limit
S1
S2
S3
6/7
3.3VOUT
17
AUXOUT
S4
S5
13/
14
1.5VOUT
S6
PG
CPUSB 11
20
OC
CPPE 12
Control
Logic
STBY
Thermal
Shutdown
AUXIN
3
19
SHDN
2
GND 10
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AUXIN
Delay
RCLKEN
8
PERST
1
SYSRST
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
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING (Over operating free-air temperature range (unless otherwise noted)
PARAMETER
SYMBOL
Input Voltage Range For Card Power
VIN
TEST CONDITIONS
1.5VIN
3.3VIN
AUXIN
Logic Input/Output Voltage
Output Voltage Range
VOUT
1.5VIN
3.3VIN
AUXIN
IOUT
1.5VIN
3.3VIN
AUXIN
Continuous Total Power Dissipation
Output Current
RATINGS
UNIT
-0.3~6
-0.3~6
V
-0.3~6
-0.3~6
V
-0.3~6
-0.3~6
V
-0.3~6
See dissipation rating table
Internally limited
Internally limited
Internally limited
OC Sink Current
10
mA
PERST Sink/Source Current
10
mA
Operating Virtual Junction Temperature Range
TJ
-40~+120
Storage Temperature Range
TSTG
-55~+150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

°C
°C
DISSIPATION RATINGS (Thermal Resistance=°C/W)
PARAMETER
SYMBOL
RATINGS
UNIT
POWER RATING (TA≤25°C)
704.2
mW
Note: These devices are mounted on a JEDEC low-k board (2-oz. traces on surface), (The table is assuming that
the maximum junction temperature is 120°C).

RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
1.5VIN
Input Voltage
VIN
3.3VIN
AUXIN
Continuous Output Current
IOUT
Operating Virtual Junction
Temperature
TJ
1.5VOUT
3.3VOUT
AUXOUT
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TEST CONDITIONS
1.5VIN is only required for its
respective functions
3.3VIN is only required for its
respective functions
AUXIN is required for all circuit
operations
MIN
TYP
MAX
UNIT
1.35
1.65
3
3.6
3
3.6
0
0
0
650
1.3
275
mA
A
mA
-40
120
°C
V
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
Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS
TJ=25°C, VI(3.3VIN)=VI(AUXIN)=3.3V, VI(1.5VIN)=1.5V, VI(/SHDNx), VI(/STBYx)=3.3V, VI(/CPPEx)=VI(/CPUSBx)=0V, VI(/SYSRST)=3.3V, OCx and
RCLKENx and PERSTx are open, all voltage outputs unloaded (unless otherwise noted)
PARAMETER
SYMBOL
3.3VIN~3.3VOUT
RDS
TJ=25°C, I=1300mA each
1)
Value
68
120
TJ=100°C, I=275mA each
R(DIS_FET) VI(/SHDNx)=0V, I(discharge)=1mA
3.3VOUT
IOS
TJ (-40~120°C), Output powered into a
short
AUXOUT
TJ
Trip Point, TJ
Thermal
45
TJ=100°C, I=1300mA each
1.5VOUT
Steady-State
70
TJ=25°C, I=275mA each
Discharge Resistance On 3.3V/1.5V/AUX Outputs
-Circuit Output Current (Note
46
TJ=100°C, I=650mA each
AUXIN~AUXOUT
Short
MIN TYP MAX UNIT
TJ=25°C, I=650mA each
1.5VIN~1.5VOUT
Power Switch Resistance
TEST CONDITIONS
TJ_OC
Shutdown
Hysteresis
Rising temperature, not in overcurrent
condition
Overcurrent condition
∆T
st
200
100
0.67
1
1.3
A
1.35
2
2.5
A
275
450
600
mA
155
165
120
130
°C
10
°C
43
100
Current
Threshold Within
VO(1.5VOUT) with 100-mΩ short
100
140
-Limit Response Time
1.1Times Of Final
VO(AUXOUT) with 100-mΩ short
38
100
2.5
10
10
15
85
150
1.5VIN
Normal
Current
Operation
3.3VIN
Outputs are unloaded,
II
and CPUSBx logic pullup currents)
AUXIN
Normal
Operation
1.5VIN
Outputs are unloaded,
2.5
10
3.3VIN
TJ (–40, 120°C) (include CPPEx
10
15
AUXIN
and CPUSBx logic pullup currents)
120
210
CPUSB = CPPE =0V, SHDN =0V
0.5
10
(discharge FETs are on) (include
CPPEx and CPUSBx logic pullup
3.5
10
(–40, 120°C)
144
270
SHDN =3.3V, CPUSB = CPPE = 3.3V
0.1
50
0.1
50
20
50
1.5VIN
Total Input Quiescent Current
Shutdown
Mode
II
3.3VIN
μs
μA
μA
μA
currents and SHDN pullup current) TJ
AUXIN
1.5VIN
Forward Leakage Current
TJ (–40, 120°C) (does not include CPPEx
mΩ
Ω
VO(3.3VOUT) with 100-mΩ short
Operation Input Quiescent
mΩ
500
From Short To The 1
Current Limit, TJ=25°C
mΩ
3.3VIN
(no card present, discharge FETs are on),
Ilkg(FWD) current measured at input pins,
μA
TJ=120°C, includes RCLKEN pullup
AUXIN
TJ=25°C
TJ=120°C
Reverse Leakage Current
TJ=25°C
TJ=120°C
TJ=25°C
TJ=120°C
current
0.1
1.5VIN
3.3VIN
VO(AUXOUT)=VO(3.3VOUT)=3.3V,
Ilkg(RVS)
AUXIN
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VO(1.5VOUT)=1.5V, All voltage inputs are
0.1
grounded (current measured from output
pins going in)
10
50
10
50
0.1
10
50
μA
μA
μA
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
Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
LOGIC SECTION ( SYSRST , SHDNx , STBYx , PERSTx , RCLKENx, OCx , CPUSBx , CPPEx )
Logic Input Supply Current
Input
I( SYSRST )
SYSRST =3.6V, sinking
Input
I( SYSRST )
SYSRST =0V, sourcing
Input
I( SHDNx )
Input
I( STBYx )
Input
Inputs
Logic Input Voltage
RCLEN Output Low Voltage
High Level
Low Level
Output
1
μA
0
1
30
μA
0
1
10
SHDNx =3.6V, sinking
SHDNx =0V, sourcing
0
10
30
0
STBYx =3.6V, sinking
1
STBYx =0V, sourcing
10
30
I(RCLKENx)
I( CPUSBx )
RCLKENx=0V, sourcing
10
30
Or
I( CPPEx )
CPUSB or CPPE =3.6V,
sourcing
0
CPUSB or CPPE =0V, sinking
VIH
VIL
10
30
2
0.8
0.4
IO(RCLKEN)=60μA
VPG(3.3VIN)
3.3VOUT falling
2.7
3
Voltage ( PERST Asserted When Any Output
Voltage Falls Below The Threshold)
VPG(AUXIN)
AUXOUT falling
2.7
3
VPG(1.5VIN)
1.5VOUT falling
1.2
1.35
PERST Assertion Delay From Output Voltage
t FD(PERST )
3.3VOUT, AUXOUT, or 1.5VOUT
falling
PERST De-assertion Delay From Output
Voltage
t RD(PERST )
3.3VOUT, AUXOUT, and 1.5VOUT
rising within tolerance
PERST Assertion Delay From SYSRST
t FD 2(PERST )
PERST Minimum Pulse Width
t W (PERST )
Max time from SYSRST asserted
500
or de-asserted
3.3VOUT, AUXOUT, or 1.5VOUT
falling out of tolerance or
100 250
triggered by SYSRST
PERST Output Low Voltage
VOL (PERST )
PERST Output High Voltage
VOH(PERST )
IO(PERST)=500μA
4
10
μA
μA
1
VOL(RCLEN)
PERST Assertion Threshold Of Output
μA
μA
V
V
V
500
ns
20
ms
0.4
2.4
ns
μs
V
V
OC Output Low Voltage
VOL ( OC )
IO(/OC)=2mA
0.4
V
OC Leakage Current
IIKG( OC )
VO(/OC)=3.6V
1
μA
6
20
mS
2.6
2.9
V
1
1.25
2.6
2.9
t D( OC )
OC Deglitch
Falling into or out of an
overcurrent condition
UNDERVOLTAGE LOCKOUT (UVLO)
3.3VIN UVLO
VUVLO(3.3VIN)
1.5VIN UVLO
VUVLO(1.5VIN)
AUXIN UVLO
VUVLO(AUXIN)
3.3VIN level, below which 3.3VIN
and 1.5VIN switches are off
1.5VIN level, below which 3.3VIN
and 1.5VIN switches are off
AUXIN level, below which all
switches are off
UVLO Hysteresis
∆VUVLO
100
mV
Note: Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be
taken into account separately. ELECTRICAL CHARACTERISTICS(Cont.)
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
Preliminary
CMOS IC
SWITCHING CHARACTERISTICS
TJ=25°C, VI(3.3VIN)=VI(AUXIN)=3.3V, VI(1.5VIN)=1.5V, VI(/SHDNx), VI(/STBYx)=3.3V, VI(/CPPEx)=VI(/CPUSBx)=0V, VI(/SYSRST)=3.3V,
OCx and RCLKENx and PERSTx are open, all voltage outputs unloaded (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
3.3VIN to 3.3VOUT
CL(3.3VOUT)=0.1μF, IO(3.3VOUT)=0A
AUXIN to AUXOUT
CL(AUXOUT)=0.1μF, IO(AUXOUT)=0A
1.5VIN to 1.5VOUT
CL(1.5VOUT)=0.1μF, IO(1.5VOUT)=0A
Output Rise Times
tr
3.3VIN to 3.3VOUT
CL(3.3VOUT)=100μF, RL=VI(3.3VIN)/1A
AUXIN to AUXOUT
CL(AUXOUT)=100μF, RL=VI(AUXIN)/0.250A
1.5VIN to 1.5VOUT
CL(1.5VOUT)=100μF, RL=VI(1.5VIN)/0.500A
3.3VIN to 3.3VOUT
CL(3.3VOUT)=0.1μF, IO(3.3VOUT)=0A
Output Fall Times
AUXIN to VAUXOUT
CL(AUXOUT)=0.1μF, IO(AUXOUT)=0A
When Card Removed 1.5VIN to 1.5VOUT
CL(1.5VOUT)=0.1μF, IO(1.5VOUT)=0A
tf
(Both CPUSB And
3.3VIN to 3.3VOUT
CL(3.3VOUT)=20μF, IO(3.3VOUT)=0A
AUXIN to VAUXOUT
CL(AUXOUT)=20μF, IO(AUXOUT)=0A
CPPE De-asserted)
1.5VIN to 1.5VOUT
CL(1.5VOUT)=20μF, IO(1.5VOUT)=0A
CL(3.3VOUT)=0.1μF, IO(3.3VOUT)=0A
3.3VIN to 3.3VOUT
AUXIN to VAUXOUT
CL(AUXOUT)=0.1μF, IO(AUXOUT)=0A
Output Fall Times
1.5VIN to 1.5VOUT
CL(1.5VOUT)=0.1μF, IO(1.5VOUT)=0A
tf
When SHDN Asserted
3.3VIN to 3.3VOUT
CL(3.3VOUT)=100μF, RL=VI(3.3VIN)/1A
(Card Is Present)
AUXIN to VAUXOUT
CL(AUXOUT)=100μF, RL=VI(AUXIN)/0.250A
1.5VIN to 1.5VOUT
CL(1.5VOUT)=100μF, RL=VI(1.5VIN)/0.500A
CL(3.3VOUT)=0.1μF, IO(3.3VOUT)=0A
3.3VIN to 3.3VOUT
AUXIN to VAUXOUT
CL(AUXOUT)=0.1μF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1μF, IO(1.5VOUT)=0A
Turn-On Propagation 1.5VIN to 1.5VOUT
tpd(on)
Delay
3.3VIN to 3.3VOUT
CL(3.3VOUT)=100μF, RL=VI(3.3VIN)/1A
AUXIN to VAUXOUT
CL(AUXOUT)=100μF, RL=VI(AUXIN)/0.250A
1.5VIN to 1.5VOUT
CL(1.5VOUT)=100μF, RL=VI(1.5VIN)/0.500A
CL(3.3VOUT)=0.1μF, IO(3.3VOUT)=0A
3.3VIN to 3.3VOUT
AUXIN to VAUXOUT
CL(AUXOUT)=0.1μF, IO(AUXOUT)=0A
CL(1.5VOUT)=0.1μF, IO(1.5VOUT)=0A
Turn-Off Propagation 1.5VIN to 1.5VOUT
tpd(off)
Delay
3.3VIN to 3.3VOUT
CL(3.3VOUT)=100μF, RL=VI(3.3VIN)/1A
AUXIN to VAUXOUT
CL(AUXOUT)=100μF, RL=VI(AUXIN)/0.250A
1.5VIN to 1.5VOUT
CL(1.5VOUT)=100μF, RL=VI(1.5VIN)/0.500A
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MIN TYP MAX
0.1
3
0.1
3
0.1
3
0.1
6
0.1
6
0.1
6
10
150
10
150
10
150
2
30
2
30
2
30
10
150
10
150
10
150
0.1
5
0.1
5
0.1
5
0.1
1
0.05
0.5
0.1
1
0.1
1.5
0.05
1
0.1
1.5
0.1
1.5
0.05
0.5
0.1
1.5
0.1
1.5
0.05
0.5
0.1
1
UNIT
ms
μs
ms
μs
ms
ms
ms
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
Preliminary
CMOS IC
FUNCTIONAL TRUTH TABLES
Table 1. Truth Table for Voltage Outputs
VOLTAGE INPUTS (Note 1)
LOGIC INPUTS
VOLTAGE OUTPUTS (Note 2)
MODE (Note 3)
CP
1.5VOUT
AUXOUT 3.3VOUT
(Note 4)
Off
x
x
x
x
x
Off
Off
Off
OFF
On
x
x
0
x
x
GND
GND
GND
Shutdown
On
x
x
1
x
1
GND
GND
GND
No Card
On
On
On
1
0
0
On
Off
Off
Standby
On
On
On
1
1
0
On
On
On
Card Inserted
Notes: 1. For input voltages, On means the respective input voltage is higher than its turnon threshold voltage;
otherwise, the voltage is Off (for AUX input, Off means the voltage is close to zero volt.)
2. For output voltages, On means the respective power switch is turned on so the input voltage is connected
to the output; Off means the power switch and its output discharge FET are both off; GND means the
power switch is off but the output discharge FET is on so the voltage on the output is pulled down to 0V.
3. Mode assigns each set of input conditions and respective output voltage results to a different name. These
modes are referred to as input conditions in the following Truth Table for Logic Outputs.
AUXIN
3.3VIN
1.5VIN
SHDN
STBY
4. CP = CPUSB and CPPE -equal to 1 when both CPUSB and CPPE signals are logic high, or equal to 0
when either CPUSB or CPPE is low.
Table 2. Truth Table for Logic Outputs
INPUT CONDITIONS
LOGIC OUTPUTS
MODE
SYSRST
RCLKEN (Note 1)
PERST
RCLKEN (Note 2)
OFF
Shutdown
No Card
Standby
X
X
0
0
0
Hi-Z
0
1
0
0
0
0
Card Inserted
1
Hi-Z
1
1
1
0
0
0
Notes: 1. RCLKEN as a logic input in this column. RCLKEN is an I/O pin and it can be driven low externally, left open,
or connected to high-impedance terminals, such as the gate of a MOSFET. It must not be driven high
externally.
2. RCLKEN as a logic output in this column.
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Preliminary
CMOS IC
POWER STATES
OFF mode
If AUXIN is not present, then all input-to-output power switches are kept off (OFF mode).
Shutdown mode
If AUXIN is present and SHDN is asserted (logic low), then all input-to-output power switches are kept off and the
output discharge FETs are turned on (Shutdown mode). If SHDN is asserted and then de-asserted, the state on
__________
the outputs is restored to the state prior to SHDN assertion.
No Card mode
If 3.3VIN, AUXIN and 1.5VIN are present at the input of the power switch and no card is inserted, then all
input-to-output power switches are kept off and the output discharge FETs are turned on (No Card mode).
Card Inserted mode
If 3.3VIN, AUXIN and 1.5VIN are present at the input of the power switch prior to a card being inserted, then all
input-to-output power switches are turned on once a card-present signal ( CPUSB and/or CPPE ) is detected (Card
Inserted mode).
Standby mode
If a card is present and all output voltages are being applied, then the STBY is asserted (logic low); the AUXOUT
voltage is provided to the card, and the 3.3VOUT and 1.5VOUT switches are turned off (Standby mode).
If a card is present and all output voltages are being applied, then the 1.5VIN, or 3.3VIN is removed from the input
of the power switch; the AUXOUT voltage is provided to the card and the 3.3VOUT and 1.5VOUT switches are turned off
(Standby mode).
If prior to the insertion of a card, the AUXIN is available at the input of the power switch and 3.3VIN and/or 1.5VIN
are not, or if STBY is asserted (logic low), then no power is made available to the card (OFF mode). If 1.5VIN and
3.3VIN are made available at the input of the power switch after the card is inserted and STBY is not asserted, all
the output voltages are made available to the card (Card Inserted mode).

DISCHARGE FETs
The discharge FETs on the outputs are activated whenever the device detects that a card is not present (No Card
mode). Activation occurs after the input-to-output power switches are turned off (break before make). The discharge
FETs de-activate if either of the card-present lines go active low, unless the SHDN pin is asserted.
The discharge FETs are also activated whenever the SHDN input is asserted and stay asserted until SHDN is
de-asserted.
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
Preliminary
CMOS IC
APPLICATION INFORMATION
Introduction to ExpressCardTM
An ExpressCard module is an add-in card with a serial interface based on PCI Express and/or Universal Serial
Bus (USB) technologies. An ExpressCardTM comes in two form factors defined as ExpressCard|34 or
ExpressCard|54. The difference, as defined by the name, is the width of the module, 34mm or 54mm, respectively.
Host systems supporting the ExpressCardTM module can support either the ExpressCard|34 or ExpressCard|54 or
both.
ExpressCardTM Power Requirements
Regardless of which ExpressCardTM module is used, the power requirements as defined in the ExpressCardTM
Standard apply to both on an individual slot basis. The host system is required to supply 3.3V, 1.5V, and AUX to
each of the ExpressCardTM slots. However, the voltage is only applied after an ExpressCardTM is inserted into the
slot.
The ExpressCardTM connector has two pins, CPPE and CPUSB , which are used to signal the host when a card
TM
is inserted. If the ExpressCard
module itself connects the CPPE to ground, the logic low level on that signal
indicates to the host that a card supporting PCI Express has been inserted. If CPUSB is connected to ground, then
TM
module supports the USB interface. If both PCI Express and USB are supported by the
the ExpressCard
ExpressCardTM module, then both signals, CPPE and CPUSB , must be connected to ground.
In addition to the Card Present signals ( CPPE and CPUSB ), the host system determines when to apply power to
TM
the ExpressCard module based on the state of the system. The state of the system is defined by the state of the
3.3 V, 1.5V, and AUX input voltage rails. For the sake of simplicity, the 3.3V and 1.5V rails are defined as the
primary voltage rails as oppose to the auxiliary voltage rail, AUX.
ExpressCardTM Power Switch Operation
The ExpressCard power switch resides on the host, and its main function is to control when to send power to the
ExpressCardTM slot. The ExpressCardTM power switch makes decisions based on the Card Present inputs and on
the state of the host system as defined by the primary and auxiliary voltage rails.
The following conditions define the operation of the host power controller:
1. When both primary power and auxiliary power at the input of the ExpressCardTM power switch are off, then all
power to the ExpressCardTM connector is off regardless of whether a card is present.
2. When both primary power and auxiliary power at the input of the ExpressCardTM power switch are on, then
power is only applied to the ExpressCardTM after the ExpressCardTM power switch detects that a card is present.
3. When primary power (either +3.3V or +1.5V) at the input of the ExpressCardTM power switch is off and auxiliary
power at the input of the ExpressCardTM power switch is on, then the ExpressCardTM power switch behaves in the
following manner:
(a) If neither of the Card Present inputs is detected (no card inserted), then no power is applied to the
ExpressCardTM slot.
(b) If the card is inserted after the system has entered this power state, then no power is applied to the
ExpressCardTM slot.
(c) If the card is inserted prior to the removal of the primary power (either +3.3V or +1.5V or both) at the input of
the ExpressCardTM power switch, then only the primary power (both +3.3V and +1.5V) is removed and the auxiliary
power is sent to the ExpressCardTM slot.
Figure 2 through Figure 7 illustrate the timing relationships between power/logic inputs and outputs of
ExpressCardTM.
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
Preliminary
CMOS IC
TEST CIRCUITS AND VOLTAGE WAVEFORMS
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Preliminary
CMOS IC
EXPRESS CARD TIMING DIAGRAMS
Host Power
(AUXIN, 3.3VIN,
and 1.5VIN)
SYSRST
CPxx
a
Card Power
(AUXIN, 3.3VOUT,
and 1.5VOUT)
RCLKEN
b
PERST
c
f
d
e
Tpd
a
b
c
d
e
f
Max
Min
System Dependent
100
System Dependent
100
4
20
10
Units
μs
μs
ms
ms
Figure 2. Timing Signals - Card Present Before Host Power Is On
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Preliminary
CMOS IC
EXPRESS CARD TIMING DIAGRAMS(Cont.)
Host Power
(AUXIN)
Host Power
(3.3VIN, and 1.5VIN)
SYSRST
CPxx
Card Power
(AUXIN, 3.3VOUT,
and 1.5VOUT)
RCLKEN
PERST
Note: Once 3.3V and 1.5V are applied, the power switch follows the power-up sequence of Figure 2 or Figure 3.
Figure 4. Timing Signals - Host System In Standby Prior to Card Insertion
Host Power
(AUXIN, 3.3VIN, and 1.5VIN)
b
SYSRST
CPxx
Card Power
(AUXOUT, 3.3VOUT, and
1.5VOUT)
c
RCLKEN
a
d
PERST
Min
Units
Tpd
Max
ns
500
a
System Dependent
b
c
Load Dependent
ns
500
d
Figure 5. Timing Signals - Host - Controlled Power Down
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
Preliminary
CMOS IC
EXPRESS CARD TIMING DIAGRAMS(Cont.)
Host Power
AUXIN, 3.3VIN, and 1.5VIN
SYSRST
CPxx
Card Power
(AUXOUT, 3.3VOUT, and
1.5VOUT)
a
RCLKEN
c
PERST
b
Tpd
a
b
c
Max
Min
Load Dependent
500
500
Units
ns
ns
Figure 7. Timing Signals – Surprise Card Removal
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Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT
AUXIN
AUXIN
AUXOUT
AUXOUT
3.3VIN
3.3VIN
3.3VOUT
3.3VOUT
1.5VIN
1.5VIN
1.5VOUT
1.5VOUT
UTC US12331G
SHDN
SHDN
STBY
STBY
SYSRST
OC
CPPE
Express Card
CPPE
CPUSB
CPUSB
OC
PERST
GND RCLKEN
PERST
SYSRST
REFCLK
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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