ISL3179E, ISL3180E ® Data Sheet April 22, 2008 High ESD Protected, +125°C, 40Mbps, 3.3V, Full Fail-Safe, RS-485/RS-422 Transceivers FN6365.2 Features Intersil’s ISL3179E and ISL3180E are high ESD Protected (see Table 1 below), 3.3V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each device has low bus currents (+220µA/-150µA), so it presents a “1/5 unit load” to the RS-485 bus. This allows up to 160 transceivers on the network without violating the RS-485 specification’s 32 unit load maximum, and without using repeaters. Receiver (Rx) inputs feature a “Full Fail-Safe” design, which ensures a logic high Rx output if Rx inputs are floating, shorted, or terminated but undriven. The ISL3180E is configured for full duplex applications. The ISL3179E half duplex version multiplexes the Rx inputs and Tx outputs to allow a transceiver with an output disable function in 8 Ld packages. • High ESD Protection on RS-485 I/O Pins - ISL3179E . . . . . . . . . . . . . . . . . . . . . ±16.5kV IEC61000 - ISL3180E . . . . . . . . . . . . . . . . . . . . . . . . . . ±12kV HBM - Class 3 HBM ESD Level on all Other Pins . . . . . . . >9kV • Specified for +125°C Operation • High Data Rates . . . . . . . . . . . . . . . . . . . . . . up to 40Mbps • 5V Tolerant Logic Inputs • 1/5 Unit Load Allows up to 160 Devices on the Bus • Full Fail-Safe (Open, Shorted, Terminated/Undriven) Receiver • Hot Plug - Tx and Rx Outputs Remain Three-State During Power-Up • Low Quiescent Current . . . . . . . . . . . . . . . . . . 4mA (Max) • Low Current Shutdown Mode. . . . . . . . . . . . . . 1µA (Max) • -7V to +12V Common Mode Input Voltage Range Hot Plug circuitry ensures that the Tx and Rx outputs remain in a high impedance state while the power supply stabilizes. • Three-State Rx and Tx Outputs Ordering Information • 16/16.5ns (Max) Tx/Rx Propagation Delays; 1.5ns (Max) Skew PART NUMBER (Note) TEMP. RANGE (°C) PART MARKING # PACKAGE (Pb-Free) PKG. DWG. # • Operates from a Single +3.3V Supply (10% Tolerance) ISL3179EFBZ* 3179 EFBZ -40 to +125 8 Ld SOIC M8.15 • Current Limiting and Thermal Shutdown for driver Overload Protection ISL3179EFUZ* 179FZ -40 to +125 8 Ld MSOP M8.118 • Pb-Free (RoHS Compliant) ISL3179EFRZ* 79FZ -40 to +125 10 Ld DFN L10.3x3C ISL3179EIBZ* 3179 EIBZ -40 to +85 8 Ld SOIC M8.15 ISL3179EIUZ* 179IZ -40 to +85 8 Ld MSOP M8.118 • Motor Controller/Position Encoder Systems ISL3179EIRZ* 79IZ -40 to +85 10 Ld DFN L10.3x3C • Factory Automation ISL3180EIBZ* ISL3180 EIBZ -40 to +85 14 Ld SOIC M14.15 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Applications • Field Bus Networks • Security Networks • Building Environmental Control Systems • Industrial/Process Control Networks TABLE 1. SUMMARY OF FEATURES PART NUMBER HALF/FULL DATA RATE DUPLEX (Mbps) RS-485 PIN ESD LEVEL HOT PLUG? RX/TX ENABLE? QUIESCENT ICC (mA) LOW POWER SHUTDOWN? PIN COUNT ISL3179E HALF 40 16.5kV IEC61000 YES YES 2.6 YES 8, 10 ISL3180E FULL 40 12kV HBM YES YES 2.6 YES 14 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL3179E, ISL3180E Pinouts ISL3179E (10 LD DFN) TOP VIEW ISL3179E (8 LD SOIC, MSOP) TOP VIEW RO 1 8 VCC RE 2 7 B/Z DE 3 6 A/Y 5 GND DI 4 R D RO 1 10 VCC RE 2 9 NC DE 3 8 B/Z DI 4 7 A/Y NC 5 6 GND ISL3180E (SOIC) TOP VIEW NC 1 14 VCC RO 2 RE 3 13 NC R 11 B DE 4 DI 5 12 A D 10 Z GND 6 9 Y GND 7 8 NC Truth Table Truth Table TRANSMITTING RECEIVING INPUTS OUTPUTS INPUTS OUTPUT RE DE DI B/Z A/Y RE DE X 1 1 0 1 0 0 ≥ -0.05V 1 X 1 0 1 0 0 0 ≤ -0.2V 0 0 0 X High-Z High-Z 0 0 Inputs Open/Shorted 1 1 0 X High-Z* High-Z* 1 1 X High-Z 1 0 X High-Z* NOTE: *Shutdown Mode A-B RO NOTE: *Shutdown Mode Pin Descriptions PIN FUNCTION RO Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted, or connected to a terminated bus that is undriven. RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t required, connect RE directly to GND. DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high impedance when DE is low. If the Tx enable function isn’t required, connect DE to VCC through a 1kΩ or greater resistor. DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low. 2 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Pin Descriptions (Continued) PIN GND A/Y FUNCTION Ground connection. ±16.5kV IEC61000 ESD Protected RS-485/RS-422 level, non-inverting receiver input and non-inverting driver output. Pin is an input (A) if DE = 0; pin is an output (Y) if DE = 1. ISL3179E only B/Z ±16.5kV IEC61000 ESD Protected RS-485/RS-422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is an output (Z) if DE = 1. ISL3179E only A ±12kV HBM ESD Protected RS-485/RS-422 level, non-inverting receiver input. ISL3180E only B ±12kV HBM ESD Protected RS-485/RS-422 level, inverting receiver input. ISL3180E only Y ±12kV HBM ESD Protected RS-485/RS-422 level, non-inverting driver output. ISL3180E only Z ±12kV HBM ESD Protected RS-485/RS-422 level, inverting driver output. ISL3180E only VCC System power supply input (3.0V to 3.6V). NC No Connection. Typical Operating Circuit ISL3179E +3.3V +3.3V (SOIC AND MSOP PIN NUMBERS SHOWN) + 8 0.1µF 0.1µF + 8 VCC 1 RO VCC R D 2 RE B/Z 7 3 DE A/Y 6 4 DI RT RT DI 4 7 B/Z DE 3 6 A/Y RE 2 RO 1 R D GND GND 5 5 ISL3180E (PIN NUMBERS FOR SOIC) +3.3V + 14 VCC 2 RO R A 12 0.1µF +3.3V 0.1µF RT + 14 VCC 9 Y B 11 D 10 Z 3 RE DE 4 RE 3 4 DE Z 10 5 DI DI 5 Y 9 D GND 6, 7 3 RT 11 B R 12 A RO 2 GND 6, 7 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Input/Output Voltages A, B, Y, Z, A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Resistance (Typical, Note 1, 2) θJA (°C/W) θJC (°C/W) 8 Ld SOIC Package . . . . . . . . . . . . . . . 160 N/A 14 Ld SOIC Package . . . . . . . . . . . . . . 128 N/A 8 Ld MSOP Package . . . . . . . . . . . . . . 137 N/A 10 Ld DFN Package. . . . . . . . . . . . . . . 46 3.5 Maximum Junction Temperature (Plastic Package) . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range ISL3179EF . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C ISL3179EI, ISL3180EI . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. θJA is measured with the component mounted on a high effective thermal conductivity (with direct attach for DFN) test board in free air. See Tech Brief TB379 for details. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. (Note 3) PARAMETER TEMP (°C) MIN (Note 13) TYP RL = 100Ω (RS-422) (Figure 1A), (Note 12) Full 2 2.3 - V RL = 54Ω (RS-485) (Figure 1A) Full 1.5 2.1 VCC V No Load Full - - VCC RL = 60Ω, -7V ≤VCM ≤12V (Figure 1B), (Note 12) Full 1.5 2 - V ΔVOD RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V VOC RL = 54Ω or 100Ω (Figure 1A) Full - 2 2.5 V ΔVOC RL = 54Ω or 100Ω (Figure 1A) Full - 0.02 0.2 V SYMBOL TEST CONDITIONS MAX (Note 13) UNITS DC CHARACTERISTICS VOD Driver Differential VOUT Change in Magnitude of Driver Differential VOUT for Complementary Output States Driver Common-Mode VOUT Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States Logic Input High Voltage VIH DI, DE, RE Full 2 - - V Logic Input Low Voltage VIL DI, DE, RE Full - - 0.8 V Logic Input Current IIN1 DI = DE = RE = 0V or VCC Full -2 - 2 µA Input Current (A, B, A/Y, B/Z) IIN2 DE = 0V, VCC = 0V or 3.6V Y or Z Output Leakage Current IOZ Driver Short-Circuit Current, VO = High or Low IOSD1 Receiver Differential Threshold Voltage VTH VIN = 12V Full - - 220 µA VIN = -7V Full -160 - - µA DE = 0V, -7V ≤VY or VZ ≤12V, ISL3180E Only Full -40 - 40 µA DE = VCC, -7V ≤VY or VZ ≤12V (Note 5) Full - - ±250 mA -7V ≤ VCM ≤ 12V Full -200 - -50 mV Receiver Input Hysteresis ΔVTH VCM = 0V 25 - 28 - mV Receiver Output High Voltage VOH IO = -12mA, VID = -50mV Full VCC - 0.5 - - V Receiver Output Low Voltage VOL IO = +10mA, VID = -200mV Full - - 0.4 V 4 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. (Note 3) (Continued) PARAMETER TEMP (°C) MIN (Note 13) TYP VOL = 1V, VID = -200mV Full 25 - - mA SYMBOL TEST CONDITIONS MAX (Note 13) UNITS Receiver Output Low Current IOL Three-State (high impedance) Receiver Output Current IOZR 0.4V ≤ VO ≤ 2.4V Full -1 0.015 1 µA Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V Full 54 80 - kΩ Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full ±20 - ±110 mA DI = DE = 0V or VCC Full - 2.6 4 mA DE = 0V, RE = VCC, DI = 0V or VCC Full - 0.05 1 µA IEC61000-4-2, Air-Gap Discharge Method 25 - ±16.5 - kV SUPPLY CURRENT No-Load Supply Current (Note 4) Shutdown Supply Current ICC ISHDN ESD PERFORMANCE RS-485 Pins (A/Y, B/Z) ISL3179E Only RS-485 Pins (A, B, Y, Z) ISL3180E Only All Pins IEC61000-4-2, Contact Discharge Method 25 - ±9 - kV Human Body Model, From Bus Pins to GND 25 - ±16.5 - kV IEC61000-4-2, Air-Gap Discharge Method 25 - ±4 - kV IEC61000-4-2, Contact Discharge Method 25 - ±5 - kV Human Body Model, From Bus Pins to GND 25 - ±12 - kV HBM, per MIL-STD-883 Method 3015 25 - >±9 - kV Machine Model 25 - >±400 - V DRIVER SWITCHING CHARACTERISTICS Maximum Data Rate fMAX Driver Differential Output Delay tDD VOD ≥ ±1.5V, RD = 54Ω, CL = 100pF (Figure 4) -40 to 85 40 60 - Mbps 125 16 32 - Mbps RD = 54Ω, CD = 50pF (Figure 2) Full - 11 16 ns Prop Delay Part-to-Part Skew tSKP-P RD = 54Ω, CD = 50pF (Figure 2), (Note 11) Full - - 4 ns Driver Differential Output Skew tSKEW RD = 54Ω, CD = 50pF (Figure 2) Full - 0 1.5 ns tR, tF RD = 54Ω, CD = 50pF (Figure 2) Full - 4 7 ns Driver Differential Rise or Fall Time Driver Enable to Output High tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Note 6) Full - 18 25 ns Driver Enable to Output Low tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Note 6) Full - 16 25 ns Driver Disable from Output High tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 3), Full - 15 25 ns Driver Disable from Output Low tLZ RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), Full - 18 25 ns (Note 8) Full 60 - 600 ns Time to Shutdown tSHDN Driver Enable from Shutdown to Output High tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3), (Notes 8, 9) Full - - 1000 ns Driver Enable from Shutdown to Output Low tZL(SHDN) RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), (Notes 8, 9) Full - - 1000 ns Full 40 60 - Mbps Full - 10 16.5 ns (Figure 5), (Note 11) Full - - 4 ns (Figure 5) Full - 0 1.5 ns RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Note 7) Full - 10 15 ns RECEIVER SWITCHING CHARACTERISTICS Maximum Data Rate fMAX VID = ±1.5V tPLH, tPHL (Figure 5) Receiver Input to Output Delay Prop Delay Part-to-Part Skew tSKP-P Receiver Skew | tPLH - tPHL | tSKD Receiver Enable to Output High tZH 5 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at VCC = 3.3V, TA = +25°C. (Note 3) (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 13) TYP - 11 MAX (Note 13) UNITS Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Note 7) Full Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full - 10 15 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) Full - 10 15 ns (Note 8) Full 60 - 600 ns Receiver Enable from Shutdown to tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), Output High (Notes 8, 10) Full - - 1000 ns tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 8, 10) Full - - 1000 ns Time to Shutdown tSHDN Receiver Enable from Shutdown to Output Low 15 ns NOTES: 3. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 4. Supply current specification is valid for loaded drivers when DE = 0V. 5. Applies to peak current. See “Typical Performance Curves” on page 11 for more information. 6. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN. 7. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 8. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page 10. 9. Keep RE = VCC, and set the DE signal low time >700ns to ensure that the device enters SHDN. 10. Set the RE signal high time >700ns to ensure that the device enters SHDN. 11. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, VCC, etc.). 12. VCC = 3.3V ±5% 13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Test Circuits and Waveforms VCC RL/2 DE 375Ω VCC Z DI Z DI VOD D DE Y Y RL/2 FIGURE 1A. VOD AND VOC VOC VCM VOD D RL = 60Ω -7V TO +12V 375Ω FIGURE 1B. VOD WITH COMMON MODE LOAD FIGURE 1. DC DRIVER TEST CIRCUITS 6 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Test Circuits and Waveforms (Continued) 3V DI 1.5V 1.5V 0V tPHL tPLH VCC DE Z DI RD D OUT (Z) VOH OUT (Y) VOL CD Y 90% DIFF OUT (Y - Z) SIGNAL GENERATOR +VOD 90% 10% 10% tR -VOD tF SKEW = |tPLH - tPHL| FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES DE Z DI 3V 110Ω VCC D SIGNAL GENERATOR SW Y DE (Note 8) GND 50pF 1.5V 1.5V 0V tZH, tZH(SHDN) tHZ OUTPUT HIGH (Note 8) VOH - 0.5V VOH 50% OUT (Y, Z) 0V PARAMETER OUTPUT RE DI SW tHZ Y/Z X 1/0 GND tLZ Y/Z X 0/1 VCC tZH Y/Z 0 (Note 6) 1/0 GND tZL Y/Z 0 (Note 6) 0/1 VCC tZH(SHDN) Y/Z 1 (Note 9) 1/0 GND tZL(SHDN) Y/Z 1 (Note 9) 0/1 VCC tZL, tZL(SHDN) tLZ (Note 8) VCC OUT (Y, Z) 50% OUTPUT LOW FIGURE 3A. TEST CIRCUIT VOL + 0.5V V OL FIGURE 3B. MEASUREMENT POINTS FIGURE 3. DRIVER ENABLE AND DISABLE TIMES VCC DE 3V + CL Z DI 54Ω D Y DI VOD 0V - SIGNAL GENERATOR CL +VOD DIFF OUT (Y - Z) -VOD 0V FIGURE 4B. MEASUREMENT POINTS FIGURE 4A. TEST CIRCUIT FIGURE 4. DRIVER DATA RATE 7 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Test Circuits and Waveforms (Continued) +3V RE +1.5V 15pF B R A A 1.5V 1.5V RO 0V tPLH tPHL VCC SIGNAL GENERATOR 1.7V RO 1.7V 0V FIGURE 5B. MEASUREMENT POINTS FIGURE 5A. TEST CIRCUIT FIGURE 5. RECEIVER PROPAGATION DELAY RE GND (NOTE 8) B A R 3V 1kΩ RO VCC SW SIGNAL GENERATOR RE 1.5V 1.5V GND 15pF 0V tZH, tZH(SHDN) (NOTE 8) tHZ OUTPUT HIGH VOH - 0.5V PARAMETER DE A SW tHZ 0 +1.5V GND 0V tLZ 0 -1.5V VCC tZL, tZL(SHDN) tZH (Note 7) 0 +1.5V GND (NOTE 8) tZL (Note 7) 0 -1.5V VCC RO tZH(SHDN) (Note 10) 0 +1.5V GND tZL(SHDN) (Note 10) 0 -1.5V VCC FIGURE 6A. TEST CIRCUIT VOH 1.5V RO tLZ VCC 1.5V OUTPUT LOW VOL + 0.5V V OL FIGURE 6B. MEASUREMENT POINTS FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES 8 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Application Information RS-485 and RS-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any mix of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000’ (~1200m), so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. Receiver (Rx) Features This transceiver utilizes a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is ±200mV, as required by the RS-422 and RS-485 specifications. Receiver inputs function with common mode voltages as great as +9/-7V outside the power supplies (i.e., +12V and -7V), making them ideal for long networks, or industrial environments, where induced voltages are a realistic concern. The receiver input resistance of 50kΩ surpasses the RS-422 specification of 4kΩ, and is 5x the RS-485 “Unit Load” (UL) requirement of 12kΩ minimum. Thus, the ISL3179E is known as a “one-fifth UL” transceiver, and there can be up to 160 devices on the RS-485 bus while still complying with the RS-485 loading specification. The receiver is a “Full Fail-Safe” version that guarantees a high level receiver output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled (terminated/undriven). Outputs of the drivers are not slew rate limited, so faster output transition times allow data rates of at least 40Mbps. Driver outputs are tri-statable via the active high DE input. For parallel applications, bit-to-bit skews between any two transmitter and receiver pairs are guaranteed to be no worse than 8ns (4ns max for any two Tx, 4ns max for any two Rx). ESD Protection All pins on the ISL3179E and ISL3180E include class 3 (>9kV) Human Body Model (HBM) ESD protection structures, but the RS-485 pins (driver outputs and receiver inputs) incorporate advanced structures allowing them to survive ESD events in excess of ±16.5kV HBM (ISL3179E) or ±12kV HBM (ISL3180E), and ±16.5kV (ISL3179E) or ±4kV (ISL3180E) IEC61000-4-2. The RS-485 pins are particularly vulnerable to ESD strikes because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, and without degrading the RS-485 common mode range of -7V to +12V. This built-in ESD protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. IEC61000-4-2 Testing The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-485 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The IEC61000 standard’s lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into the ISL3179E’s RS-485 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-485 port. AIR-GAP DISCHARGE TEST METHOD Receivers easily meet the 40Mbps data rate supported by the driver, and the receiver output is tri-statable via the active low RE input. For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is more difficult to obtain repeatable results. The ISL3179E RS-485 pins withstand ±16.5kV air-gap discharges, while the ISL3180E’s RS-485 pins withstand ±4kV. Driver (Tx) Features CONTACT DISCHARGE TEST METHOD The RS-485/RS-422 driver is a differential output device that delivers at least 1.5V across a 54Ω load (RS-485), and at least 2V across a 100Ω load (RS-422). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages Rx outputs deliver large low state currents (typically 28mA at VOL = 1V) to ease the design of optically coupled isolated networks. 9 FN6365.2 April 22, 2008 ISL3179E, ISL3180E higher than ±9kV. The RS-485 pins of the ISL3179E survive ±9kV contact discharges, while the ISL3180E’s RS-485 pins withstand ±5kV. Hot Plug Function When a piece of equipment powers up, there is a period of time where the processor or ASIC driving the RS-485 control lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs are kept disabled. If the equipment is connected to the bus, a driver activating prematurely during power up may crash the bus. To avoid this scenario, the ISL3179E and ISL3180E incorporate a “Hot Plug” function. Circuitry monitoring VCC ensures that, during power up and power down, the Tx and Rx outputs remain disabled, regardless of the state of DE and RE, if VCC is less than ~2.4V. This gives the processor/ASIC a chance to stabilize and drive the RS-485 control lines to the proper states. RE = GND 2.5V 2.3V 4 2 0 4 RL = 1kΩ 2 A/Y ISL3179E 0 4 RL = 1kΩ RO 2 ISL3179E 0 RECEIVER OUTPUT (V) DRIVER Y OUTPUT (V) VCC VCC (V) DE, DI = VCC TIME (40µs/DIV) FIGURE 7. HOT PLUG PERFORMANCE (ISL3179E) vs ISL83485 WITHOUT HOT PLUG CIRCUITRY Data Rate, Cables, and Terminations RS-485/RS-422 are intended for network lengths up to 4000’, but the maximum system data rate decreases as the transmission length increases. Devices operating at 40Mbps are limited to lengths less than 100’. Twisted pair is the cable of choice for RS-485/RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receiver in this IC. impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. The ISL3179E, and ISL3180E may also be used at slower data rates over longer cables, but there are some limitations. The Rx is optimized for high speed operation, so its output may glitch if the Rx input differential transition times are too slow. Keeping the transition times below 500ns, which equates to the Tx driving a 1000’ (305m) CAT 5 cable, yields excellent performance over the full operating temperature range. Built-In Driver Overload Protection As stated previously, the RS-485 specification requires that drivers survive worst case bus contentions undamaged. These transmitters meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the RS-485 specification, even at the common mode voltage range extremes. In the event of a major short circuit condition, the device also includes a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically reenable after the die temperature drops about +15°C. If the contention persists, the thermal shutdown/reenable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Low Power Shutdown Mode This BiCMOS transceiver uses a fraction of the power required by their bipolar counterparts, but it also includes a shutdown feature that reduces the already low quiescent ICC to a 50nA trickle. It enters shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 60ns guarantees that the transceiver will not enter shutdown. Note that receiver and driver enable times increase when the transceiver enables from shutdown. Refer to Notes 6, 7, 8, 9 and 10, at the end of the “Electrical Specification” table on page 6, for more information. Proper termination is imperative to minimize reflections. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic 10 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Typical Performance Curves VCC = 3.3V, TA = +25°C; Unless Otherwise Specified 90 DIFFERENTIAL OUTPUT VOLTAGE (V) 2.40 DRIVER OUTPUT CURRENT (mA) 80 +85°C +25°C RD = 33Ω 70 +125°C 60 50 RD = 54Ω 40 30 RD = 100Ω 20 10 0 0 0.5 1.0 1.5 2.0 2.5 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.0 2.35 2.30 2.20 2.15 2.10 2.05 2.00 RD = 54Ω 1.95 1.90 -40 3.3 FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE RD = 100Ω 2.25 -15 10 35 60 TEMPERATURE (°C) 85 110 125 FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE 2.40 150 DE = VCC, RE = X OR DE = GND, RE = GND Y OR Z = LOW 2.35 2.30 50 ICC (mA) OUTPUT CURRENT (mA) 100 0 2.25 2.20 -50 2.15 Y OR Z = HIGH -100 -7 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 2.10 -40 12 10 35 60 85 110 125 TEMPERATURE (°C) FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE FIGURE 11. SUPPLY CURRENT vs TEMPERATURE 0.25 13.0 |tPLH - tPHL| 12.5 0.20 12.0 11.5 11.0 SKEW (ns) PROPAGATION DELAY (ns) -15 tPLH 10.5 tPHL 10.0 0.15 0.10 9.5 0.05 9.0 8.5 8.0 -40 -15 10 35 60 85 110 125 TEMPERATURE (°C) FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE 11 0 -40 -15 10 35 60 85 110 125 TEMPERATURE (°C) FIGURE 13. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE FN6365.2 April 22, 2008 ISL3179E, ISL3180E 5 0 5 RO 0 3 Y-Z 1 0 -1 -2 -3 5 0 5 RO 0 3 2 1 0 -1 Y-Z -2 -3 TIME (5ns/DIV) TIME (5ns/DIV) 5 0 5.0 RO 0 DRIVER+CABLE DELAY RECEIVER OUTPUT (V) DI = 40Mbps DRIVER INPUT (V) FIGURE 15. DRIVER AND RECEIVER WAVEFORMS DI = 2Mbps 5 0 5.0 0 (~160ns) 3.0 RECEIVER INPUT (V) RECEIVER INPUT (V) RECEIVER OUTPUT (V) FIGURE 14. DRIVER AND RECEIVER WAVEFORMS 1.5 A-B 0 -1.5 -3.0 TIME (10ns/DIV) RO DRIVER+CABLE DELAY DRIVER INPUT (V) 2 RDIFF = 54Ω, CD = 50pF DI DRIVER INPUT (V) RDIFF = 54Ω, CD = 50pF DI RECEIVER OUTPUT (V) DRIVER INPUT (V) VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued) DRIVER OUTPUT (V) DRIVER OUTPUT (V) RECEIVER OUTPUT (V) Typical Performance Curves (~720ns) 3.0 1.5 A-B 0 -1.5 -3.0 TIME (200ns/DIV) FIGURE 16. DRIVER AND RECEIVER WAVEFORMS DRIVING 100 ‘ (31m) OF CAT5 CABLE (DOUBLE TERMINATED WITH 120Ω) FIGURE 17. DRIVER AND RECEIVER WAVEFORMS DRIVING 500’ (152m) OF CAT5 CABLE (DOUBLE TERMINATED WITH 120Ω) RECEIVER OUTPUT CURRENT (mA) 60 VOL +25°C 50 VOH +25°C VOL +85°C 40 VOL +125°C VOH +125°C 30 VOH +85°C 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 RECEIVER OUTPUT VOLTAGE (V) FIGURE 18. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE 12 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Die Characteristics SUBSTRATE AND DFN THERMAL PAD POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 768 PROCESS: Si Gate BiCMOS 13 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Mini Small Outline Plastic Packages (MSOP) N M8.118 (JEDEC MO-187AA) 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE E1 INCHES E -B- INDEX AREA 1 2 0.20 (0.008) A B C TOP VIEW 4X θ 0.25 (0.010) R1 R GAUGE PLANE SEATING PLANE -CA 4X θ A2 A1 b -H- 0.10 (0.004) L SEATING PLANE C MIN MAX MIN MAX NOTES A 0.037 0.043 0.94 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - D 0.116 0.120 2.95 3.05 3 E1 0.116 0.120 2.95 3.05 4 0.026 BSC 0.20 (0.008) C C a SIDE VIEW CL E1 0.20 (0.008) C D -B- - 0.187 0.199 4.75 5.05 - L 0.016 0.028 0.40 0.70 6 0.037 REF N -A- 0.65 BSC E L1 e D SYMBOL e L1 MILLIMETERS 0.95 REF 8 R 0.003 R1 0 α - 8 - 0.07 0.003 - 5o 15o 0o 6o 7 - - 0.07 - - 5o 15o - 0o 6o Rev. 2 01/03 END VIEW NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension “D” does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane 11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. 14 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Dual Flat No-Lead Plastic Package (DFN) L10.3x3C 2X 0.10 C A A 10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE D MILLIMETERS 2X 0.10 C B E SYMBOL MIN NOMINAL MAX NOTES A 0.85 0.90 0.95 - A1 - - 0.05 - A3 6 INDEX AREA b 0.20 REF 0.20 D TOP VIEW B D2 // A C SEATING PLANE D2 6 INDEX AREA 0.08 C 7 8 D2/2 1 2.33 2.38 2.43 7, 8 1.69 7, 8 3.00 BSC 1.59 e 1.64 - 0.50 BSC - k 0.20 - - - L 0.35 0.40 0.45 8 N 10 2 Nd 5 3 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. NX k 2. N is the number of terminals. 3. Nd refers to the number of terminals on D. E2 E2/2 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. NX L N N-1 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. NX b e (Nd-1)Xe REF. BOTTOM VIEW 5 0.10 M C A B (A1) 9 L 5 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. CL NX (b) 5, 8 Rev. 1 4/06 2 (DATUM A) 8 0.30 3.00 BSC E E2 A3 SIDE VIEW (DATUM B) 0.10 C 0.25 - 9. COMPLIANT TO JEDEC MO-229-WEED-3 except for dimensions E2 & D2. e SECTION "C-C" C C TERMINAL TIP FOR ODD TERMINAL/SIDE 15 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e α B S 0.050 BSC - 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 α 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC H N NOTES: MILLIMETERS 8 0° 8 8° 0° 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 16 FN6365.2 April 22, 2008 ISL3179E, ISL3180E Small Outline Plastic Packages (SOIC) M14.15 (JEDEC MS-012-AB ISSUE C) N INDEX AREA H 0.25(0.010) M 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 3 L SEATING PLANE -A- h x 45o A D -C- α e A1 B 0.25(0.010) M C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3367 0.3444 8.55 8.75 3 E 0.1497 0.1574 3.80 4.00 4 e C 0.10(0.004) B S 0.050 BSC 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N NOTES: MILLIMETERS α 14 0o 14 8o 0o 7 8o Rev. 0 12/93 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17 FN6365.2 April 22, 2008