ICL3221 thru ICL3243 TM Data Sheet May 2000 1 Microamp Supply-Current, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers The Intersil ICL32XX devices are 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and automatic powerdown functions (except for the ICL3232), reduce the standby supply current to a 1µA trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This family is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. The ICL324X are 3 driver, 5 receiver devices that provide a complete serial port suitable for laptop or notebook computers. Both devices also include noninverting alwaysactive receivers for “wake-up” capability. The ICL3221, ICL3223 and ICL3243, feature an automatic powerdown function which powers down the on-chip powersupply and driver circuits. This occurs when an attached peripheral device is shut off or the RS-232 cable is removed, conserving system power automatically without changes to the hardware or operating system. These devices power up again when a valid RS-232 voltage is applied to any receiver input. Table 1 summarizes the features of the devices represented by this data sheet, while Application Note AN9863 summarizes the features of each device comprising the ICL32XX 3V family. File Number 4805.2 Features • Drop in Replacements for MAX3221, MAX3222, MAX3223, MAX3232, MAX3241, MAX3243, SP3243 • ICL3222 is Low Power, Pin Compatible Upgrade for 5V MAX242, and SP312A • ICL3232 is Low Power Upgrade for HIN232/ICL232 and Pin Compatible Competitor Devices • Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V • Latch-Up Free • On-Chip Voltage Converters Require Only Four External 0.1µF Capacitors • Manual and Automatic Powerdown Features (Except ICL3232) • Guaranteed Mouse Driveability • Receiver Hysteresis For Improved Noise Immunity • Guaranteed Minimum Data Rate . . . . . . . . . . . . 250kbps • Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs • Wide Power Supply Range. . . . . . . . Single +3V to +5.5V • Low Supply Current in Powerdown State . . . . . . . . . . 1µA Applications • Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Digital Cameras - Cellular/Mobile Phones TABLE 1. SUMMARY OF FEATURES PART NUMBER NO. OF NO. OF Tx. Rx. NO. OF MONITOR Rx. (ROUTB) DATA RATE (kbps) Rx. ENABLE FUNCTION? READY OUTPUT? MANUAL POWERDOWN? AUTOMATIC POWERDOWN FUNCTION? ICL3221 1 1 0 250 YES NO YES YES ICL3222 2 2 0 250 YES NO YES NO ICL3223 2 2 0 250 YES NO YES YES ICL3232 2 2 0 250 NO NO NO NO ICL3241 3 5 2 250 YES NO YES NO ICL3243 3 5 1 250 NO NO YES YES 3-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 ICL3221 thru ICL3243 Ordering Information (NOTE 1) PART NO. TEMP. RANGE (oC) PACKAGE PKG. NO. ICL3221CA 0 to 70 16 Ld SSOP M16.209 ICL3221CV 0 to 70 16 Ld TSSOP M16.173 ICL3222CA 0 to 70 20 Ld SSOP M20.209 ICL3222CB 0 to 70 18 Ld SOIC M18.3 ICL3222CP 0 to 70 18 Ld PDIP E18.3 ICL3222CV 0 to 70 20 Ld TSSOP M20.173 ICL3223CA 0 to 70 20 Ld SSOP M20.209 ICL3223CP 0 to 70 20 Ld PDIP E20.3 ICL3223CV 0 to 70 20 Ld TSSOP M20.173 ICL3232CA 0 to 70 16 Ld SSOP M16.209 ICL3232CB 0 to 70 16 Ld SOIC M16.3 ICL3232CP 0 to 70 16 Ld PDIP E16.3 ICL3232CV 0 to 70 16 Ld TSSOP M16.173 ICL3241CA 0 to 70 28 Ld SSOP M28.209 ICL3241CB 0 to 70 28 Ld SOIC M28.3 ICL3241CV 0 to 70 28 Ld TSSOP M28.173 ICL3243CA 0 to 70 28 Ld SSOP M28.209 ICL3243CB 0 to 70 28 Ld SOIC M28.3 ICL3243CV 0 to 70 28 Ld TSSOP M28.173 NOTE: 1. Most surface mount devices are available on tape and reel; add “-T” to suffix. Pinouts ICL3221 (SSOP, TSSOP) TOP VIEW 16 FORCEOFF EN 1 15 VCC C1+ 2 V+ 3 14 GND C1- 4 13 T1OUT C2+ 5 12 FORCEON 11 T1IN C2- 6 10 INVALID V- 7 9 R1OUT R1IN 8 3-2 ICL3222 (PDIP, SOIC) TOP VIEW EN 1 18 SHDN C1+ 2 17 VCC 3 16 GND V+ C1- 4 15 T1OUT C2+ 5 14 R1IN C2- 6 13 R1OUT V- 7 12 T1IN T2OUT 8 11 T2IN R2IN 9 10 R2OUT ICL3221 thru ICL3243 Pinouts (Continued) ICL3222 (SSOP, TSSOP) TOP VIEW ICL3223 (PDIP, SSOP, TSSOP) TOP VIEW 20 FORCEOFF EN 1 20 SHDN EN 1 C1+ 2 19 VCC C1+ 2 19 VCC 3 18 GND V+ 3 18 GND V+ C1- 4 17 T1OUT C1- 4 17 T1OUT C2+ 5 16 R1IN C2+ 5 16 R1IN C2- 6 15 R1OUT C2- 6 15 R1OUT T2OUT 8 13 T1IN R2IN 9 12 T2IN T2OUT 8 13 T1IN R2IN 9 12 T2IN ICL3232 (PDIP, SOIC, SSOP, TSSOP) TOP VIEW C1+ 1 V+ 2 C1- 3 11 INVALID R2OUT 10 11 NC R2OUT 10 14 FORCEON V- 7 14 NC V- 7 ICL3241 (SOIC, SSOP, TSSOP) TOP VIEW 16 VCC C2+ 1 28 C1+ 15 GND C2- 2 27 V+ V- 14 T1OUT 3 26 VCC 25 GND C2+ 4 13 R1IN R1IN 4 C2- 5 12 R1OUT R2IN 5 24 C1- 11 T1IN R3IN 6 23 EN 10 T2IN R4IN 7 22 SHDN R5IN 8 21 R1OUTB T1OUT 9 20 R2OUTB T2OUT 10 19 R1OUT T3OUT 11 18 R2OUT T3IN 12 17 R3OUT T2IN 13 16 R4OUT T1IN 14 15 R5OUT V- 6 T2OUT 7 9 R2OUT R2IN 8 ICL3243 (SOIC, SSOP, TSSOP) TOP VIEW C2+ 1 28 C1+ C2- 2 27 V+ 3 26 VCC R1IN 4 25 GND R2IN 5 24 C1- R3IN 6 23 FORCEON R4IN 7 22 FORCEOFF R5IN 8 21 INVALID T1OUT 9 20 R2OUTB T2OUT 10 19 R1OUT T3OUT 11 18 R2OUT T3IN 12 17 R3OUT T2IN 13 16 R4OUT T1IN 14 15 R5OUT V- 3-3 ICL3221 thru ICL3243 Pin Descriptions PIN VCC FUNCTION System power supply input (3.0V to 5.5V). V+ Internally generated positive transmitter supply (+5.5V). V- Internally generated negative transmitter supply (-5.5V). GND Ground connection. C1+ External capacitor (voltage doubler) is connected to this lead. C1- External capacitor (voltage doubler) is connected to this lead. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. TOUT RS-232 level (nominally ±5.5V) transmitter outputs. RIN RS-232 compatible receiver inputs. ROUT TTL/CMOS level receiver outputs. ROUTB TTL/CMOS level, noninverting, always enabled receiver outputs. INVALID Active low output that indicates if no valid RS-232 levels are present on any receiver input. EN SHDN Active low receiver enable control; doesn’t disable ROUTB outputs. Active low input to shut down transmitters and on-board power supply, to place device in low power mode. FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2). FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high). Typical Operating Circuits ICL3221 +3.3V C1 0.1µF C2 0.1µF T1IN TTL/CMOS LOGIC LEVELS R1OUT + 0.1µF 2 + C1+ 4 C15 + C2+ 6 C2- 15 VCC 3 V+ V- 7 C4 + 0.1µF T1 11 + C3 0.1µF 13 9 8 T1OUT R1IN RS-232 LEVELS 5kΩ R1 1 EN 16 FORCEOFF 12 FORCEON GND 14 3-4 INVALID 10 VCC TO POWER CONTROL LOGIC ICL3221 thru ICL3243 Typical Operating Circuits (Continued) ICL3222 +3.3V C1 0.1µF C2 0.1µF + 0.1µF 2 + 4 5 + 6 17 C1+ VCC C1C2+ TTL/CMOS LOGIC LEVELS + T1 15 T2 11 T2IN C4 0.1µF T1OUT 8 T2OUT 14 13 R1OUT + C3 0.1µF 7 V- C2- 12 T1IN 3 V+ R1IN RS-232 LEVELS 5kΩ R1 9 10 R2OUT R2IN 5kΩ R2 1 EN SHDN 18 VCC GND 16 ICL3223 +3.3V C1 0.1µF C2 0.1µF T1IN T2IN TTL/CMOS LOGIC LEVELS R1OUT R2OUT + 0.1µF 2 + 4 5 + 6 C1+ 19 VCC C1C2+ C2- 3 + C3 0.1µF V- 7 C4 0.1µF + V+ T1 13 17 T2 12 8 15 16 R1 5kΩ R2 5kΩ 10 1 9 EN FORCEOFF 14 INVALID FORCEON GND 18 3-5 20 11 T1OUT T2OUT R1IN RS-232 LEVELS R2IN VCC TO POWER CONTROL LOGIC ICL3221 thru ICL3243 Typical Operating Circuits (Continued) ICL3232 +3.3V C1 0.1µF C2 0.1µF T1IN T2IN TTL/CMOS LOGIC LEVELS R1OUT + 0.1µF 1 + 3 4 + 5 11 10 C1+ 16 VCC V+ C1C2+ V- C2T1 + C3 0.1µF 6 C4 0.1µF + 14 T2 T1OUT 7 T2OUT 13 12 R1 R1IN 5kΩ 9 8 R2OUT R2 5kΩ GND 15 3-6 2 R2IN RS-232 LEVELS ICL3221 thru ICL3243 Typical Operating Circuits (Continued) ICL3241 +3.3V C1 0.1µF C2 0.1µF T1IN + 0.1µF 28 C1+ + 24 C11 C2+ + 2 C2- 26 VCC V+ V- 14 T1 13 T2 27 + C3 0.1µF 3 C4 0.1µF + 9 T1OUT 10 T2IN T2OUT T3 12 RS-232 LEVELS 11 T3IN T3OUT 21 R1OUTB 20 R2OUTB 19 TTL/CMOS LOGIC LEVELS 4 R1OUT R1IN R1 5kΩ 18 5 R2OUT R2IN 5kΩ R2 17 6 R3OUT R3IN 5kΩ R3 16 7 R4OUT R4IN R4 5kΩ 15 8 R5OUT R5IN 23 VCC EN 5kΩ R5 22 SHDN GND 25 3-7 RS-232 LEVELS ICL3221 thru ICL3243 Typical Operating Circuits (Continued) ICL3243 +3.3V + 0.1µF 28 C1 0.1µF + C2 0.1µF C11 C2+ + 2 C2- 26 C1+ VCC 24 27 VT1 14 + V+ 3 C3 0.1µF C4 0.1µF + 9 T1IN T1OUT T2 13 10 T2IN T2OUT T3 12 RS-232 LEVELS 11 T3IN T3OUT 20 R2OUTB TTL/CMOS LOGIC LEVELS 19 4 R1OUT R1IN R1 5kΩ 18 5 R2OUT R2IN R2 5kΩ 17 6 R3OUT R3IN R3 5kΩ 16 7 R4OUT R4IN R4 5kΩ 15 8 R5OUT R5IN 5kΩ R5 23 FORCEON VCC TO POWER CONTROL LOGIC 22 FORCEOFF 21 INVALID GND 25 3-8 RS-232 LEVELS ICL3221 thru ICL3243 Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON, EN, SHDN . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Resistance (Typical, Note 2) θJA (oC/W) 16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 90 18 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 80 20 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 77 16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 100 18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135 20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 122 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145 20 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 140 28 Ld SSOP and TSSOP Packages . . . . . . . . . . . . 100 Moisture Sensitivity (see Technical Brief TB363) All Packages Not Listed Below. . . . . . . . . . . . . . . . . . . . . . Level 1 20 Ld TSSOP and 16 Ld SSOP and TSSOP Packages . . Level 2 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC, SSOP, TSSOP - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25oC PARAMETER TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS 25 - 1.0 10 µA DC CHARACTERISTICS Supply Current, Automatic Powerdown All RIN Open, FORCEON = GND, FORCEOFF = VCC (ICL3221, ICL3223, ICL3243 Only) Supply Current, Powerdown FORCEOFF = SHDN = GND (Except ICL3232) 25 - 1.0 10 µA Supply Current, Automatic Powerdown Disabled All Outputs Unloaded, FORCEON = FORCEOFF = SHDN = VCC VCC = 3.3V, ICL3221-32 25 - 0.3 1.0 mA VCC = 3.0V, ICL3241-43 25 - 0.3 1.0 mA LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low TIN, FORCEON, FORCEOFF, EN, SHDN Full - - 0.8 V Input Logic Threshold High TIN, FORCEON, FORCEOFF, EN, SHDN VCC = 3.3V Full 2.0 - - V VCC = 5.0V Full 2.4 - - V Input Leakage Current TIN, FORCEON, FORCEOFF, EN, SHDN Full - ±0.01 ±1.0 µA Output Leakage Current (Except ICL3232) FORCEOFF = GND or EN = VCC Full - ±0.05 ±10 µA Output Voltage Low IOUT = 1.6mA Full - - 0.4 V Output Voltage High IOUT = -1.0mA Full - V VCC -0.6 VCC -0.1 AUTOMATIC POWERDOWN (ICL3221, ICL3223, ICL3243 Only, FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to Enable Transmitters ICL32XX Powers Up (See Figure 6) Full -2.7 - 2.7 V Receiver Input Thresholds to Disable Transmitters ICL32XX Powers Down (See Figure 6) Full -0.3 - 0.3 V INVALID Output Voltage Low IOUT = 1.6mA Full - - 0.4 V INVALID Output Voltage High IOUT = -1.0mA Full VCC-0.6 - - V 25 - 100 - µs Receiver Threshold to Transmitters Enabled Delay (tWU) 3-9 ICL3221 thru ICL3243 Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25oC (Continued) TEMP (oC) MIN TYP MAX UNITS Receiver Positive or Negative Threshold to INVALID High Delay (tINVH) 25 - 1 - µs Receiver Positive or Negative Threshold to INVALID Low Delay (tINVL) 25 - 30 - µs Full -25 - 25 V VCC = 3.3V 25 0.6 1.2 - V VCC = 5.0V 25 0.8 1.5 - V VCC = 3.3V 25 - 1.5 2.4 V VCC = 5.0V 25 - 1.8 2.4 V PARAMETER TEST CONDITIONS RECEIVER INPUTS Input Voltage Range Input Threshold Low Input Threshold High Input Hysteresis 25 - 0.3 - V Input Resistance 25 3 5 7 kΩ TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω Full - ±35 ±60 mA Full - - ±25 µA T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3kΩ to GND, T1OUT and T2OUT Loaded with 2.5mA Each Full ±5 - - V Maximum Data Rate (Note 3) RL = 3kΩ, CL = 1000pF, One Transmitter Switching Full 120 500 - kbps Receiver Propagation Delay Receiver Input to Receiver Output, CL = 150pF tPHL 25 - 0.3 - µs tPLH 25 - 0.3 - µs Output Short-Circuit Current VOUT = ±12V, VCC = 0V or 3V to 5.5V Automatic Powerdown or FORCEOFF = SHDN = GND Output Leakage Current (Except ICL3232) MOUSE DRIVEABILITY (ICL324X Only) Transmitter Output Voltage (See Figure 9) TIMING CHARACTERISTICS Receiver Output Enable Time Normal Operation (Except ICL3232) 25 - 200 - ns Receiver Output Disable Time Normal Operation (Except ICL3232) 25 - 200 - ns Transmitter Skew tPHL - tPLH Full - 200 1000 ns Receiver Skew tPHL - tPLH Full - 100 500 ns Transition Region Slew Rate VCC = 3.3V, RL = 3kΩ to 7kΩ, Measured From 3V to -3V or -3V to 3V CL = 200pF to 2500pF 25 4 8.0 30 V/µs CL = 200pF to 1000pF 25 6 - 30 V/µs Human Body Model ICL3221 - ICL3243 25 - >±8 - kV IEC1000-4-2 Contact Discharge ICL3221 - ICL3243 25 - ±8 - kV IEC1000-4-2 Air Gap Discharge ICL3221 - ICL3232 25 - ±8 - kV ICL3241 - ICL3243 25 - ±6 - kV ICL3221 - ICL3243 25 - ±2.5 - kV ESD PERFORMANCE RS-232 Pins (TOUT, RIN) All Other Pins Human Body Model NOTE: 3. All the ICL32XX devices are guaranteed to operate at a minimum data rate of 250kbps. The specification table lists a minimum of 120kbps to maintain complete compatibility with competitor data sheets. 3-10 ICL3221 thru ICL3243 Detailed Description ICL32XX interface ICs operate from a single +3V to +5.5V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1µF capacitors, feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Charge-Pump Intersil’s new ICL32XX family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions at VCC = 3.3V. See the “Capacitor Selection” section, and Table 3 for capacitor recommendations for other operating conditions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings. Transmitters The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip ±5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. Except for the ICL3232, all transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to ±12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter easily operates at 900kbps. Transmitter inputs float if left unconnected, and may cause ICC increases. Connect unused inputs to GND for the best performance. Receivers All the ICL32XX devices contain standard inverting receivers that tristate (except for the ICL3232) via the EN or FORCEOFF control lines. Additionally, the two ICL324X products include noninverting (monitor) receivers (denoted by the ROUTB label) that are always active, regardless of the state of any control lines. All the receivers convert RS-232 signals to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to 7kΩ input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. 3-11 The ICL3221/22/23/41 inverting receivers disable only when EN is driven high. ICL3243 receivers disable during forced (manual) powerdown, but not during automatic powerdown (see Table 2). ICL324X monitor receivers remain active even during manual powerdown and forced receiver disable, making them extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral’s protection diodes (see Figures 2 and 3). This renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in Figure 3. VCC RXIN -25V ≤ VRIN ≤ +25V RXOUT 5kΩ GND ≤ VROUT ≤ VCC GND FIGURE 1. INVERTING RECEIVER CONNECTIONS Powerdown Functionality (Except ICL3232) This 3V family of RS-232 interface devices requires a nominal supply current of 0.3mA during normal operation (not in powerdown mode). This is considerably less than the 5mA to 11mA current required of 5V RS-232 devices. The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter outputs tristate. Inverting receiver outputs may or may not disable in powerdown; refer to Table 2 for details. This micro-power mode makes these devices ideal for battery powered and portable applications. Software Controlled (Manual) Powerdown Most devices in the ICL32XX family provide pins that allow the user to force the IC into the low power, standby state. On the ICL3222 and ICL3241, the powerdown control is via a simple shutdown (SHDN) pin. Driving this pin high enables normal operation, while driving it low forces the IC into it’s powerdown state. Connect SHDN to VCC if the powerdown function isn’t needed. Note that all the receiver outputs remain enabled during shutdown (see Table 2). For the lowest power consumption during powerdown, the receivers should also be disabled by driving the EN input high (see next section, and Figures 2 and 3). The ICL3221, ICL3223, and ICL3243 utilize a two pin approach where the FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high. To switch between active and powerdown modes, under logic or software control, only the FORCEOFF input need be driven. ICL3221 thru ICL3243 The FORCEON state isn’t critical, as FORCEOFF dominates over FORCEON. Nevertheless, if strictly manual control over powerdown is desired, the user must strap FORCEON high to disable the automatic powerdown circuitry. Inverting (standard) receiver outputs also disable when the device is in powerdown, thereby eliminating the possible current path through a shutdown peripheral’s input protection diode (see Figures 2 and 3). The INVALID output always indicates whether or not a valid RS-232 signal is present at any of the receiver inputs (see Table 2), giving the user an easy way to determine when the interface block should power down. In the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be used to indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to GND (as in the case of a powered down driver). Connecting FORCEOFF and FORCEON together disables the automatic powerdown feature, enabling them to function as a manual SHUTDOWN input (see Figure 4). TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE RS-232 SIGNAL PRESENT AT RECEIVER INPUT? FORCEOFF (NOTE 4) OR SHDN FORCEON EN TRANSMITTER RECEIVER ROUTB INVALID INPUT INPUT INPUT OUTPUTS OUTPUTS OUTPUTS OUTPUT MODE OF OPERATION ICL3222, ICL3241 N.A. L N.A. L High-Z Active Active N.A. Manual Powerdown N.A. L N.A. H High-Z High-Z Active N.A. Manual Powerdown w/Rcvr. Disabled N.A. H N.A. L Active Active Active N.A. Normal Operation N.A. H N.A. H Active High-Z Active N.A. Normal Operation w/Rcvr. Disabled NO H H L Active Active N.A. L NO H H H Active High-Z N.A. L YES H L L Active Active N.A. H YES H L H Active High-Z N.A. H NO H L L High-Z Active N.A. L NO H L H High-Z High-Z N.A. L YES L X L High-Z Active N.A. H Manual Powerdown YES L X H High-Z High-Z N.A. H Manual Powerdown w/Rcvr. Disabled NO L X L High-Z Active N.A. L Manual Powerdown NO L X H High-Z High-Z N.A. L Manual Powerdown w/Rcvr. Disabled NO H H N.A. Active Active Active L Normal Operation (Auto Powerdown Disabled) YES H L N.A. Active Active Active H Normal Operation (Auto Powerdown Enabled) NO H L N.A. High-Z Active Active L Powerdown Due to Auto Powerdown Logic YES L X N.A. High-Z High-Z Active H Manual Powerdown NO L X N.A. High-Z High-Z Active L Manual Powerdown ICL3221, ICL3223 Normal Operation (Auto Powerdown Disabled) Normal Operation (Auto Powerdown Enabled) Powerdown Due to Auto Powerdown Logic ICL3243 NOTE: 4. Applies only to the ICL3241 and ICL3243. 3-12 ICL3221 thru ICL3243 VCC With any of the above control schemes, the time required to exit powerdown, and resume transmission is only 100µs. A mouse, or other application, may need more time to wake up from shutdown. If automatic powerdown is being utilized, the RS-232 device will reenter powerdown if valid receiver levels aren’t reestablished within 30µs of the ICL32XX powering up. Figure 5 illustrates a circuit that keeps the ICL32XX from initiating automatic powerdown for 100ms after powering up. This gives the slow-to-wake peripheral circuit time to reestablish valid RS-232 output levels. VCC CURRENT FLOW VCC VOUT = VCC Rx POWERED DOWN UART Tx OLD RS-232 CHIP SHDN = GND GND POWER MANAGEMENT UNIT FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL 1MΩ FORCEON ICL3221/23/43 FIGURE 5. CIRCUIT TO PREVENT AUTO POWERDOWN FOR 100ms AFTER FORCED POWERUP TRANSITION DETECTOR TO WAKE-UP LOGIC ICL324X Automatic Powerdown (ICL3221/23/43 Only) VCC R2OUTB POWERED DOWN UART 0.1µF FORCEOFF VCC RX MASTER POWERDOWN LINE VOUT = HI-Z R2OUT TX R2IN T1IN T1OUT FORCEOFF = GND OR SHDN = GND, EN = VCC FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN Even greater power savings is available by using the devices which feature an automatic powerdown function. When no valid RS-232 voltages (see Figure 6) are sensed on any receiver input for 30µs, the charge pump and transmitters powerdown, thereby reducing supply current to 1µA. Invalid receiver levels occur whenever the driving peripheral’s outputs are shut off (powered down) or when the RS-232 interface cable is disconnected. The ICL32XX powers back up whenever it detects a valid RS-232 voltage level on any receiver input. This automatic powerdown feature provides additional system power savings without changes to the existing operating system. FORCEOFF VALID RS-232 LEVEL - ICL32XX IS ACTIVE 2.7V PWR MGT LOGIC FORCEON INDETERMINATE - POWERDOWN MAY OR MAY NOT OCCUR INVALID ICL3221/23/43 0.3V INVALID LEVEL - POWERDOWN OCCURS AFTER 30µs -0.3V INDETERMINATE - POWERDOWN MAY OR MAY NOT OCCUR I/O UART -2.7V CPU VALID RS-232 LEVEL - ICL32XX IS ACTIVE FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN WHEN NO VALID RECEIVER SIGNALS ARE PRESENT 3-13 Automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying FORCEON high disables automatic powerdown, but manual powerdown is always available via the overriding FORCEOFF input. Table 2 summarizes the automatic powerdown functionality. ICL3221 thru ICL3243 Devices with the automatic powerdown feature include an INVALID output signal, which switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 30µs (see Figure 7). INVALID switches high 1µs after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. When automatic powerdown is utilized, INVALID = 0 indicates that the ICL32XX is in powerdown mode. INVALID } REGION RECEIVER INPUTS TRANSMITTER OUTPUTS INVALID OUTPUT VCC usually rises at low temperatures and it influences the amount of ripple on V+ and V-. TABLE 3. REQUIRED CAPACITOR VALUES VCC (V) C1 (µF) C2, C3, C4 (µF) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.1 0.47 Power Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. tINVH tINVL 0 AUTOPWDN PWR UP V+ VCC 0 V- FIGURE 7. AUTOMATIC POWERDOWN AND INVALID TIMING DIAGRAMS The time to recover from automatic powerdown mode is typically 100µs. Transmitter Outputs when Exiting Powerdown Figure 8 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note that the transmitters enable only when the magnitude of the supplies exceed approximately 3V. 5V/DIV FORCEOFF T1 Receiver ENABLE Control (ICL3221/22/23/41 Only) Several devices also feature an EN input to control the receiver outputs. Driving EN high disables all the inverting (standard) receiver outputs placing them in a high impedance state. This is useful to eliminate supply current, due to a receiver output forward biasing the protection diode, when driving the input of a powered down (VCC = GND) peripheral (see Figure 2). The enable input has no effect on transmitter nor monitor (ROUTB) outputs. Capacitor Selection The charge pumps require 0.1µF capacitors for 3.3V operation. For other supply voltages refer to Table 3 for capacitor values. Do not use values smaller than those listed in Table 3. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1’s value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors). When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) 3-14 2V/DIV T2 VCC = +3.3V C1 - C4 = 0.1µF TIME (20µs/DIV.) FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN Mouse Driveability The ICL324X have been specifically designed to power a serial mouse while operating from low voltage supplies. Figure 9 shows the transmitter output voltages under increasing load current. The on-chip switching regulator ensures the transmitters will supply at least ±5V during worst case conditions (15mA for paralleled V+ transmitters, 7.3mA for single V- transmitter). The Automatic Powerdown feature does not work with a mouse, so FORCEOFF and FORCEON should be connected to VCC. ICL3221 thru ICL3243 5V/DIV. TRANSMITTER OUTPUT VOLTAGE (V) 6 5 T1IN VOUT+ 4 3 VCC = 3.0V 2 1 T1 T1OUT 0 VOUT+ -1 T2 -2 ICL3241/43 -3 VCC -4 VOUT - T3 R1OUT VOUT - VCC = +3.3V C1 - C4 = 0.1µF -5 -6 1 0 3 2 5 4 7 6 8 9 10 5µs/DIV. LOAD CURRENT PER TRANSMITTER (mA) FIGURE 11. LOOPBACK TEST AT 120kbps FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD CURRENT (PER TRANSMITTER, i.e., DOUBLE CURRENT AXIS FOR TOTAL VOUT+ CURRENT) High Data Rates T1IN The ICL32XX maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 10 details a transmitter loopback test circuit, and Figure 11 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 12 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitters were also loaded with an RS-232 receiver. VCC 5V/DIV. T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF 2µs/DIV. + 0.1µF FIGURE 12. LOOPBACK TEST AT 250kbps + C1+ VCC V+ C1 C1- + C3 Interconnection with 3V and 5V Logic C4 + The ICL32XX directly interface with most 5V logic families, including ACT and HCT CMOS. See Table 4 for more information on possible combinations of interconnections. ICL32XX + V- C2+ C2 C2TIN RIN ROUT EN VCC TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES TOUT 1000pF 5k SHDN OR FORCEOFF FIGURE 10. TRANSMITTER LOOPBACK TEST CIRCUIT 3-15 SYSTEM POWER-SUPPLY VOLTAGE (V) VCC SUPPLY VOLTAGE (V) 3.3 3.3 5 5 5 3.3 COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. Incompatible with AC, HC, or CD4000 CMOS. ICL3221 thru ICL3243 Typical Performance Curves VCC = 3.3V, TA = 25oC 25 5.0 VOUT+ 20 SLEW RATE (V/µs) TRANSMITTER OUTPUT VOLTAGE (V) 7.5 2.5 1 TRANSMITTER AT 235kbps 1 OR 2 TRANSMITTERS AT 30kbps 0 -2.5 15 -SLEW +SLEW 10 VOUT -5.0 -7.5 0 1000 2000 3000 4000 5 5000 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) LOAD CAPACITANCE (pF) FIGURE 13. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE FIGURE 14. SLEW RATE vs LOAD CAPACITANCE 45 45 ICL324X ICL3221 - ICL3232 235kbps 40 40 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 235kbps 35 30 25 120kbps 20 15 20kbps 10 35 30 120kbps 25 20 20kbps 15 10 5 5 0 0 0 1000 2000 3000 4000 0 5000 4000 5000 FIGURE 16. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA 3.5 NO LOAD ALL OUTPUTS STATIC 3.0 ICL3221 - ICL3232 2.5 2.0 1.5 1.0 ICL324X 0.5 ICL324X 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE 3-16 3000 LOAD CAPACITANCE (pF) FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA SUPPLY CURRENT (mA) 2000 1000 LOAD CAPACITANCE (pF) 6.0 ICL3221 thru ICL3243 Die Characteristics DIE DIMENSIONS: PASSIVATION: ICL3221/22/23/32: 100 mils x 100 mils (2540µm x 2540µm) ICL3241/43: 100 mils x 127 mils (2550µm x 3230µm) METALLIZATION: Type: Metal 1: AISi(1%) Thickness: Metal 1: 8kÅ Type: Metal 2: AISi (1%) Thickness: Metal 2: 10kÅ SUBSTRATE POTENTIAL (POWERED UP): GND 3-17 Type: Silox Thickness: 13kÅ TRANSISTOR COUNT: ICL3221: 286 ICL3222: 338 ICL3223: 357 ICL3232: 296 ICL324X: 464 PROCESS: Si Gate CMOS