Datasheet

UNISONIC TECHNOLOGIES CO., LTD
NE555
LINEAR INTEGRATED CIRCUIT
SINGLE TIMER

DESCRIPTION
The UTC NE555 is a highly stable timer integrated circuit. It can
be operated in both Astable and Monostable mode. With monostable
operation, the time delay is precisely controlled by one external and
one capacitor. With a stable operation as an oscillator the frequency
and duty cycle are both accurately controlled with two external
resistors and one capacitor.

FEATURES
*High current driver capability (=200mA).
*Adjustable duty cycle.
*Timing from s to hours.
*Turn off time less than 2s.
*Operates in both astable and monostable modes.
■
ORDERING INFORMATION
Ordering Number
Lead Free
NE555L-D08-T
-

Halogen Free
NE555G-D08-T
NE555G-S08-R
Package
Packing
DIP-8
SOP-8
Tube
Tape Reel
MARKING
DIP-8
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SOP-8
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QW-R106-001.G
NE555
LINEAR INTEGRATED CIRCUIT

PIN CONFIGURATION

BLOCK DIAGRAM
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QW-R106-001.G
NE555

LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VCC
16
V
Power Dissipation
PD
600
mW
Junction Temperature
TJ
+125
°C
Operating Temperature
TOPR
-20 ~ +85
°C
Storage Temperature
TSTG
-40 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

ELECTRICAL CHARACTERISTICS (VCC=5 ~ 15V, TA=25°C, unless otherwise specified.)
PARAMETER
Supply Voltage
SYMBOL
VCC
Supply Current (Note 1)
Initial Accurary (Note 2)
Drift with Temperature
Drift with Supply Voltage
Monostable
Astable
Monostable
Astable
Monostable
Astable
ICC
VCC=5V, RL=
VCC=15V, RL=
ACCUR
RA=1k ~ 100kΩ
t/T
C=0.1F
VC
Threshold Voltage
VTH
Threshold Current (Note 3)
ITH
Trigger Voltage
VTR
Trigger Current
Reset Voltage
Reset Current
ITR
VRST
IRST
High Output Voltage
MIN
4.5
t/VCC
Control Voltage
Low Output Voltage
TEST CONDITIONS
VOL
VOH
VCC=15V
VCC=5V
VCC=15V
VCC=5V
9.0
2.6
VCC=5V
VCC=15V
VTR=0
1.1
4.5
0.4
VCC=15V
ISINK=10mA
ISINK=50mA
VCC=5V
ISINK=5mA
VCC=15V
ISOURCE=200mA
ISOURCE=100mA
VCC=5V, ISOURCE=100mA
12.75
2.75
TYP
3
7.5
1.0
2.25
50
150
0.1
0.3
10.0
3.33
10.0
3.33
0.1
1.67
5
0.01
0.7
0.1
MAX
16
6
15
3.0
UNIT
V
mA
mA
%
%
ppm/C
ppm/C
0.25
2.2
5.6
2.0
1.0
0.4
%/V
%/V
V
V
V
V
μA
V
V
μA
V
mA
0.06
0.3
0.25
0.75
V
V
0.05
0.35
V
12.5
13.3
3.3
100
100
20
0.5
11.0
4.0
V
V
V
ns
ns
nA
Rise Time of Output
tR
Fall Time of Output
tF
Discharge Leakage Current
ILKG
100
Notes: 1.Supply current when output high typically 1mA less at VCC=5V.
2. Tested at VCC=5.0V and VCC=15V.
3. This will determine the maximum value of RA+RB for 15V operation, The maximum total is R=20MΩ, and
for 5V operation the maximum total is R=6.7MΩ.
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QW-R106-001.G
NE555

LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT
RB
RA
C1
Trigger
2
Threshold
Discharge
6
5
7
Q1
Lower
comparator
1
GND
R3
Upper
comparator
R2
R1
FLIP-FLOP
8
VCC
4
Reset
UTC NE555N
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NE555

LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION NOTES
The application circuit shows astable mode configuration.
Pin 6 (Threshold ) is tied to Pin 2 ( Trigger ) and Pin 4 ( reset ) is tied to VCC ( Pin 8 ). The external capacitor C1 of
Pin 6 and Pin 2 charges through RA, RB and dischages through RB only. In the internal circuit of UTC NE555N , one
input of the upper comparator is at voltage of 2/3VCC (R1=R2=R3),another input is connected to Pin 6.As soon as C1
is charging to higher than 2/3VCC, transistor Q1 is turned ON and discharge C1 to collector voltage of transistor Q1.
Therefore, the flip-flop circuit is reset and output is low. One input of lower comparator is at voltage of 1/3Vcc,
discharge transistor Q1 turn off and C1 charges through RA and RB. Therefore, the flip-flop circuit is set output high.
That is, when C1 charges through RA and RB, output is high and when C1 discharge through RB ,output is low.
The charge time(output is high) t1 is 0.693(RA+RB) C1 and the discharge time (output is low) T2 is 0.693 RB×C1.
VCC In
VCC -
1
3
2
3
VCC
= 0.693
VCC
T1=0.693×(RA+RB)×C1
Thus the total period time T is given by
T=T1+T2=0.693(RA+2RB)×C1.
T2=0.693×RB×C1
Then the frequency of astable mode is given by
f=
1
T
1.44
=
(RA + 2RB)×C1
The duty cycle is given by
D.C. 
T2
T
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
RB
RA  2RB .
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QW-R106-001.G
NE555
TYPICAL CHARACTERISTICS
Supply Current,ICC (mA)
Low-Level Output Voltage vs
Low-Level Output Current
10
7
4
VCC=5V
TA=-55℃
2
1
0.7
0.4
TA=25℃
TA=125℃
0.2
0.1
0.07
0.04
0.02
Low-Level Output Voltage vs
Low-Level Output Current
10
7
4
VCC=10V
2
TA=25℃
1
0.7
0.4
TA=-55℃
TA=125℃
0.2
0.1
0.07
0.04
0.02
0.01
0.01
1
Low-Level Output Voltage,VOL (V)
Low-Level Output Voltage,VOL (V)
Low-Level Output Voltage,VOL (V)
Voltage Drop,(VCC-VOH) (V)

LINEAR INTEGRATED CIRCUIT
4
20
40 70 100
7 10
2
Low-Level Output Current,IOL (mA)
1
2
4
20
7 10
40 70 100
Low-Level Output Current,IOL (mA)
Low-Level Output Voltage vs
Low-Level Output Current
10
7
4
VCC=15V
TA=-55℃
2
1
0.7
0.4
TA=25℃
0.2
TA=125℃
0.1
0.07
0.04
0.02
0.01
1
2
4
7 10
20
40 70 100
Low-Level Output Current,IOL (mA)
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QW-R106-001.G
NE555
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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QW-R106-001.G
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