Datasheet

UNISONIC TECHNOLOGIES CO., LTD
U74AHC377
CMOS IC
OCTAL D-TYPE FLIP-FLOPS
WITH DATA ENABLE
POSITIVE-EDGE TRIGGER

DESCRIPTION
The U74AHC377 is a high-speed Si-gate CMOS device and
is compatible with low-power Schottky TTL (LSTTL).
The U74AHC377 has eight edge-triggered, D-type flip-flops
with individual D inputs and Q outputs. A common clock input
(CLK) loads all flip-flops simultaneously when the data enable
input ( EN ) is LOW. The state of each D input, one set-up time
before the LOW-to-HIGH clock transition, is transferred to the
corresponding output (Qn) of the flip-flop. The EN input is only
required to be stable one set-up time prior to the LOW-to-HIGH
transition for predictable operation.

FEATURES
* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Inputs accept voltages higher than Vcc
* Ideal for addressable register applications
* Data enable for address and data synchronization
* Eight positive-edge triggered D-type flip-flops

ORDERING INFORMATION
Ordering Number
U74AHC377G-R20-T
U74AHC377G-P20-R

Package
SSOP-20
TSSOP-20
Packing
Tube
Tape Reel
MARKING
www.unisonic.com.tw
Copyright © 2015 Unisonic Technologies Co., Ltd
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U74AHC377
CMOS IC

PIN CONFIGURATION

PIN DESCRIPTION

SYMBOL
PIN
EN
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
CLK
5Q
5D
6D
6Q
7D
7Q
8D
8Q
VCC
1
Data Enable Input (Active low)
DESCRIPTION
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Flip-flop Output
Data Input
Data Input
Flip-flop Output
Flip-flop Output
Data Input
Data Input
Flip-flop Output
Ground (0V)
Clock Input (Low-to-High, Edge Triggered)
Flip-flop Output
Data Input
Data Input
Flip-Flop Output
Flip-Flop Output
Data Input
Data Input
Flip-Flop Output
Supply Voltage
FUNCTION TABLE
INPUTS
EN
H
L
L
X
CLK
D
X
↑
↑
L
X
H
L
X
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OUTPUT Q
Q0
H
L
Q0
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
FUNCTIONAL DIAGRAM

LOGIC SYMBOL
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CMOS IC
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U74AHC377

CMOS IC
LOGIC DIAGRAM (POSITIVE LOGIC)
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
CMOS IC
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Supply Voltage
VCC
-0.5
7
V
Input Voltage
VI
-0.5
7
V
VCC or GND Current
ICC
-75
+75
mA
Output Current
IOUT
VO=-0.5V to (VCC+0.5V)
-25
+25
mA
Input Clamp Current
IIK
VI<-0.5V
-20
mA
Output Clamp Current
IOK
VO<-0.5V or VO> VCC+0.5V
-20
+20
mA
Storage Temperature
TSTG
-65
+150
°C
Note: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Input Voltage
Output Voltage
SYMBOL
VCC
VIN
VOUT
Input Transition Rise and Fall Rate
Ambient Temperature

MIN
2
0
0
TYP
5
VCC=3V ~ 3.6V
VCC=4.5V ~ 5.5V
-40
TA
+25
MAX
5.5
5.5
VCC
100
20
+85
UNIT
V
V
V
ns/V
°C
THERMAL DATA
PARAMETER
Junction to Ambient

∆t/∆v
TEST CONDITIONS
SYMBOL
SOP-20
TSSOP-20
RATINGS
58
83
θJA
UNIT
°С/W
ELECTRICAL CHARACTERISTICS (TA =25°C, unless otherwise specified)
PARAMETER
SYMBOL
High-level Input Voltage
VIH
Low-level Input Voltage
VIL
Output Voltage High-Level
Output Voltage Low-Level
Input Leakage Current
VOH
VOL
II(LEAK)
Quiescent Supply Current
ICC
Input Capacitance
CI
TEST CONDITIONS
VCC=2V
VCC=3V
VCC=5.5V
VCC=2V
VCC=3V
VCC=5.5V
VCC=2V, IOH=-50μA
VCC=3V, IOH=-50μA
VCC=4.5V, IOH=-50μA
VCC=3V, IOH=-4mA
VCC=4.5V, IOH=-8mA
VCC=2V, IOH=50μA
VCC=3V, IOH=50μA
VCC=4.5V, IOH=50μA
VCC=3V, IOH=4mA
VCC=4.5V, IOH=8mA
VCC=0V to 5.5V, VIN= 5.5V or
GND
VCC=5.5V, VIN=VCC or GND,
IOUT=0
VI=Vcc or GND
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MIN
1.5
2.1
3.85
TYP
MAX
V
0.5
0.9
1.65
1.9
2.9
4.4
2.58
3.94
UNIT
2
3
4.5
0
0
0
3
V
V
0.1
0.1
0.1
0.36
0.36
V
0.1
μA
4
μA
10
pF
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CMOS IC
DYNAMIC CHARACTERISTICS (tr = tf ≤3ns, ground=0V, TA =25°C, unless otherwise specified)
PARAMETER
maximum frequency
SYMBOL
fMAX
propagation delay, From CP to Qn
tPD
pulse width CP, From HIGH or LOW
tW
set-up time Dn, From EN to CP
tSU
hold time Dn, From EN to CP
tH

CONDITIONS
VCC=3V to 3.6V, CL=15pF
VCC=3V to 3.6V, CL=50pF
VCC=4.5V to 5.5V, CL=15pF
VCC =4.5V to 5.5V, CL=50pF
VCC=3V to 3.6V, CL=15pF
VCC=3V to 3.6V, CL=50pF
VCC=4.5V to 5.5V, CL=15pF
VCC=4.5V to 5.5V, CL=50pF
VCC=3V to 3.6V
VCC=4.5V to 5.5V
VCC=3V to 3.6V
VCC=4.5V to 5.5V
VCC=3V to 3.6V
VCC=4.5V to 5.5V
MIN
80
50
125
85
TYP
125
75
175
120
5.6
8
3.9
5.6
MAX
UNIT
ns
12.8
16
9
10.5
5
5
5
4.5
1.5
2
ns
ns
ns
ns
OPERATING CHARACTERISTICS (TA =25°C , unless otherwise specified)
PARAMETER
Power Dissipation Capacitance
Note: tPLH and tPHL are the same as tPD.
SYMBOL
TEST CONDITIONS
CPD
f=1MHz; VI=GND to VCC
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MIN
TYP
20
MAX
UNIT
pF
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
CMOS IC
TEST CIRCUIT AND WAVEFORMS
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CMOS IC
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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