Data Sheet

TEF6730A
Front-end for digital-IF car radio
Rev. 01 — 21 February 2007
Product data sheet
1. General description
The TEF6730A is a car radio tuner front-end for digital-IF reception, especially designed
for co-operation with digital-IF DSP back-ends of the SAF773x and SAF778x families.
The FM tuner features single conversion to IF = 10.7 MHz and integrated image rejection;
capable for FM 65 MHz to 108 MHz and weather band reception. The AM tuner features
single conversion to IF = 10.7 MHz with an integrated AM front-end, capable for LW, MW
and full SW reception. A combined AM/FM IF AGC amplifier provides a suitable IF signal
to the ADC in IF DSP.
The device can be controlled via the fast-mode I2C-bus (400 kHz) and includes
autonomous tuning functions for easy control. No manual alignments are required.
2. Features
n FM mixer for conversion of FM RF to IF 10.7 MHz with large dynamic range, high
image rejection and selectable mixer gain
n Selectable high or low injection of LO
n AGC PIN diode drive circuit for FM RF AGC with detection at RF and IF, including
keyed AGC function
n RF input for weather band applications
n Integrated AM front-end LNA
n Integrated AM RF AGC for low desensitization and AGC PIN diode drive circuit with
detection at RF and IF
n AM mixer for conversion of AM RF to IF 10.7 MHz
n AM/FM IF AGC amplifier with large dynamic range, gain controlled from IF DSP
n AM and FM front-end AGC information is available via the I2C-bus
n Low phase noise local oscillator with reliable start-up behavior
n In-lock detection for optimized adaptive PLL tuning speed
n Programmable divider and mixer dividers for reception of FM (65 MHz to 108 MHz),
weather band, AM LW, MW and full SW
n Two antenna DAAs
n Sequential state machine supporting all tuning actions including AFU for RDS
n Interfacing signals for IF AGC, FM keyed AGC, AFU and reference frequency to
IF DSP for optimum system performance
n Software controlled flag outputs
n Selection of four I2C-bus addresses
n Qualified in accordance with AEC-Q100
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
3. Quick reference data
Table 1.
Quick reference data
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),
VCC(IF), FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and AMMIXOUT2
8
8.5
9
V
-
85.3
-
mA
-
114.7
-
mA
0.1
-
2
0.7
-
1.35
-
100
-
kHz
[3]
-
-
130
MHz
[3]
-
-
159.9
MHz
[3]
256
-
-
MHz
Supply voltage
VCCA
analog supply voltage
Current in FM mode
ICC(tot)
total supply current
Current in AM mode
ICC(tot)
total supply current
Antenna Digital Auto Alignment (DAA)
DAA1: pin DAAOUT1[1]
Gconv(DAA) DAA conversion gain
DAA2: pin
DAAOUT2[2]
Gconv(DAA) DAA conversion gain
Reference frequency
External reference frequency, circuit inputs: pins FREF1 and FREF2
fext
external frequency
Tuning system; see Table 28, Table 29, Table 30 and Table 31
Voltage controlled oscillator
fVCO(min)
minimum VCO frequency
application according to Figure 25
fVCO(max)
maximum VCO frequency
C/N
carrier-to-noise ratio
fVCO = 200 MHz; ∆f = 10 kHz; Q = 30
94
98
-
dBc/√Hz
tuning time
Europe FM and US FM band;
fref = 100 kHz; fRF = 87.5 MHz to
108 MHz
-
0.75
1
ms
AM MW band; fref = 20 kHz;
fRF = 0.53 MHz to 1.7 MHz
-
-
10
ms
cycle time for inaudible AF update
including 1 ms mute start and 1 ms mute
release time
-
6
6.5
ms
LW
144
-
288
kHz
Timings
ttune
tupd(AF)
AF update time
AM overall system parameters[4]
fi(RF)
RF input frequency
fIF
IF frequency
Vsens
sensitivity voltage
MW
522
-
1710
kHz
SW
2.3
-
26.1
MHz
-
10.7
-
MHz
-
50
-
µV
(S+N)/N = 26 dB
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
2 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 1.
Quick reference data …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Vi(RF)
RF input voltage
start level of wideband AGC
Vi(RF)M
peak RF input voltage
Min
Typ
Max
Unit
data byte AGC bits WBAGC[1:0] = 00
-
125
-
mV
data byte AGC bits WBAGC[1:0] = 01
-
100
-
mV
data byte AGC bits WBAGC[1:0] = 10
-
75
-
mV
data byte AGC bits WBAGC[1:0] = 11
-
35
-
mV
data byte AGC bits NBAGC[1:0] = 00
-
200
-
mV
data byte AGC bits NBAGC[1:0] = 01
-
170
-
mV
data byte AGC bits NBAGC[1:0] = 10
-
140
-
mV
data byte AGC bits NBAGC[1:0] = 11
-
115
-
mV
-
152
-
dBµV
∆f = 40 kHz
-
130
-
dBµV
∆f = 100 kHz
-
133
-
dBµV
-
40
-
dB
MHz
start level of narrow-band AGC; m = 0
IP2
second-order intercept point referenced to receiver input
IP3
third-order intercept point
αripple
ripple rejection
referenced to receiver input
VCC(ripple) / Vaudio; fripple = 100 Hz;
VCC(ripple) = 10 mV (RMS);
Vi(RF) = 1 mV to 1 V
FM overall system parameters[5]
fi(RF)
RF input frequency
fIF
IF frequency
Vsens
sensitivity voltage
Vi(RF)
Vi(RF)M
RF input voltage
peak RF input voltage
FM standard
65
-
108
weather band
162.4
-
162.55 MHz
-
10.7
-
MHz
BIF = 170 kHz
-
2
-
µV
threshold extension enabled; weak signal
handling enabled (SAF7730 N231)
-
1.1
-
µV
data byte AGC bits WBAGC[1:0] = 00
-
19
-
mV
data byte AGC bits WBAGC[1:0] = 01
-
14
-
mV
data byte AGC bits WBAGC[1:0] = 10
-
10
-
mV
data byte AGC bits WBAGC[1:0] = 11
-
7
-
mV
data byte AGC bits NBAGC[1:0] = 00
-
17
-
mV
data byte AGC bits NBAGC[1:0] = 01
-
14
-
mV
data byte AGC bits NBAGC[1:0] = 10
-
11
-
mV
data byte AGC bits NBAGC[1:0] = 11
-
9
-
mV
start level of wideband AGC
start level of narrow-band AGC; m = 0
IP3
third-order intercept point
∆f = 400 kHz
-
123
-
dBµV
αripple
ripple rejection
VCC(ripple) / Vaudio; fripple = 100 Hz;
VCC(ripple) = 10 mV (RMS);
Vi(RF) = 500 µV
-
64
-
dB
-
-
-
[1]
Conversion gain formula of DAA1: V DAAOUT 1 =  1.915 × --------- + 0.1 × V tune where n = 0 to 127.


128
n
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
3 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
[2]
Conversion gain formula of DAA2: V DAAOUT 2 =  0.693 × ------ + 0.7 × V DAAOUT 1 where n = 0 to 15.


16
[3]
The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.
[4]
Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3
and nominal maximum IF AGC gain, unless otherwise specified.
[5]
Based on 75 Ω dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 µs, fi(RF) = 97.1 MHz, ∆f = 22.5 kHz,
nominal mixer gain and nominal maximum IF AGC gain, unless otherwise specified.
n
4. Ordering information
Table 2.
Ordering information
Type number
TEF6730AHW
Package
Name
Description
Version
HTQFP64
plastic thermal enhanced thin quad flat package; 64 leads;
body 10 x 10 x 1 mm; exposed die pad
SOT855-1
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
4 of 58
41
53
vco
pll
VTUNE
Rev. 01 — 21 February 2007
DAAOUT2
DAAOUT1
WXMIXDEC
WXMIXIN
55
56
57
45
i.c.
DGND
FGND
VCC
GND
VREF
54
vref
vco
52
16, 18, 48, 49
sup
sup
dig
fgnd
i.c.
REF
fref
BAND
÷M
pll in-lock
36
35
33
42
flag
39
PLL
÷N
CPOUT
FREF2
FREF1
VCC(VCO)
VCC(PLL)
OSCFDB
38
40
Φ
CTRL
antenna DAA
44
46
BUF
address
tuner
control
32
43
TUNING
STATE
MACHINE
47
write
I2C-BUS
29
28
50
TEF6730AHW
MIXER
51
read
90°
SWPORT
NXP Semiconductors
37
OSCTNK
5. Block diagram
TEF6730A_1
AFSAMPLE
AFHOLD
ADDR2
ADDR1
SDA
SCL
WX
27
26
MIXER
90°
FM
ifagc
ifagc
am/fm
rf agc
MIXER
30
AM LNA
AM RF
AGC
61
5 of 58
Fig 1. Block diagram of TEF6730AHW
IFAGCMSB
IFAGCLSB
ifagc
1
64
63
62
VCC(IF)
2
IFGND
3
IFAGCBIAS
4
AMIFAGCIN
5
IFAGCDEC
CFSW1
6
SWDEC
7
CFSW2
8
FMMIXOUT1
AMMIXOUT2
FMMIXOUT2
AMMIXOUT1
14 13 12 11 10 9
VCC(RF)
15
LNAIN
LNAOUT
LNAAGCDEC
20 19 17
AMMIXDEC
21
AMMIXIN
22
TAMAGC
23
PINAGCDEC
24
IAMAGC
RFGND
TFMAGC
© NXP B.V. 2007. All rights reserved.
KAGC
25
lna rf
IFOUT1
IFOUT2
008aaa057
TEF6730A
31
lna
AGCCNTRL
rf
34
60
V50LNA
FM RF
AGC
59
Front-end for digital-IF car radio
IFMAGC
58
IF AGC
FMIFAGCIN1
FMMIXIN2
FMMIXIN1
FMIFAGCIN2
Product data sheet
VCOGND
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
6. Pinning information
49 i.c.
50 SDA
51 SCL
52 DGND
53 FREF1
54 FREF2
55 VREF
57 VCC
56 GND
58 IFOUT1
59 IFOUT2
60 IFAGCMSB
62 VCC(IF)
61 IFAGCLSB
63 IFGND
64 IFAGCBIAS
6.1 Pinning
AMIFAGCIN
1
48 i.c.
FMIFAGCIN1
2
47 ADDR1
FMIFAGCIN2
3
46 ADDR2
IFAGCDEC
4
45 FGND
SWDEC
5
44 AFHOLD
CFSW1
6
43 AFSAMPLE
CFSW2
7
42 SWPORT
FMMIXOUT1
8
AMMIXOUT2
9
41 VCC(VCO)
40 OSCTNK
TEF6730AHW
FMMIXOUT2 10
39 OSCFDB
AMMIXOUT1 11
38 VCOGND
VCC(RF) 12
37 VCC(PLL)
36 CPOUT
V50LNA 13
LNAIN 14
35 VTUNE
AGCCNTRL 15
34 KAGC
i.c. 16
DAAOUT1 32
TFMAGC 31
IFMAGC 30
WXMIXDEC 29
WXMIXIN 28
FMMIXIN2 27
FMMIXIN1 26
RFGND 25
IAMAGC 24
PINAGCDEC 23
TAMAGC 22
AMMIXIN 21
AMMIXDEC 20
LNAAGCDEC 19
i.c. 18
LNAOUT 17
33 DAAOUT2
008aaa058
Fig 2. Pin configuration for HTQFP64
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
AMIFAGCIN
1
IF AGC amplifier AM input (10.7 MHz)
FMIFAGCIN1
2
IF AGC amplifier FM input 1 (10.7 MHz)
FMIFAGCIN2
3
IF AGC amplifier FM input 2 (10.7 MHz)
IFAGCDEC
4
IF AGC amplifier AM and FM decoupling
SWDEC
5
ceramic filter switch decoupling
CFSW1
6
ceramic filter switch 1
CFSW2
7
ceramic filter switch 2
FMMIXOUT1
8
FM mixer IF output 1 (10.7 MHz)
AMMIXOUT2
9
AM mixer IF output 2 (10.7 MHz)
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
6 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 3.
Pin description …continued
Symbol
Pin
Description
FMMIXOUT2
10
FM mixer IF output 2 (10.7 MHz)
AMMIXOUT1
11
AM mixer IF output 1 (10.7 MHz)
VCC(RF)
12
AM/FM RF supply voltage
V50LNA
13
AM LNA supply voltage decoupling
LNAIN
14
AM LNA input
AGCCNTRL
15
AM LNA AGC pin
i.c.
16
internally connected; leave open
LNAOUT
17
AM LNA output
i.c.
18
internally connected; leave open
LNAAGCDEC
19
AM LNA AGC decoupling
AMMIXDEC
20
AM mixer decoupling
AMMIXIN
21
AM mixer input
TAMAGC
22
AM RF AGC time constant
PINAGCDEC
23
AM PIN diode AGC decoupling
IAMAGC
24
AGC current for AM PIN diode
RFGND
25
RF ground
FMMIXIN1
26
FM mixer input 1
FMMIXIN2
27
FM mixer input 2
WXMIXIN
28
weather band mixer input
WXMIXDEC
29
weather band mixer decoupling
IFMAGC
30
AGC current for FM PIN diode
TFMAGC
31
FM RF AGC time constant
DAAOUT1
32
antenna DAA output 1
DAAOUT2
33
antenna DAA output 2
KAGC
34
level input for FM keyed AGC function
VTUNE
35
tuning voltage input antenna DAA
CPOUT
36
charge pump output
VCC(PLL)
37
tuning PLL supply voltage
VCOGND
38
VCO ground
OSCFDB
39
VCO feedback
OSCTNK
40
VCO tank circuit
VCC(VCO)
41
VCO supply voltage
SWPORT
42
software controllable port output
AFSAMPLE
43
AF sample flag output
AFHOLD
44
AF hold flag output and input
FGND
45
reference frequency ground
ADDR2
46
address select input 2
ADDR1
47
address select input 1
i.c.
48
internally connected; leave open
i.c.
49
internally connected; leave open
SDA
50
I2C-bus data line input and output
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
7 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 3.
Pin description …continued
Symbol
Pin
Description
SCL
51
I2C-bus clock line input
DGND
52
digital ground
FREF1
53
reference frequency input 1
FREF2
54
reference frequency input 2
VREF
55
reference voltage noise decoupling
GND
56
ground
VCC
57
supply voltage (8.5 V)
IFOUT1
58
IF AGC amplifier output 1
IFOUT2
59
IF AGC amplifier output 2
IFAGCMSB
60
MSB input for IF AGC amplifier gain setting
IFAGCLSB
61
LSB input for IF AGC amplifier gain setting
VCC(IF)
62
IF AGC amplifier supply voltage
IFGND
63
IF AGC amplifier ground
IFAGCBIAS
64
bias voltage decoupling for IF AGC amplifier
7. Functional description
7.1 FM mixer 1
The FM quadrature mixer converts FM RF (65 MHz to 108 MHz) to an IF frequency of
10.7 MHz. The FM mixer provides high image rejection, a large dynamic range and
selectable mixer gain. The image rejection can be selected between low injection of LO
and high injection of LO via the I2C-bus independently of the band selection. A separate
RF input for weather band is available.
7.2 FM RF AGC
AGC detection is at the FM front-end mixer input and the AM/FM IF AGC amplifier input,
both with programmable AGC thresholds. When the threshold is exceeded, the PIN diode
drive circuit sources a current to an external PIN diode circuit, keeping the RF signal level
constant.
Keyed AGC function is selectable via the I2C-bus and uses the in-band level information
from the IF DSP.
The AGC PIN diode drive circuit can optionally deliver a fixed current as a local function.
In AM mode, the AGC PIN diode drive circuit can be set to generate a fixed source current
into the external FM PIN diode circuitry.
7.3 Antenna DAA1 and DAA2
The antenna DAA1 measures the VCO tuning voltage and multiplies it with a factor
defined by the 7-bit DAA1 setting to generate a tuning voltage for the FM antenna tank
circuit. If a second FM tank circuit is applied, the tuning voltage can be derived from the
antenna DAA2 output. The antenna DAA2 measures the output voltage of the antenna
DAA1 and multiplies it with a factor defined by the 4-bit DAA2 setting.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
8 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
7.4 AM LNA
The AM low noise amplifier is fully integrated.
7.5 AM RF AGC
The AM RF AGC is partially integrated. Detection is at the output of the AM LNA and at
the input of the AM/FM IF AGC amplifier, both with programmable thresholds. First the
integrated AGC reduces the gain of the LNA. After the LNA AGC, the PIN diode AGC
takes over by sinking a current via an external PIN diode.
In FM mode, the AM AGC can be set to a fixed attenuation.
7.6 AM mixer
The large dynamic range AM mixer converts AM RF (144 kHz to 26.1 MHz) to an IF
frequency of 10.7 MHz.
7.7 VCO and dividers
The varactor tuned LC oscillator together with the dividers provides the LO signal for both
AM and FM front-end mixers. The VCO has an operating frequency of approximately
160 MHz to 256 MHz. In FM mode the LO frequency is divided by 2 or 3. These dividers
generate in-phase and quadrature-phase output signals used in the FM front-end mixer
for image rejection. In weather band mode the LO signal is directly phase shifted to
generate the in-phase and quadrature-phase signals. In AM mode the LO frequency is
divided by 6, 8, 10, 16 or 20 depending on the selected AM band.
7.8 Tuning PLL
The tuning PLL locks the VCO frequency divided by the programmable divider ratio to the
reference frequency. Due to the combination of different charge pump signals in the
PLL loop filter, the loop parameters are adapted dynamically. Tuning to different
RF frequencies is done by changing the programmable divider ratio. The tuning step size
is selected with the reference frequency divider setting.
7.9 AM/FM IF AGC amplifier
The combined AM/FM IF AGC amplifier delivers a suitable IF signal for the ADC in the
IF DSP. The maximum gain of the IF AGC amplifier can be selected via the I2C-bus. The
gain of this amplifier is automatically adapted via interfacing signals from the IF DSP. The
IF AGC amplifier has three signal inputs, two for FM and one for AM. This allows the
application of multiple external filters, e.g. with different bandwidths.
8. I2C-bus protocol
S
SLAVE ADDRESS W
ACK-s
MSA
ACK-s
ACK-s
DATA
P
data transferred
(n bytes + acknowledge)
001aad051
Fig 3. Write mode
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
9 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
S
DATA
ACK-s
SLAVE ADDRESS R
DATA
ACK-m
NA
data transferred
(n − 1 bytes + acknowledge)
P
001aad049
Fig 4. Read mode
Table 4.
Description of I2C-bus format
Code
Description
S
START condition
Slave address W
1100 0000b for pin ADDR2 and pin ADDR1 grounded
1100 0010b for pin ADDR2 grounded and pin ADDR1 floating
1100 0100b for pin ADDR2 floating and pin ADDR1 grounded
1100 0110b for pin ADDR2 and pin ADDR1 floating
Slave address R
1100 0001b for pin ADDR2 and pin ADDR1 grounded
1100 0011b for pin ADDR2 grounded and pin ADDR1 floating
1100 0101b for pin ADDR2 floating and pin ADDR1 grounded
1100 0111b for pin ADDR2 and pin ADDR1 floating
ACK-s
acknowledge generated by the slave
ACK-m
acknowledge generated by the master
NA
not acknowledge
MSA
mode and subaddress byte
Data
data byte
P
STOP condition
8.1 Read mode
Read data is loaded into the I2C-bus register at the preceding acknowledge clock pulse.
Table 5.
Read register overview
Data byte
Name
Reference
0h
TUNER
Section 8.1.1
1h
ID
Section 8.1.2
8.1.1 Read mode: data byte TUNER
Table 6.
TUNER - data byte 0h bit allocation
7
6
5
4
3
2
1
0
RAGC1
RAGC0
TAS1
TAS0
-
-
-
POR
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
10 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 7.
TUNER - data byte 0h bit description
Bit
Symbol
Description
7 and 6
RAGC[1:0]
RF AGC attenuation indicator
AM mode, PIN diode current on pin IAMAGC:
00 = no AGC
01 = LNA AGC
10 = IAGC < 1 mA
11 = IAGC > 1 mA
FM mode, PIN diode current on pin IFMAGC:
00 = < 0.1 mA
01 = 0.1 mA to 0.5 mA
10 = 0.5 mA to 2.5 mA
11 = > 2.5 mA
5 and 4
TAS[1:0]
tuning action state; the signal TAS informs about internal control
functions of the tuner action state machine; this way the progress of
tuner actions can be monitored by the microcontroller;
see Figure 8 to Figure 18
00 = no current action
01 = mute started and in progress at DSP
10 = PLL tuning in progress and mute activated at DSP
11 = PLL tuning ready and mute activated at DSP
3 to 1
-
not used
0
POR
power-on reset
0 = normal operation
1 = I2C-bus data is reset to default POR state; POR is reset to
logic 0 after the TEF6730A has been read out and written to via
I2C-bus at least once
8.1.2 Read mode: data byte ID
Table 8.
ID - data byte 1h bit allocation
7
6
5
4
3
2
1
0
-
-
-
-
-
ID2
ID1
ID0
Table 9.
ID - data byte 1h bit description
Bit
Symbol
Description
7 to 3
-
not used
2 to 0
ID[2:0]
device type identification 110 = TEF6730A
8.2 Write mode
The tuner is controlled by the I2C-bus. After the IC address the MSA byte contains the
control of the tuning action via the bits MODE[2:0] and REGC and subaddressing via bits
SA[3:0] (see Figure 5).
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
11 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
The tuner circuit is controlled by the CONTROL register. Any data change in the
CONTROL register has immediate effect and will change the operation of the tuner circuit
accordingly. Transmitted I2C-bus data is not loaded into the CONTROL register directly
but loaded into a BUFFER register instead. This allows the IC to take care of tuning
actions freeing the microcontroller from cumbersome controls and timings.
Controlled by a state machine, the BUFFER data will be loaded into the CONTROL
register for new settings. However, at the same time the CONTROL data is loaded into the
BUFFER register. This register swap action allows a fast return to the previous setting
because the previous data remains available in the BUFFER register (see Figure 6 and
Figure 7).
Via MODE several operational modes can be selected for the state machine. MODE offers
all standard tuning actions as well as generic control for flexibility. The state machine
controls the tuner by controlling the internal I2C-bus data. Action progress is monitored by
the accompanying IF DSP via the AFSAMPLE and AFHOLD lines. This way, functions like
tuning mute and weak signal processing can be controlled complementary to the tuner
action.
The state machine operation starts at the end of transmission (P = STOP). In case a
previous action is still active, this is ignored and the new action defined by MODE is
started immediately. When only the address byte is transmitted, no action is started at all
(device presence test).
To minimize the I2C-bus transmission time, only bytes that include data changes need to
be written. Following the MSA byte the transmission can start at any given data byte
defined by the subaddress (SA) bits.
Furthermore, when writing the buffered range either the current BUFFER data or the
current CONTROL data can be used as default, controlled by the REGC bit:
• With REGC = 0, any BUFFER data that is not newly written via I2C-bus remains
unchanged. In general, the BUFFER register will contain the previous tuner setting, so
this becomes default for the new setting. When only the MSA byte is transmitted
defining a tuning MODE with REGC = 0, the tuner will return to its previous settings
(see Figure 6).
• With REGC = 1, the BUFFER register is loaded with data from the CONTROL register
first. This way, not written BUFFER data equals the CONTROL data. Since the
CONTROL register contains the current tuner setting with REGC = 1, the current
tuner setting is default for the new setting. When a tuning MODE action is defined with
REGC = 1, the tuner will keep its current settings (CONTROL = current) for all data
that is not newly written during the transmission (see Figure 7).
After power-on reset, all registers are in their default settings. The control signals for the
IF DSP are set to AFSAMPLE = HIGH and AFHOLD = HIGH (i.e. mute state). Any action
of the state machine will change this setting to a new one as defined by the bits
MODE[2:0].
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
12 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 10.
Write mode subaddress overview
Subaddress
Name
Default
Reference
0h
CONTROL
0000 0100b
Section 8.2.2
1h
PLLM
0000 1000b
Section 8.2.3
2h
PLLL
0111 1110b
Section 8.2.4
3h
DAA
0100 0000b
Section 8.2.5
4h
AGC
1000 0000b
Section 8.2.6
5h
BAND
0010 0000b
Section 8.2.7
Fh
TEST
0000 0000b
Section 8.2.8
I2C-BUS
MODE
SA = 00h to 05h
BUFFER REGISTER
SA = 00h to 05h
MODE DECODER
load
AFSAMPLE
STATE MACHINE
AFHOLD
REGC = 1
swap
CONTROL REGISTER
SA = 00h to 05h
TUNER CIRCUIT
001aae094
Fig 5. I2C-bus control
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
13 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
MODE = load, REGC = 0, SA = 2
address
MSA
byte 2
byte 3
byte 4
byte 5
P
BUFFER byte 0
previous
current
byte 1
previous
current
byte 2
previous
byte 3
previous
byte 4
previous
byte 5
previous
current
new
new
current
new
current
new
current
swap
CONTROL byte 0
current
previous
byte 1
current
previous
byte 2
current
new
byte 3
current
new
byte 4
current
new
byte 5
current
new
001aae095
Fig 6. Write to CONTROL register with swap, REGC = 0
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
14 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
MODE = load, REGC = 1, SA = 3
address
MSA
byte 3
byte 4
byte 5
P
BUFFER byte 0
previous
current
current
byte 1
previous
current
current
byte 2
previous
current
current
byte 3
previous
current
byte 4
previous
current
byte 5
previous
current
new
current
new
load
current
new
current
swap
CONTROL byte 0
current
current
byte 1
current
current
byte 2
current
current
byte 3
current
new
byte 4
current
new
byte 5
current
new
001aae096
Fig 7. Write to CONTROL register with swap, REGC = 1
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
15 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
8.2.1 Mode and subaddress byte for write
Table 11.
MSA - mode and subaddress byte bit allocation
7
6
5
4
3
2
1
0
MODE2
MODE1
MODE0
REGC
SA3
SA2
SA1
SA0
Table 12.
MSA - mode and subaddress byte bit description
Bit
Symbol
Description
7 to 5
MODE[2:0]
mode; see Table 13
4
REGC
register mode
0 = buffer mode or back mode: previous tuning data is default for
new I2C-bus write (data of the BUFFER register is not changed
before I2C-bus write); see Figure 6
1 = control mode or current mode: current tuning data is default for
new I2C-bus write (the BUFFER register is loaded with CONTROL
register data before I2C-bus write); see Figure 7
3 to 0
SA[3:0]
subaddress; write data byte subaddress 0 to 15. The subaddress
value is auto-incremented and will revert from SA = 15 to SA = 0. The
auto-increment function cannot be switched off.
Table 13.
Tuning action modes[1]
MODE2 MODE1 MODE0 Symbol
Description[2]
0
0
0
buffer
write BUFFER register, no state machine action, no
swap
0
0
1
preset
tune to new program with 60 ms mute control; swap[3] ;
see Figure 8 and Figure 9
0
1
0
search
tune to new program and stay muted (for release use
end mode); swap[3] ; see Figure 10 and Figure 11
0
1
1
AF update
tune to AF program; check AF quality and tune back
to main program; two swap operations[4];
see Figure 12 and Figure 13
1
0
0
jump
tune to AF program in minimum time; swap;
see Figure 14 and Figure 15
1
0
1
check
tune to AF program and stay muted (for release use
end mode); swap; see Figure 16 and Figure 17
1
1
0
load
write CONTROL register via BUFFER; no state
machine action; immediate swap; see Figure 6 and
Figure 7
1
1
1
end
end action; release mute; no swap; see Figure 18
[1]
When the write transmission of a state machine command starts during a mute state of the state machine,
the sequences of the state machine start immediately with the actions which follow the mute period in the
standard sequence (see Figure 9, Figure 11, Figure 13, Figure 15 and Figure 17).
[2]
References to mute are only used for better understanding. Muting is performed in the IF DSP controlled by
the tuner AFHOLD and AFSAMPLE lines.
[3]
In the modes preset and search the AM AGC time constant is set to fast during the period of complete
mute.
[4]
The AF update sequence can also be started by pulling the AFHOLD pin LOW. In this case the AF
information should be loaded into the BUFFER before. LOW period for a correct AF update timing:
tLOW > 20 µs. Between the end of the I2C-bus transmission and the falling edge of the AFHOLD pulse a
delay of ≥ 20 µs is necessary.
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
16 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
1 ms
time
tuning
PLL
f1
60 ms
f2
register SWAP
TAS read
'01'
'00'
'11'
'10'
'11'
'00'
50 µs
AFHOLD
AFSAMPLE
suggested IF DSP signal control
reset
quality detectors
tuning mute
reset
WS processing
FAST
001aae097
Fig 8. Preset mode
I2C-bus
P
PLL
time
tuning
f1
60 ms
f2
register SWAP
TAS read
AFHOLD
'11'
'10'
'11'
'11'
'00'
50 µs
AFSAMPLE
001aae098
Fig 9. Preset mode, started during mute
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
17 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
1 ms
time
tuning
PLL
f1
f2
register SWAP
TAS read
'01'
'00'
'11'
'10'
'11'
AFHOLD
AFSAMPLE
suggested IF DSP signal control
reset
quality detectors
tuning mute
reset
WS processing
FAST
001aae099
Fig 10. Search mode
I2C-bus
P
PLL
time
tuning
f1
f2
register SWAP
TAS read
'11'
'10'
'11'
'11'
AFHOLD
AFSAMPLE
001aae100
Fig 11. Search mode, started during mute
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
18 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
0.5 ms
1 ms
time
PLL
tuning
f1
2 ms
PLL
f2
f2
f1
register SWAP
TAS read
'11'
'10'
'01'
'00'
'10'
'00'
'00'
AFHOLD
AFSAMPLE
suggested IF DSP signal control
reset
quality detectors
store AFU result
reset
tuning mute
HOLD
WS processing
001aae101
Fig 12. AF update mode
I2C-bus
P
0.5 ms
PLL
time
tuning
f2
f1
register SWAP
TAS read
'11'
'10'
'00'
'00'
AFHOLD
AFSAMPLE
001aae102
Fig 13. AF update mode, started during mute
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
19 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
0.5 ms
1 ms
time
tuning
PLL
f1
f2
register SWAP
TAS read
'11'
'10'
'01'
'00'
'00'
'00'
AFHOLD
AFSAMPLE
suggested IF DSP signal control
reset
quality detectors
tuning mute
HOLD
WS processing
001aae103
Fig 14. Jump mode
I2C-bus
P
0.5 ms
PLL
time
tuning
f1
f2
register SWAP
TAS read
'11'
'10'
'11'
'00'
'00'
AFHOLD
AFSAMPLE
001aae104
Fig 15. Jump mode, started during mute
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
20 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
1 ms
time
tuning
PLL
f1
f2
register SWAP
TAS read
'11'
'10'
'01'
'00'
'11'
AFHOLD
AFSAMPLE
suggested IF DSP signal control
reset
quality detectors
tuning mute
HOLD
WS processing
001aae105
Fig 16. Check mode
I2C-bus
P
PLL
time
tuning
f1
f2
register SWAP
TAS read
'11'
'10'
'11'
'11'
AFHOLD
AFSAMPLE
001aae106
Fig 17. Check mode, started during mute
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
21 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
I2C-bus
P
time
TAS read
'11'
'00'
'00'
AFHOLD
AFSAMPLE
suggested IF DSP signal control
quality detectors
tuning mute
WS processing
001aae107
Fig 18. End mode
8.2.2 Write mode: data byte CONTROL
Table 14.
CONTROL - data byte 0h bit allocation with default setting
7
6
5
4
3
2
1
0
RFGAIN
0
FLAG
IFGAIN
NBAGC1
NBAGC0
DAASW
CFSW
0
0
0
1
0
0
0
Table 15.
CONTROL - data byte 0h bit description
Bit
Symbol
Description
7
RFGAIN
FM RF gain
0 = standard gain
1 = +6 dB added gain
6
-
not used, must be set to logic 0
5
FLAG
software port output open-collector
0 = SWPORT pin inactive (high-impedance)
1 = SWPORT pin active (pull-down to ground)
4
IFGAIN
IF gain
0 = standard IF gain
1 = increased IF gain (6 dB)
3 and 2
NBAGC[1:0]
RF AGC start level; setting of narrow band (IF) detection
00 = 700 mV (peak value)
01 = 560 mV (peak value)
10 = 450 mV (peak value)
11 = 350 mV (peak value)
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
22 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 15.
CONTROL - data byte 0h bit description …continued
Bit
Symbol
Description
1
DAASW
antenna DAA mode in FM
0 = standard; DAA output voltage is controlled by Vtune
1 = DAA output voltage is a fixed temperature stable voltage
controlled by the DAA setting (independent of Vtune)
0
CFSW
ceramic filter switch
0 = CFSW1 pin active (low-impedance) and CFSW2 pin inactive
(high-impedance)
1 = CFSW2 pin active (low-impedance) and CFSW1 pin inactive
(high-impedance)
8.2.3 Write mode: data byte PLLM
Table 16.
PLLM - data byte 1h bit allocation with default setting
7
6
5
4
3
2
1
0
CPOFF
PLL14
PLL13
PLL12
PLL11
PLL10
PLL9
PLL8
0
0
0
0
1
0
0
0
Table 17.
PLLM - data byte 1h bit description
Bit
Symbol
Description
7
CPOFF
charge pump off
0 = standard operation
1 = charge pump deactivated
6 to 0
PLL[14:8]
upper byte of PLL divider word
8.2.4 Write mode: data byte PLLL
Table 18.
PLLL - data byte 2h bit allocation with default setting
7
6
5
4
3
2
1
0
PLL7
PLL6
PLL5
PLL4
PLL3
PLL2
PLL1
PLL0
0
1
1
1
1
1
1
0
Table 19.
PLLL - data byte 2h bit description
Bit
Symbol
Description
7 to 0
PLL[7:0]
lower byte of PLL divider word; PLL[14:0] is the divider ratio N of the
VCO programmable divider; N = 1024 to 32767
8.2.5 Write mode: data byte DAA
Table 20.
DAA - data byte 3h bit allocation with default setting
7
6
5
4
3
2
1
0
AGCSW
DAA6
DAA5
DAA4
DAA3
DAA2
DAA1
DAA0
0
1
0
0
0
0
0
0
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
23 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 21.
DAA - data byte 3h bit description
Bit
Symbol
Description
7
AGCSW
RF AGC switch
0 = no drive of unused RF AGC PIN diode (FM PIN diode in
AM mode or AM PIN diode in FM mode)
1 = unused PIN diode supplied with constant current
6 to 0
DAA[6:0]
alignment of antenna circuit tuning voltage in FM mode
(0.1Vtune to 2.0Vtune)
8.2.6 Write mode: data byte AGC
Table 22.
AGC - data byte 4h bit allocation with default setting
7
6
5
4
3
2
1
0
SDAA3
SDAA2
SDAA1
SDAA0
WBAGC1
WBAGC0
KAGC
LODX
1
0
0
0
0
0
0
0
Table 23.
AGC - data byte 4h bit description
Bit
Symbol
Description
7 to 4
SDAA[3:0]
alignment of second antenna circuit tuning voltage in FM mode
(0.7VDAAOUT1 to 1.35VDAAOUT1)
3 and 2
WBAGC[1:0]
RF AGC start level; setting of wideband (RF) detection; for AM,
see Table 24 and for FM, see Table 25
1
KAGC
FM keyed AGC
0 = keyed AGC off
1 = keyed AGC on
0
LODX
local switch
0 = standard operation (DX)
1 = forced FM RF AGC attenuation (LOCAL)
Table 24.
Setting of RF AGC threshold voltage for AM
WBAGC1
WBAGC0
AM output (RMS value) at LNAOUT
0
0
250 mV
0
1
200 mV
1
0
150 mV
1
1
70 mV
Table 25.
Setting of RF AGC threshold voltage for FM
WBAGC1
WBAGC0
FM mixer input voltage (RMS value) at FMMIXIN
0
0
24 mV
0
1
17 mV
1
0
12 mV
1
1
9 mV
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
24 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
8.2.7 Write mode: data byte BAND
Table 26.
BAND - data byte 5h bit allocation with default setting
7
6
5
4
3
2
1
0
BAND2
BAND1
BAND0
FREF2
FREF1
FREF0
LOINJ
FMIFIN
0
0
1
0
0
0
0
0
Table 27.
BAND - data byte 5h bit description
Bit
Symbol
Description
7 to 5
BAND[2:0]
see Table 28
4 to 2
FREF[2:0]
PLL reference frequency; see Table 29
1
LOINJ
0 = high injection image suppression
1 = low injection image suppression
0
FMIFIN
0 = FMIFAGCIN1 input is selected
1 = FMIFAGCIN2 input is selected
Table 28.
Decoding of BAND bits
BAND2
BAND1
BAND0
Divider ratio M
Receiver band
0
0
0
1
WB
0
0
1
2
FM
0
1
0
3
FM
0
1
1
6
AM
1
0
0
8
AM
1
0
1
10
AM
1
1
0
16
AM
1
1
1
20
AM
Table 29.
Reference frequencies
FREF2
FREF1
FREF0
fref
0
0
0
100 kHz
0
0
1
50 kHz
0
1
0
25 kHz
0
1
1
20 kHz
1
0
0
10 kHz
1
0
1
reserved
1
1
0
reserved
1
1
1
reserved
The correct charge pump current for each reference frequency is selected automatically,
see Table 30.
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
25 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 30.
Charge pump source[1]
FREF2
FREF1
FREF0
LOINJ
Charge pump
current
fref
0
0
0
X
CP1
100 kHz
0
0
1
X
CP2
50 kHz
0
1
0
X
CP3
25 kHz
0
1
1
1
CP3
20 kHz
0
1
1
0
CP4
20 kHz
1
0
0
X
CP5
10 kHz
[1]
X = don’t care.
8.2.7.1
Tuning overview
( f RF + 10.7 MHz ) × M
If LOINJ = 0: N = --------------------------------------------------------.
f ref
( f RF – 10.7 MHz ) × M
If LOINJ = 1: N = --------------------------------------------------------.
f ref
f ref
tuning step = --------- ; where M is the divider ratio of the VCO frequency for AM mixer and
M
f VCO
FM mixer M = --------------.
f mixer
Table 31.
Standard tuner settings
Broadcast band
BAND2 BAND1 BAND0 M
FREF2 FREF1 FREF0 fref
LOINJ Tuning step
Europe FM and US FM
0
0
1
2
0
0
0
100 kHz 0
50 kHz
Japan FM
0
1
0
3
0
0
0
100 kHz 1
33.3 kHz
East Europe FM (OIRT FM)
0
1
0
3
0
1
1
20 kHz
1
6.67 kHz
WB FM
0
0
0
1
0
1
0
25 kHz
0
25 kHz
AM MW and LW
1
1
1
20 0
1
1
20 kHz
0
1 kHz
AM SW 120 m to 60 m
1
1
0
16 1
0
0
10 kHz
0
0.625 kHz
AM SW 49 m to 22 m
1
0
1
10 1
0
0
10 kHz
0
1 kHz
AM SW 25 m to 15 m
1
0
0
8
1
0
0
10 kHz
0
1.25 kHz
AM SW 16 m to 11 m
0
1
1
6
1
0
0
10 kHz
0
1.67 kHz
8.2.8 Write mode: data byte TEST
Table 32.
[1]
TEST - data byte Fh bit allocation with default setting (not buffered)[1]
7
6
5
4
3
2
1
0
0
0
0
0
TEST3
TEST2
TEST1
TEST0
0
0
0
0
The test control byte is for internal use only.
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
26 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
9. Limiting values
Table 33. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VCCA
analog supply voltage
on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),
VCC(IF), FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and AMMIXOUT2
−0.3
+10
V
∆VCCAn
voltage difference between
any analog supply pins
−0.3
+0.3
V
VSCL
voltage on pin SCL
−0.3
+5.5
V
VSDA
voltage on pin SDA
−0.3
+5.5
V
−0.3
+5.5
V
−0.3
+5.5
V
V
[1]
Vi
input voltage
on pins ADDR1 and ADDR2
Vo
output voltage
on pins AFHOLD and AFSAMPLE
−0.3
+10
Vn
voltage on any other pin
−0.3
VCCA + 0.3 V
Ptot
total power dissipation
-
1100
mW
Tstg
storage temperature
−55
+150
°C
Tamb
ambient temperature
−40
+105
°C
on pin SWPORT
soldered exposed die pad
subjective functionality
−40
+85
°C
[2]
−2000
+2000
V
[3]
−500
+500
V
[4]
−1000
+2000
V
[3]
−500
+500
V
full functionality
Vesd
electrostatic discharge
voltage
on all pins except pin VCC(VCO)
on pin VCC(VCO)
[1]
The maximum voltage must be less than VCCA.
[2]
Human body model: Class 2 according to JESD22-A114C.01.
[3]
Charge device model: Class 3 according to JESD22-C101C.
[4]
Human body model: Class 1C according to JESD22-A114C.01.
10. Thermal characteristics
Table 34.
Thermal characteristics
Symbol
Parameter
Typ
Unit
Rth(j-a)
thermal resistance from junction to ambient in free air
Conditions
29.6
K/W
Rth(j-c)
thermal resistance from junction to case
17.5
K/W
TEF6730A_1
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Rev. 01 — 21 February 2007
27 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
11. Static characteristics
Table 35. Static characteristics
VCCA = 8.5 V; Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
8
8.5
9
V
Tamb = −40 °C
-
14
-
mA
Tamb = 25 °C
-
15
-
mA
Tamb = 85 °C
-
16
-
mA
Tamb = −40 °C
-
7.9
-
mA
Tamb = 25 °C
-
7.6
-
mA
Tamb = 85 °C
-
7.2
-
mA
Supply voltage
VCCA
analog supply voltage on pins VCC, VCC(PLL),
VCC(VCO), VCC(RF), VCC(IF),
FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and
AMMIXOUT2
Current in FM mode
ICC(RF)
ICC(PLL)
ICC(VCO)
ICC
ICC(IFAGC)
IFMMIXOUT1
IFMMIXOUT2
ICC(tot)
RF supply current
PLL supply current
VCO supply current
supply current
Tamb = −40 °C
-
3.8
-
mA
Tamb = 25 °C
-
3.6
-
mA
Tamb = 85 °C
-
3.5
-
mA
Tamb = −40 °C
-
23
-
mA
Tamb = 25 °C
-
21.5
-
mA
Tamb = 85 °C
-
19
-
mA
-
26
-
mA
Tamb = 25 °C
-
26
-
mA
Tamb = 85 °C
-
26
-
mA
Tamb = −40 °C
-
5.3
-
mA
Tamb = 25 °C
-
5.8
-
mA
Tamb = 85 °C
-
6.1
-
mA
IF AGC supply current Tamb = −40 °C
current on
pin FMMIXOUT1
current on
pin FMMIXOUT2
Tamb = −40 °C
-
5.3
-
mA
Tamb = 25 °C
-
5.8
-
mA
Tamb = 85 °C
-
6.1
-
mA
-
85.3
-
mA
Tamb = −40 °C
-
39.5
-
mA
Tamb = 25 °C
-
39
-
mA
Tamb = 85 °C
-
38
-
mA
total supply current
Current in AM mode
ICC(RF)
ICC(PLL)
ICC(VCO)
RF supply current
PLL supply current
VCO supply current
Tamb = −40 °C
-
7.9
-
mA
Tamb = 25 °C
-
7.6
-
mA
Tamb = 85 °C
-
7.2
-
mA
Tamb = −40 °C
-
3.8
-
mA
Tamb = 25 °C
-
3.6
-
mA
Tamb = 85 °C
-
3.5
-
mA
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
28 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 35. Static characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICC
supply current
Tamb = −40 °C
-
21.5
-
mA
Tamb = 25 °C
-
21
-
mA
Tamb = 85 °C
-
20
-
mA
-
33
-
mA
Tamb = 25 °C
-
32.5
-
mA
Tamb = 85 °C
-
32
-
mA
ICC(IFAGC)
IAMMIXOUT1
IAMMIXOUT2
ICC(tot)
IF AGC supply current Tamb = −40 °C
current on
pin AMMIXOUT1
current on
pin AMMIXOUT2
Tamb = −40 °C
-
6
-
mA
Tamb = 25 °C
-
5.5
-
mA
Tamb = 85 °C
-
5
-
mA
Tamb = −40 °C
-
6
-
mA
Tamb = 25 °C
-
5.5
-
mA
Tamb = 85 °C
-
5
-
mA
-
114.7
-
mA
total supply current
12. Dynamic characteristics
Table 36. Dynamic characteristics
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
100
-
kHz
115
-
-
dBc/√Hz
Reference frequency
External reference frequency, circuit inputs: pins FREF1 and FREF2
fext
external frequency
C/N
carrier-to-noise ratio
required from reference
source; fext = 100 kHz;
∆f = 10 kHz
Ii(ext)(min)(M)
peak minimum
external input current
square wave signal
[1]
-
-
200
µA
Ii(ext)(max)(M)
peak maximum
external input current
square wave signal
[1]
750
-
-
µA
Icm(ext)
external
from each pin to GND
common-mode current
−50
-
+50
µA
Ri
input resistance
Vcm
common-mode
voltage
-
5
10
Ω
1.0
1.2
1.4
V
[2]
-
-
130
MHz
[2]
-
-
159.9
MHz
[2]
256
-
-
MHz
94
98
-
dBc/√Hz
measured between each pin to
GND
Tuning system; see Table 28, Table 29, Table 30 and Table 31
Voltage controlled oscillator
fVCO(min)
minimum VCO
frequency
fVCO(max)
maximum VCO
frequency
C/N
carrier-to-noise ratio
application according to
Figure 25
fVCO = 200 MHz; ∆f = 10 kHz;
Q = 30
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
29 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
∆f
frequency deviation
caused by ripple on supply
voltage; fripple = 100 Hz;
VCC(ripple) = 50 mV (RMS);
fVCO = 200 MHz; standard FM
-
2
-
Hz
Charge pump: pin CPOUT; see Table 30
Isink(CP1)
CP1 sink current
VCPOUT = 0.5 V to
VCC(PLL) − 1.3 V
130
180
240
µA
Isource(CP1)
CP1 source current
VCPOUT = 0.5 V to
VCC(PLL) − 1.3 V
−240
−180
−130
µA
Isink(CP2)
CP2 sink current
VCPOUT = 0.7 V to
VCC(PLL) − 1.5 V
270
360
480
µA
Isource(CP2)
CP2 source current
VCPOUT = 0.7 V to
VCC(PLL) − 1.5 V
−480
−360
−270
µA
Isink(CP3)
CP3 sink current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
580
780
1050
µA
Isource(CP3)
CP3 source current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
−1050
−780
−580
µA
Isink(CP4)
CP4 sink current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
1040
1400
1900
µA
Isource(CP4)
CP4 source current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
−1900
−1400
−1040
µA
Isink(CP5)
CP5 sink current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
1630
2 200
2970
µA
Isource(CP5)
CP5 source current
VCPOUT = 0.7 V to
VCC(PLL) − 0.7 V
−2970
−2200
−1630
µA
Charge pump: pin VTUNE
Io(sink)
output sink current
Vtune = 0.9 V to
VCC(PLL) − 0.7 V
2070
2800
3780
µA
Io(source)
output source current
Vtune = 0.9 V to
VCC(PLL) − 0.7 V
−3780
−2800
−2070
µA
tuning time
Europe FM and US FM band;
fref = 100 kHz; fRF = 87.5 MHz
to 108 MHz
-
0.75
1
ms
AM MW band; fref = 20 kHz;
fRF = 0.53 MHz to 1.7 MHz
-
-
10
ms
cycle time for inaudible AF
update including 1 ms mute
start and 1 ms mute release
time
-
6
6.5
ms
0.1
-
2
Timings
ttune
tupd(AF)
AF update time
Antenna Digital Auto Alignment (DAA)
DAA1: pin DAAOUT1[3]
Gconv(DAA)
DAA conversion gain
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
30 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vo
output voltage
FM mode; DAASW = 0
minimum value
-
-
0.6
V
maximum value
VCC(PLL) − 0.6 -
-
V
minimum value; data byte
DAA bits
DAA[6:0] = 000 0000
-
0.6
V
maximum value; data byte
DAA bits
DAA[6:0] = 111 1111
VCC(PLL) − 0.6 -
-
V
minimum value; data byte
DAA bits
DAA[6:0] = 000 0000
-
0.6
V
maximum value; data byte
DAA bits
DAA[6:0] = 111 1111
VCC(PLL) − 0.6 -
-
V
FM mode; DAASW = 1;
independent of tuning voltage
-
AM mode; independent of
tuning voltage
-
Vn(o)
output noise voltage
data byte DAA bits
DAA[6:0] = 100 0000;
FM mode; Vtune = 4 V with
frequency range from
300 Hz to 22 kHz
-
30
100
µV
∆Vo(T)
output voltage
deviation over
temperature
Tamb = −40 °C to +85 °C; data
byte DAA bits
DAA[6:0] = 100 0000
−30
-
+30
mV
∆Vo(step)
step output voltage
tolerance
n = 0 to 127; FM mode;
Vtune = 4 V
−0.5VLSB
0
+0.5VLSB
∆Vo
output voltage
deviation
Vtune = 4 V; Iload = 50 µA
−VLSB
-
+VLSB
Vtune = 4 V; Iload = −50 µA
−VLSB
-
+VLSB
ts(o)
output settling time
VDAAOUT1 = 0.2 V to 8.25 V;
CL = 270 pF
-
30
60
µs
αripple
ripple rejection
VCC(ripple) / Vo; data byte DAA
bits DAA[6:0] = 101 0101;
FM mode; Vtune = 4 V;
fripple = 100 Hz;
VCC(ripple) = 100 mV
-
40
-
dB
0.7
-
1.35
minimum value
-
-
0.6
maximum value
VCC(PLL) − 0.8 -
-
V
-
100
µV
DAA2: pin DAAOUT2[4]
Gconv(DAA)
DAA conversion gain
Vo
output voltage
Vn(o)
output noise voltage
AM mode and FM mode
data byte AGC bits
SDAA[3:0] = 1000; FM mode;
VDAAOUT1 = 4 V with frequency
range from 300 Hz to 22 kHz
TEF6730A_1
Product data sheet
30
V
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
31 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
∆Vo(T)
output voltage
deviation over
temperature
Tamb = −40 °C to +85 °C; data
byte AGC bits
SDAA[3:0] = 1000
−30
-
+30
mV
∆Vo(step)
step output voltage
tolerance
n = 0 to 15; FM mode;
VDAAOUT1 = 4 V
−0.5VLSB
0
+0.5VLSB
∆Vo
output voltage
deviation
VDAAOUT1 = 4 V; Iload = 50 µA
−VLSB
-
+VLSB
VDAAOUT1 = 4 V; Iload = −50 µA
−VLSB
-
+VLSB
ts(o)
output settling time
VDAAOUT1 = 4 V;
VDAAOUT2 = 2.8 V to 5.4 V;
CL = 270 pF
-
20
30
µs
αripple
ripple rejection
VCC(ripple) / VDAAOUT1; data byte
AGC bits SDAA[3:0] = 1010;
FM mode; VDAAOUT1 = 4 V;
fripple = 100 Hz;
VCC(ripple) = 100 mV
-
50
-
dB
data byte AGC bits
WBAGC[1:0] = 00
175
250
350
mV
data byte AGC bits
WBAGC[1:0] = 01
140
200
280
mV
data byte AGC bits
WBAGC[1:0] = 10
105
150
210
mV
data byte AGC bits
WBAGC[1:0] = 11
49
70
98
mV
data byte CONTROL bits
NBAGC[1:0] = 00
490
700
980
mV
data byte CONTROL bits
NBAGC[1:0] = 01
390
560
780
mV
data byte CONTROL bits
NBAGC[1:0] = 10
315
450
630
mV
data byte CONTROL bits
NBAGC[1:0] = 11
245
350
490
mV
0.9
1.3
1.8
MΩ
AM channel
AM RF AGC wideband detector (average detector): pin LNAOUT
VLNAOUT(RMS)
RMS voltage on
pin LNAOUT
start level of wideband AGC;
RL = 430 Ω (load at
pin LNAOUT); m = 0.3;
see Table 24 and Table 25
AM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2
Vo(IFOUT)(M)
peak output voltage
between pin IFOUT1
and pin IFOUT2
start level of narrow-band
AGC; data byte CONTROL bit
IFGAIN = 0;
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW;
see Table 15
AM LNA and AGC
Input: pin LNAIN; output: pin LNAOUT
Ri
input resistance
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
32 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Ci
Conditions
Min
Typ
Max
Unit
input capacitance
-
46
69
pF
Gm
transconductance gain Io / Vi
36
52
74
mA/V
∆Gm(T)
transconductance gain Tamb = −40 °C to +85 °C;
deviation over
see Figure 19
temperature
-
-
-
dB
IP3
third-order intercept
point
RL = 430 Ω (load at
pin LNAOUT)
111
114
-
dBµV
IP2
second-order intercept RL = 430 Ω (load at
pin LNAOUT)
point
120
129
-
dBµV
Vn(i)(eq)
equivalent input noise
voltage
fRF = 1 MHz
-
1.1
1.55
nV/√Hz
fRF = 144 kHz
-
2.55
3.55
nV/√Hz
80
115
165
Ω
Csource = 110 pF; RL = 430 Ω
(load at pin LNAOUT)
Ro
output resistance
Co
output capacitance
-
22
33
pF
Vo(p-p)(max)
maximum
peak-to-peak output
voltage
-
2.2
-
V
∆GAGC
AGC gain range
8
11
14
dB
in series with output resistance
RF PIN diode AGC current generator output: pin IAMAGC
∆GAGC
AGC gain range
fRF = 1 MHz; dummy aerial
15 pF / 60 pF
-
50
-
dB
VIAMAGC
voltage on
pin IAMAGC
PIN diode drive DC voltage
2.2
-
VCCA
V
Isink(max)
maximum sink current
VIAMAGC = 2.2 V
10
-
-
mA
Isink
sink current
FM mode; data byte DAA bit
AGCSW = 1
0.6
0.9
1.4
mA
FM mode; data byte DAA bit
AGCSW = 0
-
-
100
nA
[5]
AM mixer (IF = 10.7 MHz)
Mixer input: pins AMMIXIN and AMMIXDEC
input resistance
[6]
40
-
-
kΩ
Ci
input capacitance
[6]
-
3
4.5
pF
Vi(max)
maximum input
voltage
500
-
-
mV
Ri
on pin AMMIXIN; 1 dB
compression point of
VMIXOUT1-MIXOUT2; m = 0
Mixer output: pins AMMIXOUT1 and AMMIXOUT2
output resistance
[7]
100
-
-
kΩ
Co
output capacitance
[7]
-
4
7
pF
Vo(p-p)(max)
maximum
peak-to-peak output
voltage
12
15
-
V
Gm(conv)
conversion
Io / Vi
transconductance gain
1.8
2.4
3.2
mA/V
Ro
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
33 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
∆Gm(conv)(T)
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C;
conversion
transconductance gain see Figure 20
deviation over
temperature
-
-
-
dB
IP3
third-order intercept
point
135
138
-
dBµV
IP2
second-order intercept RL = 2.6 kΩ (AC load between
output pins)
point
-
170
-
dBµV
Vn(i)(eq)
equivalent input noise
voltage
-
7.2
10
nV/√Hz
NF
noise figure
-
6.2
9
dB
data byte AGC bits
WBAGC[1:0] = 11
5
9
15
mV
data byte AGC bits
WBAGC[1:0] = 10
7
12
19
mV
data byte AGC bits
WBAGC[1:0] = 01
10
17
27
mV
data byte AGC bits
WBAGC[1:0] = 00
14
24
38
mV
data byte AGC bits
WBAGC[1:0] = 11
19
30
48
mV
data byte AGC bits
WBAGC[1:0] = 10
21
33
52
mV
data byte AGC bits
WBAGC[1:0] = 01
24
38
60
mV
data byte AGC bits
WBAGC[1:0] = 00
28
45
71
mV
RL = 2.6 kΩ (AC load between
output pins); ∆f = 300 kHz
band limited noise;
Rsource = 750 Ω; noise of
Rsource included; RL = 2.6 kΩ
(AC load between output pins)
FM channel
FM RF AGC (FM distance mode; data byte AGC bit LODX = 0)
Input: pins FMMIXIN1 and FMMIXIN2[8]
Vi(FMMIXIN)(RMS) RMS input voltage
between
pin FMMIXIN1 and
pin FMMIXIN2
start level of wideband AGC;
keyed AGC off; data byte AGC
bit KAGC = 0; see Table 24
and Table 25
start level of wideband AGC;
keyed AGC on; data byte AGC
bit KAGC = 1;
VKAGC > Vth(KAGC)
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
34 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
data byte CONTROL bits
NBAGC[1:0] = 00
490
700
980
mV
data byte CONTROL bits
NBAGC[1:0] = 01
390
560
780
mV
data byte CONTROL bits
NBAGC[1:0] = 10
315
450
630
mV
data byte CONTROL bits
NBAGC[1:0] = 11
245
350
490
mV
FM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2
Vo(IFOUT)(M)
peak output voltage
between pin IFOUT1
and pin IFOUT2
start level of narrow-band
AGC; data byte CONTROL bit
IFGAIN = 0;
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW;
see Table 15
PIN diode drive output: pin IFMAGC
Isource(max)
maximum source
current
VTFMAGC = VIFMAGC + 1.4 V;
data byte AGC bit KAGC = 0
−16
−10
−7
mA
Isink(max)
maximum sink current
at AGC decay;
VTFMAGC = VIFMAGC; data byte
AGC bit KAGC = 0
7
10
16
mA
Isource
source current
AM mode; data byte DAA bit
AGCSW = 1
-
−1.2
-
mA
AM mode; data byte DAA bit
AGCSW = 0
-
0
-
mA
data byte AGC bit LODX = 1
(FM local)
−0.75
−0.5
−0.35
mA
VIFMAGC
voltage on
pin IFMAGC
voltage at PIN diode drive
output; VFMMIXIN1 < Vth
-
100
300
mV
Vth(KAGC)
threshold voltage on
pin KAGC
threshold level voltage for
narrow-band AGC (keyed
AGC); data byte AGC bit
KAGC = 1; see Table 15 and
Table 23
500
950
1400
mV
75
100
-
mV
RFGAIN = 0
-
4.7
6.4
nV/√Hz
RFGAIN = 1
-
4.2
-
nV/√Hz
RFGAIN = 0
3
3.8
4.7
kΩ
RFGAIN = 1
1.6
2.0
2.5
kΩ
FM mixer (IF = 10.7 MHz)
FM RF input: pins FMMIXIN1 and FMMIXIN2[8]
Vi(RF)(max)
maximum RF input
voltage
1 dB compression point of
FM mixer output voltage
Vn(i)(eq)
equivalent input noise
voltage
Rsource = 500 Ω; noise of
Rsource included; RL = 2.6 kΩ
(on output pins FMMIXOUT1
and FMMIXOUT2)
Ri
input resistance
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
35 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Ci
Gm(conv)
Conditions
Min
Typ
Max
Unit
input capacitance
-
2
4
pF
conversion
Io / Vi; RF gain 1; data byte
transconductance gain PLLM bit RFGAIN = 0
12
18
25
mA/V
Io / Vi; RF gain 2; data byte
PLLM bit RFGAIN = 1
24
36
50
mA/V
-
-
-
dB
RFGAIN = 0
-
4.2
5.7
dB
RFGAIN = 1
-
3.2
4.7
dB
∆Gm(conv)(T)
Tamb = −40 °C to +85 °C;
conversion
transconductance gain see Figure 21
deviation over
temperature
NF
noise figure
IP3
IRR
Rsource = 500 Ω; Tamb = 25 °C
third-order intercept
point
RFGAIN = 0
117
123
-
dBµV
RFGAIN = 1
108
114
-
dBµV
image rejection ratio
Vo(wanted) / Vo(image);
fRF(wanted) = 87.5 MHz;
fRF(image) = 108.9 MHz
25
40
-
dB
Output: pins FMMIXOUT1 and FMMIXOUT2[9]
Ro
output resistance
100
-
-
kΩ
Co
output capacitance
-
4
6
pF
Vo(p-p)(max)
maximum
peak-to-peak output
voltage
4.5
5.6
-
V
FM weather band input: pins WXMIXIN and WXMIXDEC
Gm(conv)
conversion
Io / Vi
transconductance gain
10
15
21
mA/V
∆Gm(conv)(T)
Tamb = −40 °C to +85 °C;
conversion
transconductance gain see Figure 22
deviation over
temperature
-
-
-
dB
Ri
input resistance
-
5.1
-
kΩ
Ci
input capacitance
-
2
4
pF
NF
noise figure
-
3.5
5
dB
IP3
third-order intercept
point
-
116
-
dBµV
IRR
image rejection ratio
20
33
-
dB
Rsource = 300 Ω
Vo(wanted) / Vo(image);
fRF(wanted) = 162.475 MHz;
fRF(image) = 183.875 MHz
IF AGC amplifier
AM mode; inputs: pins AMIFAGCIN and IFAGCDEC[10]; outputs: pins IFOUT1 and IFOUT2[11]
Ri
input resistance
-
100
-
kΩ
Ci
input capacitance
-
5
7
pF
Ro
output resistance
120
210
290
Ω
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
36 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
G
gain
data byte CONTROL bit
IFGAIN = 0
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
21.2
24.2
27.2
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
15.2
18.2
21.2
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
9.2
12.2
15.2
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
3.2
6.2
9.2
dB
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
27.2
30.2
33.2
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
21.2
24.2
27.2
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
15.2
18.2
21.2
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
9.2
12.2
15.2
dB
-
12.9
16
dB
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
77
83
-
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
77
83
-
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
77
83
-
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
74
80
-
dB
data byte CONTROL bit
IFGAIN = 1
NF
noise figure
Rsource = 300 Ω; data byte
CONTROL bit IFGAIN = 0;
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
∆IM3
third-order
intermodulation
distance
two output signals at 35 kHz
frequency distance; differential
output level of 200 mV; data
byte CONTROL bit IFGAIN = 0
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
37 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vi(max)(M)
peak maximum input
voltage
1 dB compression point of
IF AGC amplifier output
voltage; data byte CONTROL
bit IFGAIN = 0
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
45
-
-
mV
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
90
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
180
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
360
-
-
mV
Ω
FM mode; inputs: pins FMIFAGCIN1 and IFAGCDEC[12]; outputs: pins IFOUT1 and IFOUT2[11]
Ri
input resistance
-
330
-
Ci
input capacitance
-
5
7
pF
Ro
output resistance
120
210
290
Ω
G
gain
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
28
31
34
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
22
25
28
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
16
19
22
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
10
13
16
dB
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
34
37
40
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
28
31
34
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
22
25
28
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
16
19
22
dB
data byte CONTROL bit
IFGAIN = 0
data byte CONTROL bit
IFGAIN = 1
NF
noise figure
Rsource = 300 Ω; data byte
CONTROL bit IFGAIN = 0;
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
-
6.9
8.5
dB
IP3
third-order intercept
point
data byte CONTROL bit
IFGAIN = 0
110
115
-
dBµV
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
38 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vi(max)(M)
peak maximum input
voltage
1 dB compression point of
IF AGC amplifier output
voltage; data byte CONTROL
bit IFGAIN = 0
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
20
-
-
mV
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
40
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
80
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
160
-
-
mV
FM mode; inputs: pins FMIFAGCIN2 and IFAGCDEC[13]; outputs: pins IFOUT1 and IFOUT2[11]
Ri
-
330
-
Ω
-
5
7
pF
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
28
31
34
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
22
25
28
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
16
19
22
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
10
13
16
dB
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
34
37
40
dB
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
28
31
34
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
22
25
28
dB
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
16
19
22
dB
input resistance
Ci
input capacitance
G
gain
data byte CONTROL bit
IFGAIN = 0
data byte CONTROL bit
IFGAIN = 1
NF
noise figure
Rsource = 300 Ω; data byte
CONTROL bit IFGAIN = 0;
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
-
6.9
8.5
dB
IP3
third-order intercept
point
data byte CONTROL bit
IFGAIN = 0
110
115
-
dBµV
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
39 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 36. Dynamic characteristics …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vi(max)(M)
peak maximum input
voltage
1 dB compression point of
IF AGC amplifier output
voltage; data byte CONTROL
bit IFGAIN = 0
VIFAGCMSB = LOW;
VIFAGCLSB = LOW
20
-
-
mV
VIFAGCMSB = LOW;
VIFAGCLSB = HIGH
40
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = HIGH
80
-
-
mV
VIFAGCMSB = HIGH;
VIFAGCLSB = LOW
160
-
-
mV
Digital inputs and outputs
Input: pins IFAGCMSB and IFAGCLSB
VIL
LOW-level input
voltage
-
-
0.9
V
VIH
HIGH-level input
voltage
1.5
-
-
V
AFHOLD = LOW; Vo = 0.4 V
1.0
-
-
mA
AFSAMPLE = LOW;
Vo = 0.4 V
1.0
-
-
mA
data byte CONTROL bit
FLAG = 1; Vo = 0.4 V
1.0
-
-
mA
Output: pin AFHOLD
Isink(max)
maximum sink current
Output: pin AFSAMPLE
Isink(max)
maximum sink current
Output: pin SWPORT
Isink(max)
maximum sink current
[1]
Differential current on pins FREF1 and FREF2.
[2]
The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.
[3]
Conversion gain formula of DAA1: V DAAOUT 1 =  1.915 × --------- + 0.1 × V tune where n = 0 to 127.


128
[4]
Conversion gain formula of DAA2: V DAAOUT 2 =  0.693 × ------ + 0.7 × V DAAOUT 1 where n = 0 to 15.


16
[5]
The sink current must be limited to 18 mA by the external circuit.
[6]
Input parameters of AM mixer measured between pins AMMIXIN and AMMIXDEC.
[7]
Output parameters of AM mixer measured between pins AMMIXOUT1 and AMMIXOUT2.
[8]
Input parameters of FM mixer measured between pins FMMIXIN1 and FMMIXIN2.
[9]
Output parameters of FM mixer measured between pins FMMIXOUT1 and FMMIXOUT2.
n
n
[10] Input parameters of AM IF amplifier measured between pins AMIFAGCIN and IFAGCDEC.
[11] Output parameters of IF AGC amplifier measured between pins IFOUT1 and IFOUT2.
[12] Input parameters of FM IF amplifier measured between pins FMIFAGCIN1 and IFAGCDEC.
[13] Input parameters of FM IF amplifier measured between pins FMIFAGCIN2 and IFAGCDEC.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
40 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
001aae090
2
∆Gm(conv)(T)
(dB)
∆Gm(T)
(dB)
1
0.5
0
0
−1
−0.5
−2
−40
0
40
80
100
Tamb (°C)
Fig 19. AM LNA transconductance gain deviation over
temperature (including application)
001aae092
0.5
∆Gm(conv)(T)
(dB)
−1.0
−40
0
40
80
100
Tamb (°C)
Fig 20. AM mixer conversion transconductance gain
deviation over temperature (including
application)
001aae093
10
∆Gm(conv)(T)
(dB)
0
5
−0.5
0
−1.0
−5
−1.5
−40
001aae091
1.0
0
40
80
100
Tamb (°C)
Fig 21. FM mixer conversion transconductance gain
deviation over temperature (including
application)
−10
−40
0
40
80
100
Tamb (°C)
Fig 22. Weather band mixer conversion
transconductance gain deviation over
temperature (including application)
13. I2C-bus characteristics
The TEF6730AHW complies with the fast-mode I2C-bus protocol. The maximum I2C-bus
communication speed is 400 kbit/s.
SDA and SCL HIGH and LOW internal thresholds are specified according to an I2C-bus
voltage range from 2.5 V to 3.3 V including I2C-bus voltage tolerances of ±10 %. The
I2C-bus interface tolerates also SDA and SCL signals from a 5 V bus. Restrictions for VIL
in a 5 V application can be derived from Table 37.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
41 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 37.
I2C-bus parameters
Symbol
Parameter
VIL
Conditions
Min
Typ
Max
Unit
LOW-level input
voltage
-
-
1.09
V
VIH
HIGH-level input
voltage
1.56
-
-
V
Ci
capacitance for each
I/O pin
pin SDA
-
4
6
pF
pin SCL
-
3
5
pF
tresp(Q)HL
HIGH-to-LOW data
output response time
acknowledge and read data;
see Figure 23
VDD = 5 V; I = 3 mA;
Cb = 400 pF
-
700
863
ns
VDD = 3.3 V; Rp = 1.8 kΩ;
Cb = 400 pF
-
570
668
ns
VDD = 2.5 V; Rp = 35 kΩ;
Cb = 10 pF
-
520
593
ns
-
450
488
ns
20 + 0.1Cb 10 × VDD
-
ns
20 + 0.1Cb -
250
ns
tresp(Q)LH
LOW-to-HIGH data
output response time
read data; see Figure 23
tof
output fall time from
VIHmin to VILmax
Cb = 10 pF to 120 pF;
see Figure 24
Cb ≥ 120 pF; see Figure 24
[1]
[1][2]
[1]
Minimum value of tof; Cb = total capacitance of one I2C-bus line [pF].
[2]
Typical value of tof; the output fall time tof [ns] depends on the total load capacitance Cb [pF] and the I2C-bus voltage VDD [V]:
tof = 1⁄12 × VDD × Cb.
0.7VDD
SDA
SCL
VIL(max)
VIL(max)
tresp(Q)LH
tresp(Q)HL
001aaf002
a. Data change from LOW to HIGH
001aaf001
b. Data change from HIGH to LOW
Fig 23. Data output response time of the IC
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
42 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
VDD
0.7VDD
0.3VDD
tof
001aab803
Fig 24. Definition of the fall time of the output signal
14. Overall system parameters
Table 38. Overall system parameters
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
AM overall system
fi(RF)
Conditions
RF input frequency
Max
Unit
LW
144
-
288
kHz
522
-
1710
kHz
SW
2.3
-
26.1
MHz
-
10.7
-
MHz
-
50
-
µV
data byte AGC bits WBAGC[1:0] = 00
-
125
-
mV
data byte AGC bits WBAGC[1:0] = 01
-
100
-
mV
data byte AGC bits WBAGC[1:0] = 10
-
75
-
mV
data byte AGC bits WBAGC[1:0] = 11
-
35
-
mV
data byte AGC bits NBAGC[1:0] = 00
-
200
-
mV
data byte AGC bits NBAGC[1:0] = 01
-
170
-
mV
data byte AGC bits NBAGC[1:0] = 10
-
140
-
mV
data byte AGC bits NBAGC[1:0] = 11
-
115
-
mV
-
152
-
dBµV
∆f = 40 kHz
-
130
-
dBµV
∆f = 100 kHz
-
133
-
dBµV
VCC(ripple) / Vaudio; fripple = 100 Hz;
VCC(ripple) = 10 mV (RMS);
Vi(RF) = 1 mV to 1 V
-
40
-
dB
FM standard
65
-
108
MHz
IF frequency
Vsens
sensitivity voltage
(S+N)/N = 26 dB
Vi(RF)
RF input voltage
start level of wideband AGC
peak RF input voltage
start level of narrow-band AGC; m = 0
IP2
second-order intercept point referenced to receiver input
IP3
third-order intercept point
αripple
Typ
MW
fIF
Vi(RF)M
Min
parameters[1]
ripple rejection
referenced to receiver input
FM overall system parameters[2]
fi(RF)
RF input frequency
fIF
IF frequency
weather band
TEF6730A_1
Product data sheet
162.4 -
162.55 MHz
-
-
10.7
MHz
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
43 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 38. Overall system parameters …continued
VCCA = 8.5 V; Tamb = 25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Vsens
sensitivity voltage
BIF = 170 kHz
-
2
-
µV
threshold extension enabled; weak signal
handling enabled (SAF7730 N231)
-
1.1
-
µV
data byte AGC bits WBAGC[1:0] = 00
-
19
-
mV
data byte AGC bits WBAGC[1:0] = 01
-
14
-
mV
data byte AGC bits WBAGC[1:0] = 10
-
10
-
mV
data byte AGC bits WBAGC[1:0] = 11
-
7
-
mV
data byte AGC bits NBAGC[1:0] = 00
-
17
-
mV
data byte AGC bits NBAGC[1:0] = 01
-
14
-
mV
data byte AGC bits NBAGC[1:0] = 10
-
11
-
mV
data byte AGC bits NBAGC[1:0] = 11
-
9
-
mV
Vi(RF)
Vi(RF)M
RF input voltage
peak RF input voltage
start level of wideband AGC
start level of narrow-band AGC; m = 0
IP3
third-order intercept point
∆f = 400 kHz
-
123
-
dBµV
αripple
ripple rejection
VCC(ripple) / Vaudio; fripple = 100 Hz;
VCC(ripple) = 10 mV (RMS); Vi(RF) = 500 µV
-
64
-
dB
[1]
Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3
and nominal maximum IF AGC gain, unless otherwise specified.
[2]
Based on 75 Ω dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 µs, fi(RF) = 97.1 MHz, ∆f = 22.5 kHz,
nominal mixer gain and nominal maximum IF AGC gain, unless otherwise specified.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
44 of 58
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x
47 µF
1 nF
C1
270 pF
22 nF
38
41
53
54
55
56
57
45
52
16, 18, 48, 49
40
VCO
pll
D1
BB208
VP
220 nF
1 nF
37
100 nF
3.3 µH
FREF
VP
22
Ω
sup
VCO
sup
dig
fgnd
i.c.
L1
50 nH
4.7 kΩ
PLL
÷N
3.3 nF
10 kΩ
REF
fref
BAND
÷M
pll in-lock
36
2.2 kΩ
42
flag
39
Φ
35
43
TUNING
STATE
MACHINE
44
3.9
nF 1.2 kΩ
33
100 nF
22 kΩ
Rev. 01 — 21 February 2007
6.8 pF
470 kΩ
10 pF
L2
100
nH
D2
BB207
D3
MIXER
90°
FM
ifagc
ifagc
am/fm
rf agc
MIXER
FM RF
AGC
330 Ω
34
AM RF
AGC
31
61
lna
25
24
23
22
21
14 13 12 11 10 9
VP
560
Ω
680
µH
5
4
3
2
1
64
63
62
22 nF
1 nF
120 pF
BAP70AM
10.7 MHz
F1
1.8 nF
VP
VP
390
µH
VP
220
pF
100 nF
10 nF
1 nF
008aaa059
For list of components see Table 39.
Fig 25. Application diagram of TEF6730AHW
TEF6730A
45 of 58
© NXP B.V. 2007. All rights reserved.
100
nF
430
Ω
6
L6
47 µH
D5
IFAGCLSB
22
nF
µF
100 nF
1
nF
82 Ω
7
1
470 kΩ
10 kΩ
8
100 nF
100 nF
100
nF
6.8 µH
15
IFAGCMSB
ifagc
lna rf
20 19 17
1 µF
KEYED
AGC
60
IFOUT1
IFOUT2
Front-end for digital-IF car radio
1 nF
59
AM LNA
rf
BAP70-02
L5
47 mH
58
IF AGC
30
L4
220 nH
2.2 MΩ
SDA
SCL
WX
27
26
1 nF
D4
51
read
MIXER 90°
BAP70-02
L3
470 nH
50
TEF6730AHW
6.8 pF
2.2 kΩ
address
selection
47
write
4.7 pF
18 pF
address
I2C-BUS
29
28
AFHOLD
46
BUF
tuner
control
32
1
nF
33
pF
CTRL
antenna DAA
AFSAMPLE
NXP Semiconductors
+8.5 V
15. Application information
TEF6730A_1
Product data sheet
VP
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
10 pF
RF input
28
L7
47 nH
12 pF
TEF6730AHW
29
10 pF
008aaa060
Fig 26. Weather band application
Table 39.
List of components for Figure 25 and Figure 26
Symbol Component
Type
Manufacturer
C1
capacitor for VCO tuning
270 pF; type NP0
-
L1
VCO coil
50 nH; E558CNA-100035
TOKO
L2
FM input coil
100 nH; C2520C-R10
SAGAMI
L3
FM antenna coil
470 nH; C2520C-R47
SAGAMI
L4
FM antenna coil
220 nH; C2520C-R22
SAGAMI
L5
AM mains suppression coil
47 mH; 388BN-1211Z
TOKO
L6
10.7 MHz IF coil
PF670CCS-A065DX
TOKO
L7
weather band input coil
47 nH; LQW31H
muRata
D1
VCO variable capacitance diode
BB208
NXP Semiconductors
D2
FM RF selectivity variable
capacitance diode
BB207
NXP Semiconductors
D3
FM PIN diode
BAP70-02
NXP Semiconductors
D4
FM PIN diode
BAP70-02
NXP Semiconductors
D5
AM PIN diode
BAP70AM
NXP Semiconductors
F1
10.7 MHz IF ceramic filter
SFELA10M7HAA0-B0
muRata
TEF6730AHW
IF AGC
FM
330 Ω
330 Ω
AM
11
10
9
8
7
6
5
4
3
2
1
64
22 nF
22 nF
008aaa061
Fig 27. FM and AM mode
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
46 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
TEF6730AHW
IF AGC
FM
330 Ω
330 Ω
AM
11
10
9
8
7
6
5
10
nF
4
3
2
1
64
22
nF
22 nF
FM/AM
FM HD
008aaa062
Fig 28. FM/AM and FM HD mode
TEF6730AHW
IF AGC
FM
330 Ω
330 Ω
AM
11
10
9
8
7
6
5
10
nF
4
3
2
1
64
330 Ω
22 nF
22 nF
FM
AM
008aaa063
Fig 29. FM and AM (narrow band) mode
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
47 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
TEF6730AHW
IF AGC
FM
330 Ω
330 Ω
AM
11
10
9
8
7
6
5
10
nF
4
3
2
1
64
330 Ω
22
nF
22 nF
FM
FM HD
AM and AM HD
008aaa064
Fig 30. FM, AM, AM HD and FM HD mode
16. Test information
Table 40.
DC operating points
Symbol
Pin Unloaded DC voltage (V)
AM mode
FM mode
Min
Typ
Max
Min
Typ
Max
AMIFAGCIN
1
-
2.3
-
-
2.3
-
FMIFAGCIN1
2
-
2.3
-
-
2.3
-
FMIFAGCIN2
3
-
2.3
-
-
2.3
-
IFAGCDEC
4
-
2.3
-
-
2.3
-
SWDEC
5
-
1.4
-
-
1.4
-
CFSW1
6
-
1.4
-
-
1.4
-
CFSW2
7
-
1.4
-
-
1.4
-
FMMIXOUT1
8
external 8.5
external 8.5
AMMIXOUT2
9
external 8.5
external 8.5
FMMIXOUT2
10
external 8.5
external 8.5
AMMIXOUT1
11
external 8.5
external 8.5
0.9
-
VCC(RF)
12
external 8.5
V50LNA
13
-
external 8.5
5.2
-
-
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
48 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 40.
DC operating points …continued
Symbol
Pin Unloaded DC voltage (V)
AM mode
LNAIN
14
FM mode
Min
Typ
Max
Min
Typ
Max
-
1.9
-
-
0.1
-
AGCCNTRL
15
-
4.7
-
-
0.9
-
i.c.
16
-
-
-
-
-
-
LNAOUT
17
-
0
-
-
0
-
i.c.
18
-
-
-
-
-
-
LNAAGCDEC
19
-
5.2
-
-
0.8
-
AMMIXDEC
20
-
3.9
-
floating
AMMIXIN
21
-
3.9
-
floating
TAMAGC
22
-
1.4
-
floating
PINAGCDEC
23
-
1.1
-
-
1.1
-
IAMAGC
24
external biasing
external biasing
RFGND
25
external GND
external GND
FMMIXIN1
26
-
0
-
FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0
FMMIXIN2
27
-
0
-
FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0
WXMIXIN
28
-
0
-
WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0
WXMIXDEC
29
-
0
-
WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0
IFMAGC
30
-
0
-
external biasing
TFMAGC
31
-
0.8
-
-
0.8
-
DAAOUT1
32
0.5
-
VCC(PLL) − 0.6
0.5
-
VCC(PLL) − 0.6
DAAOUT2
33
0.5
-
VCC(PLL) − 0.7
0.5
-
VCC(PLL) − 0.7
KAGC
34
-
6.6
-
-
6.5
-
VTUNE
35
0
-
8.5
0
-
8.5
CPOUT
36
0
-
8.5
0
-
8.5
VCC(PLL)
37
external 8.5
external 8.5
VCOGND
38
external GND
external GND
OSCFDB
39
-
5.8
-
-
5.8
-
OSCTNK
40
-
5.8
-
-
5.8
-
VCC(VCO)
41
external 8.5
external 8.5
SWPORT
42
external
external
AFSAMPLE
43
-
0
-
-
0
-
AFHOLD
44
-
5
-
-
5
-
FGND
45
external GND
external GND
ADDR2
46
external 8.5 or external GND
external 8.5 or external GND
ADDR1
47
external 8.5 or external GND
i.c.
48
-
i.c.
49
-
SDA
50
external
I2C-bus
I2C-bus
SCL
51
external
DGND
52
external GND
external 8.5 or external GND
-
-
-
-
-
-
voltage
voltage
-
-
-
external
I2C-bus
voltage
external
I2C-bus
voltage
external GND
TEF6730A_1
Product data sheet
-
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
49 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
Table 40.
DC operating points …continued
Symbol
Pin Unloaded DC voltage (V)
AM mode
FM mode
Min
Typ
Max
Min
Typ
Max
1.2
-
-
1.2
-
FREF1
53
-
FREF2
54
-
1.2
-
-
1.2
-
VREF
55
4.1
4.3
4.5
4.1
4.3
4.5
GND
56
external GND
external GND
VCC
57
external 8.5
external 8.5
IFOUT1
58
-
5.5
-
-
5.5
-
IFOUT2
59
-
5.5
-
-
5.5
-
IFAGCMSB
60
external 0 or external 3.3
external 0 or external 3.3
IFAGCLSB
61
external 0 or external 3.3
external 0 or external 3.3
VCC(IF)
62
external 8.5
external 8.5
IFGND
63
external GND
external GND
IFAGCBIAS
64
-
2.3
-
-
TEF6730A_1
Product data sheet
2.3
-
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
50 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
17. Package outline
HTQFP64: plastic thermal enhanced thin quad flat package; 64 leads; body 10 x 10 x 1 mm; exposed die pad
SOT855-1
c
y
exposed die pad
X
Dh
A
48
33
49
ZE
32
e
Eh
E
w
HE
(A 3)
A A2
θ
M
A1
bp
Lp
L
detail X
pin 1
index
64
17
1
16
w
bp
e
v
ZD
M
D
M
A
B
v
HD
0
M
B
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
A2
A3
bp
c
D (1)
Dh
E (1)
Eh
e
mm
1.2
0.12
0.05
1.05
0.95
0.25
0.27
0.17
0.18
0.12
10.1
9.9
4.7
4.5
10.1
9.9
4.7
4.5
0.5
HD
HE
12.15 12.15
11.85 11.85
L
Lp
v
w
y
1
0.75
0.45
0.2
0.08
0.1
ZD(1) ZE(1)
θ
1.45
1.05
7°
0°
1.45
1.05
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included
OUTLINE
VERSION
SOT855-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-05-18
05-05-11
MS-026
Fig 31. Package outline SOT855-1 (HTQFP64)
TEF6730A_1
Product data sheet
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Rev. 01 — 21 February 2007
51 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
18. Soldering
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
18.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
18.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus PbSn soldering
18.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
52 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
18.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 32) than a PbSn process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 41 and 42
Table 41.
SnPb eutectic process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
≥ 350
< 2.5
235
220
≥ 2.5
220
220
Table 42.
Lead-free process (from J-STD-020C)
Package thickness (mm)
Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 32.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
53 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 32. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
54 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
19. Footprint for soldering
13.650 (2 ×)
12.200 (2 ×)
10.400 (4 ×)
9.035 (4 ×)
7.900 (4 ×)
0.1425
(8 ×)
0.400 (3 ×)
0.285
(8 ×)
4.700
(2 ×)
4.800
(2 ×)
0.400
(3 ×)
0.500
0.285
(56 ×)
10.250 (2 ×)
solder land
12.400 (2 ×)
solder paste deposit
solder land plus solder paste
placement area
occupied area
Dimensions in mm
SOT855-1
Fig 33. Footprint
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
55 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
20. Abbreviations
Table 43.
Abbreviations
Acronym
Description
ADC
Analog-to-Digital Converter
AF
Alternative Frequency
AFU
Alternative Frequency Updating
AGC
Automatic Gain Control
DAA
Digital Auto Alignment
DSP
Digital Signal Processor
DX
Distance
HD
High Definition
IF
Intermediate Frequency
LNA
Low Noise Amplifier
LO
Local Oscillator
LSB
Least Significant Bit
LW
Long Wave
MSB
Most Significant Bit
MW
Medium Wave
PIN
Positive Intrinsic Negative
PLL
Phase-Locked Loop
RF
Radio Frequency
SCL
Serial Clock
SDA
Serial Data
SW
Short Wave
VCO
Voltage-Controlled Oscillator
WB
Weather Band
21. Revision history
Table 44.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TEF6730A_1
20070221
Product data sheet
-
-
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
56 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
22. Legal information
22.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
22.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
22.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
22.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
23. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
TEF6730A_1
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 01 — 21 February 2007
57 of 58
TEF6730A
NXP Semiconductors
Front-end for digital-IF car radio
24. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
8.1
8.1.1
8.1.2
8.2
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.7.1
8.2.8
9
10
11
12
13
14
15
16
17
18
18.1
18.2
18.3
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pinning information . . . . . . . . . . . . . . . . . . . . . . 6
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional description . . . . . . . . . . . . . . . . . . . 8
FM mixer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
FM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Antenna DAA1 and DAA2. . . . . . . . . . . . . . . . . 8
AM LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
AM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
AM mixer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
VCO and dividers . . . . . . . . . . . . . . . . . . . . . . . 9
Tuning PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
AM/FM IF AGC amplifier. . . . . . . . . . . . . . . . . . 9
2
I C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . 9
Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Read mode: data byte TUNER . . . . . . . . . . . . 10
Read mode: data byte ID . . . . . . . . . . . . . . . . 11
Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Mode and subaddress byte for write. . . . . . . . 16
Write mode: data byte CONTROL . . . . . . . . . 22
Write mode: data byte PLLM . . . . . . . . . . . . . 23
Write mode: data byte PLLL . . . . . . . . . . . . . . 23
Write mode: data byte DAA . . . . . . . . . . . . . . 23
Write mode: data byte AGC . . . . . . . . . . . . . . 24
Write mode: data byte BAND . . . . . . . . . . . . . 25
Tuning overview . . . . . . . . . . . . . . . . . . . . . . . 26
Write mode: data byte TEST . . . . . . . . . . . . . 26
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal characteristics. . . . . . . . . . . . . . . . . . 27
Static characteristics. . . . . . . . . . . . . . . . . . . . 28
Dynamic characteristics . . . . . . . . . . . . . . . . . 29
I2C-bus characteristics . . . . . . . . . . . . . . . . . . 41
Overall system parameters . . . . . . . . . . . . . . . 43
Application information. . . . . . . . . . . . . . . . . . 45
Test information . . . . . . . . . . . . . . . . . . . . . . . . 48
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 51
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Introduction to soldering . . . . . . . . . . . . . . . . . 52
Wave and reflow soldering . . . . . . . . . . . . . . . 52
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 52
18.4
19
20
21
22
22.1
22.2
22.3
22.4
23
24
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . .
Footprint for soldering . . . . . . . . . . . . . . . . . .
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 21 February 2007
Document identifier: TEF6730A_1
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