PBSS4032PD 30 V, 2.7 A PNP low VCEsat (BISS) transistor Rev. 01 — 27 January 2010 Product data sheet 1. Product profile 1.1 General description PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74) small Surface-Mounted Device (SMD) plastic package. NPN complement: PBSS4032ND. 1.2 Features Low collector-emitter saturation voltage VCEsat Optimized switching time High collector current capability IC and ICM High collector current gain (hFE) at high IC High energy efficiency due to less heat generation AEC-Q101 qualified Smaller required Printed-Circuit Board (PCB) area than for conventional transistors 1.3 Applications DC-to-DC conversion Battery-driven devices Power management Charging circuits 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - −30 V IC collector current - - −2.7 A ICM peak collector current single pulse; tp ≤ 1 ms - - −5 A RCEsat collector-emitter saturation resistance IC = −3 A; IB = −300 mA - 88 130 mΩ [1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02. [1] PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 2. Pinning information Table 2. Pinning Pin Description 1 collector 2 collector 3 base 4 emitter 5 collector 6 collector Simplified outline 6 Graphic symbol 4 5 1, 2, 5, 6 3 1 2 3 4 sym030 3. Ordering information Table 3. Ordering information Type number PBSS4032PD Package Name Description Version SC-74 plastic surface-mounted package; 6 leads SOT457 4. Marking Table 4. Marking codes Type number Marking code PBSS4032PD ZG 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - −30 V VCEO collector-emitter voltage open base - −30 V VEBO emitter-base voltage open collector - −5 V IC collector current - −2.7 A ICM peak collector current - −5 A IB base current - −0.5 A single pulse; tp ≤ 1 ms PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 2 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Parameter Conditions total power dissipation Tamb ≤ 25 °C Min Max Unit [1] - 480 mW [2] - 750 mW [3] - 1 W Tj junction temperature - 150 °C Tamb ambient temperature −55 +150 °C Tstg storage temperature −65 +150 °C [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint. 006aab931 1200 Ptot (mW) 800 (1) (2) (3) 400 0 −75 −25 25 75 125 175 Tamb (°C) (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 6 cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 3 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient Rth(j-a) in free air Min Typ Max Unit [1] - - 260 K/W [2] - - 160 K/W [3] - - 125 K/W - - 45 K/W thermal resistance from junction to solder point Rth(j-sp) [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. [3] Device mounted on a ceramic PCB, Al2O3, standard footprint. 006aab932 103 Zth(j-a) (K/W) duty cycle = 1 0.75 102 0.5 0.33 0.2 0.1 0.05 10 0.02 0.01 0 1 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 4 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 006aab933 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, mounting pad for collector 6 cm2 Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 006aab934 103 Zth(j-a) (K/W) duty cycle = 1 102 0.75 0.5 0.33 0.2 0.1 10 0.05 0.02 1 0.01 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) Ceramic PCB, Al2O3, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 5 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter ICBO Conditions collector-base cut-off VCB = −30 V; IE = 0 A current VCB = −30 V; IE = 0 A; Tj = 150 °C Typ Max Unit - - −100 nA - - −55 μA ICES collector-emitter cut-off current VCE = −24 V; VBE = 0 V - - −100 nA IEBO emitter-base cut-off current VEB = −5 V; IC = 0 A - - −100 nA hFE DC current gain VCE = −2 V; IC = −500 mA [1] 200 350 - VCE = −2 V; IC = −1 A [1] 200 300 - VCE = −2 V; IC = −2 A [1] 100 160 - VCE = −2 V; IC = −4 A [1] 25 40 - - −87 −130 mV VCEsat collector-emitter saturation voltage IC = −500 mA; IB = −50 mA IC = −1 A; IB = −50 mA [1] - −140 −210 mV IC = −1 A; IB = −10 mA [1] - −205 −300 mV IC = −2 A; IB = −40 mA [1] - −280 −420 mV IC = −2 A; IB = −200 mA [1] - −170 −255 mV IC = −3 A; IB = −300 mA [1] - −265 −395 mV RCEsat collector-emitter IC = −3 A; IB = −300 mA saturation resistance [1] - 88 130 mΩ VBEsat base-emitter saturation voltage IC = −1 A; IB = −100 mA [1] - −0.83 −0.9 V IC = −3 A; IB = −300 mA [1] - −1.11 −1.2 V VBEon base-emitter turn-on voltage VCE = −2 V; IC = −2 A - −0.85 −0.95 V VCC = −12.5 V; IC = −1 A; IBon = −0.05 A; IBoff = 0.05 A - 20 - ns - 55 - ns - 75 - ns - 130 - ns td delay time tr rise time ton turn-on time ts storage time tf fall time - 80 - ns toff turn-off time - 210 - ns fT transition frequency - 104 - MHz Cc collector capacitance VCB = −10 V; IE = ie = 0 A; f = 1 MHz - 59 - pF [1] VCE = −10 V; IC = −100 mA; f = 100 MHz Pulse test: tp ≤ 300 μs; δ ≤ 0.02. PBSS4032PD_1 Product data sheet Min © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 6 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 006aab943 800 hFE 006aab944 −4.0 IC (A) (1) IB (mA) = −50 −40 −3.0 600 −30 −20 (2) −2.0 400 −45 −35 −25 −15 −10 −5 (3) −1.0 200 0 −10−1 −1 −10 −102 0.0 0.0 −103 −104 IC (mA) VCE = −2 V −1.0 −2.0 −3.0 −4.0 −5.0 VCE (V) Tamb = 25 °C (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Fig 5. DC current gain as a function of collector current; typical values 006aab945 −1.6 VBE (V) Fig 6. Collector current as a function of collector-emitter voltage; typical values 006aab946 −1.4 VBEsat (V) −1.2 −1.1 (1) −0.8 (1) −0.8 (2) (2) (3) −0.4 −0.5 0.0 −10−1 −1 −10 −102 −103 −104 IC (mA) (3) −0.2 −10−1 VCE = −2 V −1 −103 −104 IC (mA) (1) Tamb = −55 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C Base-emitter voltage as a function of collector current; typical values Fig 8. Base-emitter saturation voltage as a function of collector current; typical values PBSS4032PD_1 Product data sheet −102 IC/IB = 20 (1) Tamb = −55 °C Fig 7. −10 © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 7 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 006aab947 −1 VCEsat (V) 006aab948 −1 VCEsat (V) (1) −10−1 −10−1 (1) (2) (2) (3) −10−2 −10−1 −1 −10 (3) −102 −103 −104 IC (mA) −10−2 −10−1 −1 −102 −103 −104 IC (mA) Tamb = 25 °C IC/IB = 20 (1) Tamb = 100 °C (1) IC/IB = 100 (2) Tamb = 25 °C (2) IC/IB = 50 (3) Tamb = −55 °C (3) IC/IB = 10 Fig 9. −10 Collector-emitter saturation voltage as a function of collector current; typical values 006aab949 103 RCEsat (Ω) 102 Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values 006aab950 104 RCEsat (Ω) 103 102 10 10 (1) 1 (1) (2) (2) 1 10−1 (3) 10−2 −10−1 −1 −10 −102 10−1 −103 −104 IC (mA) (3) 10−2 10−1 1 102 103 104 IC (mA) Tamb = 25 °C IC/IB = 20 (1) Tamb = 100 °C (1) IC/IB = 100 (2) Tamb = 25 °C (2) IC/IB = 50 (3) Tamb = −55 °C (3) IC/IB = 10 Fig 11. Collector-emitter saturation resistance as a function of collector current; typical values Fig 12. Collector-emitter saturation resistance as a function of collector current; typical values PBSS4032PD_1 Product data sheet 10 © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 8 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 8. Test information − IB input pulse (idealized waveform) 90 % − I Bon (100 %) 10 % − I Boff output pulse (idealized waveform) − IC 90 % − I C (100 %) 10 % t td ts tr t on tf t off 006aaa266 Fig 13. BISS transistor switching time definition VBB RB VCC RC Vo (probe) oscilloscope 450 Ω (probe) 450 Ω oscilloscope R2 VI DUT R1 mgd624 Fig 14. Test circuit for switching times 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 9 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 9. Package outline 3.1 2.7 6 3.0 2.5 1.7 1.3 1.1 0.9 5 4 2 3 0.6 0.2 pin 1 index 1 0.40 0.25 0.95 0.26 0.10 1.9 Dimensions in mm 04-11-08 Fig 15. Package outline SOT457 (SC-74) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description PBSS4032PD SOT457 [1] 3000 10000 4 mm pitch, 8 mm tape and reel [2] -115 -135 4 mm pitch, 8 mm tape and reel [3] -215 -235 For further information and the availability of packing methods, see Section 14. [2] T1: normal taping [3] T2: reverse taping PBSS4032PD_1 Product data sheet Packing quantity © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 10 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 11. Soldering 3.45 1.95 0.45 0.55 (6×) (6×) 0.95 solder lands solder resist 3.3 2.825 0.95 solder paste occupied area 0.7 (6×) Dimensions in mm 0.8 (6×) 2.4 sot457_fr Fig 16. Reflow soldering footprint SOT457 (SC-74) 5.3 1.5 (4×) solder lands 1.475 0.45 (2×) 5.05 solder resist occupied area 1.475 Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 sot457_fw Fig 17. Wave soldering footprint SOT457 (SC-74) PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 11 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 12. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PBSS4032PD_1 20100127 Product data sheet - - PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 12 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. 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Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PBSS4032PD_1 Product data sheet © NXP B.V. 2010. All rights reserved. Rev. 01 — 27 January 2010 13 of 14 PBSS4032PD NXP Semiconductors 30 V, 2.7 A PNP low VCEsat (BISS) transistor 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Quality information . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing information . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 27 January 2010 Document identifier: PBSS4032PD_1