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AM7321P
Analog Power
P-Channel 20-V (D-S) MOSFET
These miniature surface mount MOSFETs utilize a
high cell density trench process to provide low
rDS(on) and to ensure minimal power loss and heat
dissipation. Typical applications are DC-DC
converters and power management in portable and
battery-powered products such as computers,
printers, PCMCIA cards, cellular and cordless
telephones.
PRODUCT SUMMARY
VDS (V)
rDS(on) m(Ω)
14 @ VGS = -4.5V
-20
19 @ VGS = -2.5V
ID (A)
-13
-12
DFN3x3-8PP
Top View
S
•
•
•
•
Low rDS(on) provides higher efficiency and
extends battery life
Low thermal impedance copper leadframe
DFN3x3-8PP saves board space
Fast switching speed
High performance trench technology
S
1
8
D
S
2
D
S
G
3
4
7
6
5
G
D
D
D
P-Channel MOSFET
o
ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED)
Parameter
Symbol Maximum Units
VDS
Drain-Source Voltage
-20
V
±8
Gate-Source Voltage
VGS
o
TA=25 C
a
Continuous Drain Current
o
-13
ID
TA=70 C
b
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
a
IDM
±50
IS
-2.1
o
TA=25 C
a
Power Dissipation
o
THERMAL RESISTANCE RATINGS
Parameter
a
MaximumJunction-to-Ambient
Steady State
W
2.0
o
TJ, Tstg -55 to 150
Symbol
t <= 10 sec
A
3.5
PD
TA=70 C
Operating Junction and Storage Temperature Range
A
-11
RθJA
C
Maximum Units
o
35
C/W
81
o
C/W
Notes
a.
Surface Mounted on 1” x 1” FR4 Board.
b.
Pulse width limited by maximum junction temperature
1
PRELIMINARY
Publication Order Number:
DS-AM7321_B
AM7321P
Analog Power
SPECIFICATIONS (TA = 25oC UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Conditions
VGS(th)
VDS = VGS, ID = -250 uA
Limits
Unit
Min Typ Max
Static
Gate-Threshold Voltage
IGSS
Gate-Body Leakage
Zero Gate Voltage Drain Current
A
On-State Drain Current
A
Drain-Source On-Resistance
Forward Tranconductance
A
Diode Forward Voltage
IDSS
-1
V
VDS = 0 V, VGS = ±8 V
±100
VDS = -16 V, VGS = 0 V
-1
VDS = -16 V, VGS = 0 V, TJ = 55oC
-5
nA
uA
ID(on)
VDS = -5 V, VGS = -10 V
rDS(on)
VGS = -4.5 V, ID = -11.5 A
VGS = -2.5 V, ID = -9.3 A
gfs
VDS = -15 V, ID = -11.5 A
29
S
VSD
IS = 2.5 A, VGS = 0 V
-0.8
V
-50
A
14
19
mΩ
b
Dynamic
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
td(on)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall-Time
tr
td(off)
25
VDS = -15 V, VGS = -4.5 V,
ID = -11.5 A
11
17
2300
VDS=-15V, VGS=0V, f=1MHz
600
pF
300
15
VDD = -15 V, RL = 6 Ω ,
ID = -1 A, VGEN = -10 V
tf
13
100
54
Notes
a.
Pulse test: PW <= 300us duty cycle <= 2%.
b.
Guaranteed by design, not subject to production testing.
Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by
customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed,
intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur.
Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its
officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer.
2
PRELIMINARY
nC
Publication Order Number:
DS-AM7321_B
nS
AM7321P
Analog Power
Typical Electrical Characteristics (P-Channel)
0.03
-5 0
4 V t hru 1 0 v
-4 0
0.026
RDS(ON) (Ω)
3 .5 V
-3 0
-2 0
3V
-1 0
0.022
Vgs = 2.5V
0.018
Vgs = 4.5V
0.014
2 .5 V
0.01
0
0
-1
-2
0
-3
VDS - Dra in to S o urc e Vo lta ge (V)
Normalized RDS (on)
0 .05
VGS =10V
ID =11.5A
0 .04
(Ω)
1.4
1.3
-20
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage
Figure 1. On-Region Characteristics
1.6
1.5
-4
-8
-12
-16
I D - Drain Current (A)
1.2
1.1
1.0
0 .03
ID = 1 1.5 a
0 .02
R
0.9
0.8
0 .01
0.7
0.6
0
-50
-25
0
25
50
75
0
2 Forward
4
6
8
10
Figure 6. Body
Diode
Voltage
Variation
100 125 150
GS - Gate
Source Voltage
with Source V
Current
and to
Temperature
T J - Juncation T emperature (ºC)
(V)
Figure 4. On-Resistance with Gate to Source Voltage
Figure 3. On-Resistance Variation with Temperature
-50
100
10
I - Drain Current (A)
IS - Source Current (A)
25C
TJ = 150°C
TJ = 25°C
1
-40
125C
-55C
-30
-20
-10
0
0
0.1
0
0.2
0.4
0.6
0.8
1
1.2
-1
-2
-3
-4
-5
VGS - Gate to Source Voltage (V)
VSD - Source to Drain Current (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
3
PRELIMINARY
Publication Order Number:
DS-AM7321_B
AM7321P
Analog Power
Typical Electrical Characteristics (P-Channel)
4 00 0
Vgs Gate-Source Voltage ( V )
-5
ID=11.5a
Capacit ance (pF)
-4
-3
-2
-1
CISS
3 00 0
2 00 0
CRSS
0
0
0
8
16
24
32
40
0
-5
-1 0
-2 0
Figure 8. Capacitance Characteristics
50
45
40
0.8
0.6
35
30
25
20
15
0.4
Power (W)
Variance (V)
-1 5
VDS (V)
Q g, Charge (nC)
Figure 7. Gate Charge Characteristics
0.2
0
V
COSS
1 00 0
-0.2
10
5
0
0.01
-0.4
-50
-25
0
25
50
75
100
125 150
T J - Juncation T emperature (ºC)
0.1
1
10
100
1000
Pulse T ime (S)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
Normalized Thermal Transient Junction to Ambient
1
0.5
0.2
0.2
P DM
0.1
0.1
t1
t2
0.05
0.02
1. Duty Cycal D = t1/t2
2. Per Unit Bas e RθJ A =70C/W
3. TJ M - T A = PDM Zθjc
4. Sureface Mounted
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
Square Wave Pulse Duration (S)
Figure 11. Transient Thermal Response Curve
4
PRELIMINARY
Publication Order Number:
DS-AM7321_B
AM7321P
Analog Power
Package Information
5
PRELIMINARY
Publication Order Number:
DS-AM7321_B