A8512 Datasheet

A8512
LED Backlight Driver for LCD Monitors and Televisions
Features and Benefits
Description
The A8512 is a multi-output WLED/RGB driver for
backlighting LCD monitors and televisions. It integrates a boost
controller to drive external MOSFET, and six internal currentsinks. The boost converter operates in constant frequency
(programmable) current mode control.
▪ Six integrated high current sinks
▪ Fixed frequency current mode control with integrated gate driver
▪ 300 kHz to 1 MHz adjustable switching frequency
▪ Controlled startup using options of Enable, PWM signal, or
battery voltage ramp
▪ Parallel operation with one boost controller (master) and up to
five slave controllers
▪ Active current sharing between LED strings for ±0.6% accuracy
and matching
▪ No audible MLCC noise during PWM dimming
▪ Adjustable overvoltage protection (OVP)
▪ Open or shorted LED string protection
▪ Overtemperature, cycle-by-cycle current limit, and
undervoltage protection
▪ SOIC 24-pin package for easy single-side PCB manufacturing,
or TSSOP 24-pin and QFN 28-contact packages with exposed
thermal pad for better thermal performance
PWM dimming allows LED currents to be controlled in 500:1
ratio. The LED sink current is set by an external R_ISET resistor
(see chart below). More than one LED sinks can be combined
together to achieve even higher current per LED string. Multiple
A8512s can be connected in parallel, with one master controller
controlling the boost stage, and up to five slave controllers,
which act as LED sinks. This allows up to 36 LED strings to
be powered by just one boost converter.
The A8512 operates from a single supply of 8 to24 V. It provides
protection against overvoltage, open or shorted LED string,
and overtemperature. A dual level cycle-by-cycle current limit
function provides soft start and protects against overloads.
Packages:
24-pin SOICW
with internally fused pins
(LB package)
24-pin TSSOP
with exposed thermal pad
(LP package)
28-contact QFN
with exposed thermal pad
(ET Package)
The device is provided in a 24-pin SOICW package (LB), with
internally fused pins for enhanced thermal dissipation, and a
28-contact 5 mm × 5 mm QFN package (ET) and a 24-pin
TSSOP package (LP), both with an exposed thermal pad for
enhanced thermal dissipation. All packages are lead (Pb) free,
with 100% matte tin leadframe plating.
Not to scale
Typical Application Circuit
18 LEDs per string
L1
C1
C2
Q1
ROVP1
P
P
C3
C5
Fault
FAULT
Enable
A8512
EN
PWM
PWM
COMP
RFSET
RISET
ISET
VREG7V
Rz1
Cz1
FSET
C6
LED Current versus ISET Resistor Value
ROVP2
C4
VBAT
DRIVER SENSE1 SENSE2
VIN
VBIAS
C7
LED1
FAULT
LED2
Master
A8512
EN
PWM
LED3
COMP
RFSET
LED4
RISET
LED5
LED6
Cz2
ISET
VREG7V
Rz2
AGND AGND LGND LGND PGND
FSET
C8
120
OVP
110
100
LED1
LED2
Slave A
VREF = 1.24 V, Gain = 640
130
P
P
DRIVER SENSE1 SENSE2 OVP
VIN
VBIAS
R1
18 LEDs per string
VOUT
D1
RSC
ILED (mA)
VBAT
8 to 24 V
LED3
90
80
70
LED4
60
LED5
50
40
LED6
30
AGND AGND LGND LGND PGND
20
P
Control Bus
P
To additional slaves
6
8
10
12
14
16 18 20
RISET (kΩ)
Figure 1. Typical application circuit for single IC operation, and (in dotted box) master/slave multiple IC operation.
A8512L-DS, Rev.7
22
24
26
28
30
A8512
LED Backlight Driver for LCD Monitors and Televisions
Selection Guide
Part Number
Packing
Package
A8512ELBTR-T1
1000 pieces per 13-in. reel
A8512ELPTR-T
4000 pieces per 13-in. reel
A8512EETTR-T
1500 pieces per 7-in. reel
24-pin SOICW, with internally fused pins for enhanced
thermal dissipation
24-pin TSSOP, with exposed thermal pad for enhanced
thermal dissipation
28-contact QFN, with exposed thermal pad for enhanced
thermal dissipation
1 Variant is no longer in production. The device should not be purchased for new design applications. Samples are no longer available.
Date of status change: December 1, 2015
Absolute Maximum Ratings
Characteristic
VIN Pin Input Voltage
Symbol
Notes
Rating
Unit
VIN
–0.3 to 34
V
LED1-LED6 Pin Voltage
VLEDx
–0.3 to 40
V
OVP Pin Input Voltage
VOVP
–0.3 to 50
V
SENSE1 and SENSE2 Pin Input
Voltage
VSENx
–0.3 to 1
V
VBIAS, VREG7V, and DRIVER Pins
–0.3 to 10
V
Remaining Pins Input Voltage
–0.3 to 7
V
Operating Ambient Temperature
TA
–40 to 85
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Range E
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic
Package Thermal Resistance
Symbol
RθJA
Value
Unit
Package ET, 4-layer PCB, based on JEDEC standard
Test Conditions*
32
ºC/W
Package LB, on 2-layer PCB, 1-in.2 2-oz copper exposed area
51
ºC/W
Package LB, on 4-layer PCB, based on JEDEC standard
35
ºC/W
Package LP, on 4-layer PCB, based on JEDEC standard
28
ºC/W
*Additional thermal information available on the Allegro website
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A8512
LED Backlight Driver for LCD Monitors and Televisions
Functional Block Diagram
L1
D1
VIN
Q1
P
VIN
DRIVER
FSET
SENSE1
RSC
P
SENSE2
Current Mode
Boost
Controller
OSC
RFSET
ROVP
P
OVP
Overvoltage
Protection
Ref
COMP
OCP SS
CCOMP
RISET
Control and
Feedback
ISET
EN
LDO
7V
0.1 µF
10 kΩ
VBIAS
0.1 µF
LED2
LED3
50 kΩ
+5 V
LED1
Reference
Current
PWM
VREG7V
6
Control
Logic/
UVLO
OVP
OCP
LED Select
Logic
6
Open/Short
LED Detect
6
LED4
LED5
TSD
5V
LED6
FAULT
ET and LP Only
PAD
PGND AGND AGND
DGND LGND LGND
P
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A8512
LED Backlight Driver for LCD Monitors and Televisions
22 LED6
23 FAULT
24 PWM
25 DGND
26 EN
27 NC
28 PGND
Pin-out Diagrams
24 PWM
EN 1
24 DGND
EN 1
23 FAULT
PGND 2
23 PWM
PGND 2
1
21 LED5
DRIVER 3
22 LED6
DRIVER 3
22 FAULT
2
20 LED4
VREG7V 4
21 LED5
VREG7V 4
21 LED6
NC
3
19 LGND
VIN 5
20 LED4
VIN 5
20 LED5
VIN
4
AGND 6
19 LGND
VBIAS 6
NC
5
17 LED3
AGND 7
18 LGND
NC 7
VBIAS
6
16 LED2
VBIAS 8
17 LED3
OVP 8
17 LED3
OVP
7
15 LED1
OVP 9
16 LED2
SENSE2 9
16 LED2
SENSE2 10
15 LED1
SENSE1 10
15 LED1
SENSE1 11
14 COMP
COMP 14
FSET 13
18 LGND
AGND 12
AGND 11
ISET 10
SENSE2
9
PAD
8
VREG7V
SENSE1
DRIVER
Package ET
18 LGND
13 FSET
AGND 12
Package LB
19 LED4
14 COMP
ISET 11
13 FSET
ISET 12
PAD
Package LP
Terminal List Table
Number
ET
LB
LP
Name
Function
26
1
1
EN
28
2
2
PGND
Device Enable. Apply logic-high signal to enable, low to shut down.
1
3
3
DRIVER
Gate driver terminal to drive external MOSFET.
2
4
4
VREG7V
Gate driver supply from internal voltage regulator. Bypass with 0.1 to 1 µF ceramic capacitor to PGND.
Power ground for external FET gate driver. Connect directly to RSC ground and to common star ground.
4
5
5
VIN
11, 12
6, 7
12
AGND
Input supply voltage for the IC.
Analog (signal) GND for the IC. Connect to common star ground.
6
8
6
VBIAS
Bias supply voltage from internal regulator. Bypass with 0.1 to 1 µF ceramic capacitor to AGND
7
9
8
OVP
Overvoltage Protection terminal. Connect this pin to output capacitor through a resistor ROVP to set the
OVP threshold.
8
10
9
SENSE2
Connect to ground side of current sense resistor RSC.
9
11
10
SENSE1
Connect to high side of current sense resistor RSC.
10
12
11
ISET
Sets 100% Current through LED strings; connect RISET from ISET to AGND.
13
13
13
FSET
Sets switching frequency; connect RFSET from FSET to AGND.
14
14
14
COMP
Compensation pin; connect CCOMP (1 μF typical) capacitor to AGND.
15,16,17
15,16,17
15,16,17
LED1-3
LED current sinks; connect unused LEDx pins to ground to disable.
18,19
18,19
18
LGND
20,21,22
20,21,22
19,20,21
LED4-6
LED current sinks; connect unused LEDx pins to ground to disable.
LED current sink ground; connect to common star ground.
23
23
22
¯Ū¯L̄¯ T̄¯ F̄¯ Ā This open-drain output is pulled low when fault condition occurs; connect to external pull-up resistor.
24
24
23
PWM
Pulse width modulation LED-current control; apply logic level PWM for dimming.
25
–
24
DGND
Digital ground for input control signals (EN and PWM); connect to common star ground.
3,5,27
–
7
NC
Not connected electrically.
PAD
–
PAD
PAD
Exposed pad. Solder to GND plane for enhanced thermal dissipation.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A8512
LED Backlight Driver for LCD Monitors and Televisions
ELECTRICAL CHARACTERISTICS Valid at VIN = 12 V; TA = 25°C, RFSET = 52 kΩ, RISET = 12.4 kΩ, except
specifications guaranteed over the full operating temperature range with TA = TJ , unless otherwise noted
Characteristics
Input Voltage Range
Symbol
Test Conditions
VIN
indicates
Min.
Typ.1
Max.
Unit
8
–
24
V
Internal Bias Voltage Range
VBIAS
4.75
–
5.5
V
Internal Gate Driver Voltage
VDRIVER
VIN ≥ 10 V
6.5
–
8
V
Undervoltage Lockout Threshold for VIN
VUVLO
VIN falling
5.7
6.5
6.8
V
Undervoltage Lockout Hysteresis for VIN
VUVLOHYS
Supply Current2
IVIN
–
0.55
–
V
Switching at no load
–
7
–
mA
Shutdown, EN = VIL, TA = 25°C
–
0.1
1
µA
Standby, EN = VIH, PWM = VIL, soft start
completed
–
2
3
mA
0.8
1
1.25
MHz
Boost Controller
Switching Frequency
fSW
Minimum Switch Off-Time
toff(min)
Driver output
–
72
–
ns
Minimum Switch On-Time
ton(min)
Driver output
–
72
–
ns
Logic Input Levels (EN and PWM pins)
Input Voltage Level Low
VIL
–
–
0.4
V
Input Voltage Level High
VIH
1.5
–
–
V
EN = PWM = 5 V
–
100
–
µA
Input Leakage
Current2
IIN
Error Amplifier
COMP Pin Source Current
IEA(src)
VCOMP = 1.5 V
–
160
–
µA
COMP Pin Sink Current
IEA(snk)
VCOMP = 1.5 V
–
20
–
µA
–
1000
–
kΩ
COMP Pin Pull-Down Resistance
RCOMPPD
¯Ū¯L̄¯ T̄¯ = 0
F̄¯ Ā Driver Section
Peak Source Current5
Ipk(src)
Measured at VDRIVER = 0 V
–
2
–
A
Peak Sink Current5
Ipk(snk)
Measured at VDRIVER = VREG7V
–
2
–
A
High Side Gate Drive On Resistance
RDS(on)H
Measured at VDRIVER = VREG7V / 2
–
4
–
Ω
Low Side Gate Drive On Resistance
RDS(on)L
Measured at VDRIVER = VREG7V / 2
–
3
–
Ω
VSEN
VSENSE1 – VSENSE2
80
95
110
mV
VLEDx
ILED = 80 mA
–
1.4
–
V
ISET to ILEDx Current Gain
AISET
ISET = 100 µA
–
640
–
A/A
ISET Pin Voltage
VISET
–
1.235
–
V
ISET
41
–
190
µA
Sense Overcurrent Threshold Voltage
LED Current Sinks
LEDx Pin Regulation Voltage
ISET Allowable Current
Range2
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A8512
LED Backlight Driver for LCD Monitors and Televisions
ELECTRICAL CHARACTERISTICS (continued) Valid at VIN = 12 V; TA = 25°C, RFSET = 52 kΩ, RISET = 12.4 kΩ, except
indicates specifications guaranteed over the full operating temperature range with TA = TJ , unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.1
Max.
Unit
LEDx Accuracy3
ErrILEDX
LED1 through LED6 = 1.5 V, at 100% Current
–3
±0.6
3
%
LEDx Matching­4
ΔILEDX
LED1 through LED6 = 1.5 V, ISET = 100 µA
–3
±0.6
3
%
LEDx Switch Leakage Current2
ISL
VLEDx = 12 V, EN = 0
–
48
–
µA
LEDx Bleeder Resistor to GND
RLEDX
PWM = Low, VLEDx = 10 V
–
250
–
kΩ
Soft Start Sense Threshold Voltage
VSENS
Sense voltage for boost switch current
sensing
–
28.5
–
mV
Soft Start LEDx Current Limit Relative to LED
100% Current
ILED(SS)
Current through enabled LEDx pins during
soft start
–
8
–
%
TTSD
TJ rising
–
165
–
°C
Short Circuit Detect Voltage
VSC
Measured on any LEDx pin
Output Overvoltage Threshold
VOVP
ROVP = 0
IOVPLK
VOVP = 22 V, EN = VIL, or PWM=VIL
Soft Start
Protection Features
Thermal Shutdown Threshold
OVP Pin Leakage
Current2
Overvoltage Protection Sense Current2
IOVPH
–
25
–
V
18.0
19.5
21.0
V
–
0.1
–
μA
183
200
217
μA
¯ Ā ¯Ū¯L̄
¯ T̄
¯ Pin Output Leakage2
F̄
IFLT
V=5V
–
–
1
µA
¯Ū¯L̄¯ T̄¯ Pin Output Voltage
F̄¯ Ā VOL
I = 500 µA
–
–
0.4
V
1Typical
specifications are at TA = 25ºC.
input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going
into the node or pin (sinking).
3LED accuracy is defined as (I
SET × 640 – ILED(av)) / (ISET × 640), ILED(av) measured as the average of ILED1 through ILED6. Refer to characterization
chart for variation over temperature range.
4LED current matching is defined as (I
LEDx – ILED(av)) / ILED(av), with ILED(av) as defined in footnote 3. Refer to characterization chart for variation over
temperature range.
5Guaranteed by design and characterization.
2For
Normalized Total ILED(av) (%)
Variation of Total LED Current versus Ambient Temperature
101.0
100% Current = 64 mA per channel at 25°C
100.5
100.0
99.5
99.0
98.5
98.0
-60
-40
-20
0
20
40
60
Temperature, TA (°C)
80
100
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
A8512
LED Backlight Driver for LCD Monitors and Televisions
Characteristic Performance
Efficiency versus Battery Voltage
for Various LED Configurations
FET = IRFR120N, VIN = 12 V, fSW = 500 kHz
L = 22 µH, Load = W92050C LEDs at 112 mA per string
94
93
93
92
92
91
91
90
90
89
89
88
87
86
3 strings 18 LEDs per string
VOUT ≈ 60 V, POUT ≈ 20.2 W
85
2 strings 18 LEDs per string
VOUT ≈ 60 V, POUT ≈ 13.4 W
3 strings 14 LEDs per string
VOUT ≈ 47 V, POUT ≈ 15.8 W
84
83
82
87
86
3 strings 18 LEDs per string
VOUT ≈ 60 V, POUT ≈ 20.2 W
85
2 strings 18 LEDs per string
VOUT ≈ 60 V, POUT ≈ 13.4 W
3 strings 14 LEDs per string
VOUT ≈ 47 V, POUT ≈ 15.8 W
83
82
2 strings 14 LEDs per string
VOUT ≈ 47 V, POUT ≈ 10.5 W
81
80
10
88
84
2 strings 14 LEDs per string
VOUT ≈ 47 V, POUT ≈ 10.5 W
81
FET = FQB17N08L, VIN = 12 V, fSW = 500 kHz
L = 22 µH, Load = W92050C LEDs at 112 mA per string
95
94
Efficiency (%)
Efficiency (%)
95
Efficiency versus Battery Voltage
for Various LED Configurations
80
11
12
13
14
15
16
17
18
19
20
21
22
23
VBAT (V)
Efficiency of the boost converter stage is affected by the selection of
power MOSFET, switching frequency, input/output voltages, and output
power. The external MOSFET used for the above chart is the IRFR120N,
which has a relatively high RDS(on) = 0.21 Ω. This causes higher
conduction loss, especially at lower input voltage.
10
11
12
13
14
15
16
17
VBAT (V)
18
19
20
21
22
23
The power MOSFET is replaced with FQB17N08L, which has a lower
RDS(on) = 0.115 Ω. This results in less conduction loss at lower input
voltage, however, the switching loss becomes more significant at higher
input voltage.
Switching Frequency versus FSET Resistor Value
fSW (MHz) = 52 / RFSET (kΩ)
1100
1000
fSW (kHz)
900
800
700
600
500
400
300
50
60
70
80
90 100 110
RFSET (kΩ)
120
130
140
150
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
A8512
LED Backlight Driver for LCD Monitors and Televisions
Normal Startup Power Sequences
VBAT = 12 V, Load = 6 strings, 16 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 µF ceramic
The A8512 can startup with any combination of input and power sequences, as shown in waveforms below:
VOUT
C3,C4
C2
C1
ILED
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VPWM
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Normal startup with EN = Low-toHigh transition (PWM = High)
VPWM
VEN
t
VOUT
C3,C4
C2
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VPWM
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Normal startup with PWM = Low-toHigh transition (EN = High)
ILED
VPWM
VEN
C1
t
VOUT
C3,C4
C2
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VPWM
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Normal startup with PWM signal
toggling at 500 Hz, 50% duty cycle
ILED
VPWM
VEN
C1
t
ILED
C2
VPWM
C1
VEN
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VPWM
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Normal startup with battery voltage
ramping up from 2 to 12 V (EN=
PWM = High)
VOUT
C3,C4
Symbol
t
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
A8512
LED Backlight Driver for LCD Monitors and Televisions
Typical PWM Operation Waveforms
VBAT = 12 V, Load = 6 strings, 16 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 µF ceramic
VOUT
Symbol
Parameter
Units/Division
C1
C2
–*
C4
t
VEN
VPWM
VOUT
Total ILED
time
10 V
10 V
1V
100 mA
2 ms
*Offset = 46 V
C2
PWM dimming at 200 Hz 10% duty cycle;
Output voltage ripple approximately 0.8 V (out of 50 V)
VPWM
VEN
C1
t
VOUT
C4
C2
Symbol
Parameter
Units/Division
C1
C2
–*
C4
t
VEN
VPWM
VOUT
ILED
time
10 V
10 V
1V
100 mA
50 µs
*Offset = 46 V
ILED
PWM dimming at 5 kHz 10% duty cycle
VPWM
VEN
C1
t
Ratio of LED Current versus PWM Duty Cycle
Ratio of LED Current versus PWM Frequency
PWM frequency = 200 Hz
100
PWM duty cycle = 10%
100
Ratio of LED Current (%)
Ratio of LED Current (%)
90
10
1
80
70
60
50
Compensated
pulse width
40
Uncompensated
pulse width
30
20
10
0.1
0.1
1
PWM Duty Cycle (%)
10
100
0
0.1
1
PWM Frequency (kHz)
10
To improve the accuracy of PWM dimming at very high frequency and/or very low duty cycle, it is
necessary to compensate the PWM pulse width, as described in Application Information section.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
A8512
LED Backlight Driver for LCD Monitors and Televisions
Normal Operation and Fault Conditions
VBAT = 12 V, Load = 6 strings, 18 LEDs each string, 56 mA per string, Output capacitors = 2 × 2.2 µF ceramic, ROVP = 249 kΩ (OVP at 69 V)
VOUT
C4
C2,C3
C1
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VLEDx
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Normal startup with VBAT = 12 V,
(VOUT ≈ 58 V when cold)
ILED
VLEDx
VEN
t
OVP tripped
C2,C3
C1
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VLEDx
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Startup with one LED string open;
(OVP tripped at ≈ 69 V. Open string
removed from regulation. Remaining
strings operate normally.)
VOUT
C4
Symbol
ILED
VLEDx
VEN
t
OVP tripped
VOUT
ILED
C4
C2,C3
C1
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VEN
VLEDx
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
Startup with all LED strings connected,
then one LED string becomes open;
(OVP tripped at ≈ 69 V. Open string
removed from regulation. Remaining
strings operate normally)
VLEDx
VEN
t
C4
C2,C3
VOUT
LED shortdetect tripped
ILED
VLEDx
VFAULT
Symbol
Parameter
Units/Division
C1
C2
C3
C4
t
VFAULT
VLEDx
VOUT
Total ILED
time
10 V
10 V
10 V
100 mA
2 ms
OVP setpoint too high for the application.
Startup with one string open; voltage
at LEDx pin exceeded Short-Detect
threshold (25 V) before OVP could be
tripped. IC shuts down.
C1
t
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
A8512
LED Backlight Driver for LCD Monitors and Televisions
Functional Description
LED current required:
Overview The A8512 is a multi-output WLED/RGB controller for backlighting medium-size displays. It has an integrated
gate driver for driving an external N-channel boost MOSFET.
The gate driver voltage is regulated at 7 V, which allows a wide
selection of power MOSFET (in contrast to being limited to
logic-level MOSFETs when using a 5 V gate driver). The boost
controller operates in fixed-frequency current-mode control. The
switching frequency can be set in the range from 300 kHz to
1 MHz, by an external resistor, RFSET , connected between FSET
and ground.
RISET = ( 1.235 / ILED ) × 640 .
(3)
In steady-state operation, the maximum average LED current that
can be handled by the IC depends on its thermal budget. That
is, maximum power dissipation and acceptable temperature rise.
The thermal budget is affected by various parameters, such as
PCB size, copper plane around IC, LED Vf mismatch, selection
of power components (MOSFET, inductor and diode), maximum
board temperature, and so on.
The external MOSFET switch is protected by pulse-by-pulse current limiting. The current limit is independent of duty cycle, and
is set using an external sense resistor, RSC.
Boost Switching Frequency Setting Connect an external
resistor between the FSET pin and GND, to set boost switching
frequency, fSW . The value of fSW (MHz) is determined by:
The A8512 has six well-matched current sinks that provide regulated current through the LEDs for uniform display brightness.
The boost converter is controlled by monitoring all LEDx pins
simultaneously and continuously.
fSW = 52 / RFSET ,
(4)
where fSW is in MHz and RFSET is in kΩ. The typical range of
RFSET is approximately 51 to 174 kΩ, which corresponds to
1 MHz to 300 kHz.
Multiple A8512 can be connected in parallel, for applications
that require more than six LED strings. One master controller is
in charge of the boost converter stage, while other slave controllers act as LED current sinks only. The converter output voltage
will be boosted to a level just sufficient for all LED currents to be
within regulation.
Enable The IC turns on when a high signal is applied on the EN
pin, and turns off when this pin is pulled low. The LED current
sinks are turned on when both the EN and the PWM inputs are high.
Up to six A8512s (1 master + 5 slaves) can be connected in
parallel, which allows up to 36 LED strings to be powered by just
one boost converter. The maximum number of LEDs within each
string is limited only by the voltage ratings of the external power
components (MOSFET, diode, and capacitors).
LED Current Setting The maximum LED current can be set, at
up to 130 mA/channel, through the ISET pin. Connect a resistor,
RISET , between this pin and ground to set the reference current
level, ISET . The value of ISET (mA) is determined by:
ISET = 1.235 / RISET (kΩ) .
PWM Dimming The A8512 has a very wide range for PWM
signal input. It can accept a PWM signal from 100 Hz to 5 kHz.
When a PWM high signal is applied, the LEDx pins sink
(1)
The resulting current is multiplied internally with a gain of 640
and mirrored on all enabled LEDx pins:
ILED = ISET × 640 .
Channel Selection The A8512 can be used to drive 1 to 6 LED
channels. During startup, the IC detects LED sink pins which are
shorted to ground, and disables the corresponding LED channel.
Therefore, any unused LED pins must be connected to ground,
otherwise the IC will go into overvoltage protection fault during
startup. LED pins can be paralleled together for higher current. For example for a 3 parallel string configuration, connect
LED1‑2, LED3‑4, and LED5‑6 together to deliver up to twice the
current per LED.
(2)
This sets the maximum current through each LEDx, referred as
the 100% Current. The LEDx current can be reduced from the
100% Current value by applying an external PWM signal on the
PWM pin. Conversely, we can calculate RISET according to the
PWM
tD
ILED
Figure 13. Propagation delay from the PWM signal rising edge to ILEDx
reaching the 90% level
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115 Northeast Cutoff
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11
A8512
LED Backlight Driver for LCD Monitors and Televisions
100% Current. When the PWM signal is low, the LED sinks
turn off.
Referring to figure 13, there is a ramp-up delay between when
the PWM signal is applied and when the current reaches the
90% level. To improve current dimming linearity for PWM pulse
widths less than 100 µs, increase the applied PWM pulse-width
by 3 to 5 μs to compensate for this delay.
Startup Sequence When EN is pulled high, the IC enters
soft start. The IC first tries to determine which LEDx pins are
being used, by raising the LEDx pin voltage with a small current.
After a duration of 512 switching cycles, the LEDx pin voltage
is checked. Any LEDx channel with a drain voltage smaller then
100 mV is removed from the control loop. This is the reason why
unused LEDx pins should be connected to GND,
After the first PWM positive trigger, the boost current is limited
to 30% of normal value and all active LEDx pins sink 1/12 of
the set current until output voltage reaches sufficient regulation
level. When the device comes out of soft start, boost current and
the LEDx pin currents are set to normal operating level. Within
a few cycles, the output capacitor charges to the voltage required
to supply full LEDx current. After output voltage, VOUT , reaches
the required level, LEDx current toggles between 0% and 100%
with each PWM command signal.
For single-IC operation, select ROVP such that its OVP setpoint is
approximately 10 V above the LED operating voltage at cold. For
example, given the pin regulation voltage, VLEDx of 1.4 V (typ.), if
LED VF = 3.4 V (max.) and there are 15 LEDs in series, then the
operating voltage is approximately:
VOUT = 3.4 V × 15 + 1.4 V = 52.4 V .
In this case, select OVP at about 60 V, which gives ROVP = 200 kΩ.
Open LED Protection During normal operation, if any enabled
LED string opens, voltage on the corresponding LEDx pin goes
to zero. The boost loop operates in open loop till the OVP level
is reached. The A8512 identifies the open LED string when overvoltage is detected. Open strings are then removed from the regulation loop. Afterwards, the boost controller operates in normal
manner, and the output voltage is regulated to drive the remaining
strings. If the open LED string is reconnected, it will sink current
up to the programmed current level.
Note: Open strings are removed from boost regulation, but not
disabled. This keeps the string in operation if LEDs open for only
a short length of time, or reach OVP level on a transient event.
The disconnected string can be restored to normal mode by reenabling the IC. It can also be restored to normal operation if the
fault is removed from the corresponding LEDx pin, but an OVP
event occurs on any other LEDx pin.
In case of a heavy overload on VOUT at startup, the device will
stay in soft start mode indefinitely, as the output voltage cannot
rise to the LED regulation level.
Overcurrent Protection The IC provides pulse-by-pulse
current limiting for the boost MOSFET. The current limit level,
ISC (A), can be set by selecting the external resistor, RSC (Ω):
LED Short Detect Any LEDx pins that have a voltage exceeding the Short Circuit Detect Voltage, VSC , cause the device to
shut down and this condition is latched. This faults occurs when
multiple LEDs short. In case only a few LEDs short, the IC will
continue to work as long as power dissipation in the IC is limited.
(6)
RSC = 0.095 / ISC .
If the boost output voltage is unable to reach the regulation target
even when the switch is operating at maximum current limit, the
boost control loop will force the compensating capacitor, CCOMP ,
to rise in voltage until it reaches the overcurrent fault level
(3.4 V approximately). The overcurrent fault forces the device
into soft start.
Overvoltage Protection The A8512 has an adjustable overvoltage protection feature to protect the power components
(external MOSFET, output diode and capacitors) against output
overvoltage. The overvoltage level can be set, from 19.5 V to a
higher voltage, with an external resistor, ROVP . When the current
though the OVP pin exceeds 200 μA, internal OVP comparator
goes high and the device shuts down. The OVP fault disables all
LEDx strings that are below regulation, thus preventing them
from controlling the boost output voltage.
Calculate the value for ROVP (Ω) as follows:
ROVP = (VOVP – 19.5) / 200 μA ,
where VOVP is the required OVP level in V.
(5)
Thermal Shutdown (TSD) The IC shuts down when junction
temperature exceeds 165°C. It will recover automatically when
the junction temperature falls below 125°C approximately.
VIN Undervoltage Lockout (UVLO) The device is shut
down when input voltage, VIN , falls below VUVLO. Any existing
latched fault is cleared.
VIN Operating Range Considerations When VIN is above
VUVLO and below 10 V, the IC will operate correctly, but its gate
driver voltage may not reach the regulation target of 7 V. This
may cause excessive switching and conduction loss if the external
MOSFET is not fully enhanced.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
A8512
LED Backlight Driver for LCD Monitors and Televisions
During normal operation, the IC draws approximately
10 to 15 mA from the VIN pin, depending on switching frequency and the external MOSFET. At VIN = 12 V, this translates
into 120 to 180 mW of power consumption, most of it dissipated
in internal linear regulators. This power increases proportionally
with input voltage. Therefore it is highly recommended to keep
VIN between 10 and 24 V during normal operation.
If the input battery voltage must be higher than 24 V, a better
solution is to power the VIN pin separately using a 12 V supply.
Doing this reduces the heat dissipation of the IC, and improves
the overall system efficiency.
Fault Mode in Single-Controller Operation
Fault State
AutoRestart
Description
Yes
Fault occurs when output voltage exceeds
the OVP setpoint voltage. Used to prevent
the output voltage from damaging the power
components.
Yes
Fault occurs when the current through the
external MOSFET increases such that the
voltage across the SENSE1 and SENSE2 pins
exceeds 95 mV typical. The MOSFET switch is
turned off on a cycle-per-cycle basis.
Overcurrent
Protection
Yes
Multiple pulse-by-pulse current limits will cause
the COMP pin voltage to rise. After a time
period determined by the COMP pin current
and the COMP capacitor, the COMP voltage will
exceed the overcurrent detect threshold, forcing
a fault. System may hiccup if the total current
requirement is too high.
Overtemperature
Protection
Yes
Fault occurs when the die temperature exceeds
the over-temperature threshold, 165°C typical.
LED Short
Protection
No
Fault occurs when the LED pin voltage exceeds
VSC , 25 V typical.
VIN UVLO
No
Fault occurs when VIN drops below VUVLO,
6.5 V typical. This fault resets all latched faults.
Overvoltage
Protection
Pulseby-Pulse
Current Limit
Parallel Operation The A8512 is designed to operate with up
to six A8512 devices connected in parallel, in order to drive a
greater number of LED strings. In this case, the A8512 which
controls the boost converter is designated the master, while the
other devices are slaves which serve as current sinks for their
own LED strings. Slaves communicate with the master through
the shared COMP signal. PWM dimming and protection mechanisms work consistently across all devices.
Select ROVP1 for the master controller such that its OVP setpoint is approximately 10 V above the LED operating voltage
at cold. Select ROVP2 for each slave controller at approximately
15 to 25 kΩ lower than that for the master. This ensures that, in
the case in which an open-LED fault occurs, the slave controllers
will enable OVP before the master does.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
A8512
LED Backlight Driver for LCD Monitors and Televisions
Application Information
PCB Layout Guidelines As with any switching power supply,
care should be taken in laying out the board. A switching power
supply has sources of high dv/dt and high di/dt which can cause
malfunction. All general norms should be followed for board
layout. Refer to figure 14 for a typical application schematic. The
A8512 evaluation board provides a useful model for designing
application circuit layouts.
The following guidelines should be observed:
•Place bypass capacitors physically close to their respective pins
(VIN, VBIAS, and VREG7V).
•Place the resistors RFSET and RISET, and the compensation components (Rz and Cz) close to the FSET, ISET, and COMP pins,
respectively. Connect the other ends to the common star ground.
•A8512 has 50 kΩ internal pull-down resistors on the EN and
PWM pins to keep these pins low while driving through tri-state
state (for example, shutdown). Add external resistors R2 and
R3 between the EN and PWM pins and ground, for added noise
immunity. Connect these resistors close to the pins and return to
the common star ground.
•Route analog ground, digital signal ground, LED ground
(LGND pin), and power ground (PGND pin) separately. Connect all these grounds at the common ground plane under the
A8512, serving as a star ground.
•Sense voltage across RSC with smaller length traces. Place the
SENSE1 and SENSE2 traces as close to each other as possible to minimize noise pickup. Connect the SENSE2 trace to
the negative end of the resistor and do not connect it to power
ground plane.
•Place the input capacitors (C1, C2), inductor (L1), boost diode
(D1), MOSFET (Q1), and output capacitors (C3, C4) so that
they form the smallest loop practical. Avoid long traces for
these paths.
•Provide a substantial copper plane near MOSFET Q1 and the
IC, to provide good thermal conduction. When using multi-layer
PCB, make sure there are sufficient numbers of thermal vias
underneath and around the IC's exposed pads.
VOUT
VBAT
8 to 24 V
L1
C1
C2
Q1
18 LEDs per string
D1
RSC
ROVP
P
P
C3
C4
P
DRIVER SENSE1 SENSE2 OVP
VIN
VBIAS
R1
C5
FAULT
EN
A8512
LED1
LED2
PWM
R2
COMP
RFSET
RISET
R3
ISET
VREG7V
Rz1
Cz1
FSET
C6
LED3
LED4
LED5
LED6
AGND AGND LGND LGND PGND
P
R2, R3 optional (A8512 has
internal pull-down resistors)
Figure 14. Typical application circuit with single controller; VIN pin tied to VBAT .
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115 Northeast Cutoff
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14
A8512
LED Backlight Driver for LCD Monitors and Televisions
VOUT
VBAT
24 to 48 V
L1
C1
C2
Q1
36 LEDs per string
D1
RSC
ROVP
P
P
C3
C4
P
DRIVER SENSE1 SENSE2 OVP
VIN
VREG7V
VBIAS
VIN
12 V
R1
C5
C6
A8512
FAULT
LED1
EN
LED2
PWM
R2
RFSET
RISET
R3
COMP
LED3
FSET
LED4
ISET
Rz1
LED5
Cz1
LED6
AGND AGND LGND LGND PGND
P
R2, R3 optional (A8512 has
internal pull-down resistors)
Figure 15. Typical high-voltage application circuit with single controller; VIN pin separate from VBAT.
VOUT
VBAT
12 to 48 V
L1
C1
C2
Q1
18 LEDs per string
D1
RSC
ROVP
P
P
C3
C4
P
DRIVER SENSE1 SENSE2 OVP
VIN
VBIAS
VIN
12 V
R1
C5
FAULT
EN
A8512
LED1
LED2
PWM
R2
COMP
RFSET
RISET
R3
ISET
VREG7V
Rz1
Cz1
FSET
C6
LED3
LED4
LED5
LED6
AGND AGND LGND LGND PGND
P
R2, R3 optional (A8512 has
internal pull-down resistors)
Figure 16. Typical medium-voltage application circuit driving high-current (up to 160 mA) LED strings.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
A8512
LED Backlight Driver for LCD Monitors and Televisions
Package ET 28-Contact QFN
0.30
5.00 ±0.15
1.15
28
1
2
0.50
28
1
A
5.00 ±0.15
3.15
4.80
3.15
29X
D
SEATING
PLANE
0.08 C
+0.05
0.25 –0.07
0.90 ±0.10
C
4.80
C
PCB Layout Reference View
0.50
For Reference Only; not for tooling use
(reference JEDEC MO-220VHHD-1)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
0.73 MAX
B
2
1
28
3.15
3.15
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN50P500X500X100-29V1M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
16
A8512
LED Backlight Driver for LCD Monitors and Televisions
Package LB 24-Pin SOICW with Internally Fused Pins
15.40 ±0.20
8°
0°
24
24
0.33
0.20
7.50 ±0.10
2.20
10.30 ±0.33
9.60
A
1.40 REF
1
2
1.27
0.40
Branded Face
24X
SEATING
PLANE
0.10 C
0.51
0.31
1.27 BSC
1
2
0.65
1.27
0.25 BSC
SEATING PLANE
GAUGE PLANE
C
B
PCB Layout Reference View
2.65 MAX
0.30
0.10
Pins 6, 7, 18, and 19 internally fused for enhanced thermal dissipation
For Reference Only; not for tooling use (reference MS-013AD)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B
Reference pad layout (reference IPC SOIC127P1030X265-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
17
A8512
LED Backlight Driver for LCD Monitors and Televisions
Package LP 24-Pin TSSOP with Exposed Thermal Pad
7.80±0.10
24
0.65
0.45
8º
0º
0.20
0.09
B
3 NOM
4.40±0.10
3.00
6.40±0.20
6.10
0.60 ±0.15
A
1
2
1.00 REF
4.32 NOM
0.25 BSC
24X
SEATING
PLANE
0.10 C
0.30
0.19
0.65 BSC
SEATING PLANE
GAUGE PLANE
C
1.65
4.32
C
PCB Layout Reference View
For Reference Only; not for tooling use (reference MO-153 ADT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
1.20 MAX
0.15
0.00
A Terminal #1 mark area
B
Exposed thermal pad (bottom surface); dimensions may vary with device
C Reference land pattern layout (reference IPC7351
TSOP65P640X120-25M); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
Copyright ©2010-2015, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
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use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
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18
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