A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch Features and Benefits Description ▪ Active current sharing between LED strings for ±0.6% accuracy and matching ▪ Drives up to 12 series × 6 parallel = 72 LEDs (Vf = 3.2 V, If = 20 mA) at 5 V ▫ Each individual current sink is capable of 32 mA ▫ Adjustable overvoltage protection (OVP) ▪ 600 kHz to 2 MHz adjustable switching frequency ▫ Open or shorted LED string protection ▫ Open Schottky diode protection ▫ Overtemperature, cycle-by-cycle current limit, undervoltage, and soft start time-out protections ▫ Selectable latched/auto-restart protection modes ▪ No audible MLCC noise during PWM dimming ▪ No pull-up resistors required for LED modules that use ESD capacitors The A8503 is a multi-output WLED/RGB LED driver for medium-size LCD backlighting. It integrates a current-mode boost converter with internal power switch and six current sinks. The boost converter can provide output voltages up to 47 V. The boost converter can drive up to 72 LEDs at 20 mA per LED with a battery voltage down to 5 V. The LED sinks are capable of sinking up to 32 mA each, and can also be paralleled together to achieve even higher LED currents. The A8503 provides protection against overvoltage, open diode, open or shorted LED string, and overtemperature. A dual level cycle-by-cycle current limit function provides soft start and protects against overloads. A soft start timeout monitor is provided to enhance protection when starting up into a fault condition. Continued on the next page… Package: 26 contact MLP/QFN (suffix EC) When the MODE pin is set low, the A8503 latches on a fault, and can be re-enabled only by cycling the input voltage, VIN, or by toggling the EN pin. Connecting the MODE pin high provides auto-restart after fault events. The A8503 features Continued on the next page… Applications ▪ Notebook and sub-notebook displays ▪ LCD monitors ▪ LCD panels Approximate size Typical Application VBAT 5 to 22 V D1 VIN 4.3 to 5.5 V RPULLUP FAULT CBAT 4.7 μF 35 V CIN 0.1 μF RFSET CCOMP 1 μF EN Shutdown Enable PWM LED State Off Off Off On Off RISET L1 10 μH VIN ROVP SW SW OVP FAULT FSET A8503 PAD COMP LED1 LED2 LED3 LED4 EN LED5 MODE LED6 PWM ISET AGND PGND PGND DGND LGND Figure 1. Typical application circuit 8503-DS COUT 2.2 μF High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Features and Benefits (continued) ▪ Extends battery life ▫ Efficiency optimized for 3-cell notebooks ▫ 0.1 μA shutdown current ▫ Unique architecture eliminates external voltage divider and associated battery drain ▪ Rugged and small footprint solution ▫ 55 V, 2 A DMOS switch in 4 mm × 4 mm package—allows IPC-2221/2 / IPC-D-275 compliant PCB layout Description (continued) EN (enable) and PWM (dimming) pins to comply with popular notebook backlight control interfaces. The device package is a 26-contact, 4 mm × 4 mm, 0.75 mm nominal overall height QFN, with exposed pad for enhanced thermal dissipation. It is lead (Pb) free, with 100% matte tin leadframe plating. Selection Guide Part Number A8503GECTR-T Packing Package 1500 pieces per 7-in. reel 26-pin QFN/MLP with exposed thermal pad Absolute Maximum Ratings Characteristic SW Pins Symbol Notes Rating Units VSW –0.3 to 57 V LED1 through LED6 Pins VLEDx –0.3 to 34 V OVP Pin VOVP –0.3 to 47 V –0.3 to 7 V Remaining Pins Operating Ambient Temperature TA –40 to 105 ºC Maximum Junction Temperature TJ(max) 150 ºC Tstg –55 to 150 ºC Storage Temperature Range G Thermal Characteristics Characteristic Package Thermal Resistance Symbol RθJA Test Conditions* On 4-layer PCB based on JEDEC standard Value Units 35 ºC/W *Additional thermal information available on the Allegro website Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Functional Block Diagram V OUT Vbat 5 to 22 V L Cbat SW C OUT ROVP 10 kΩ 10 μH 4.7 μF/35 V SW OSC 2.2 μF OVP OVP Comparators FSET Current Mode O VP Boost Controller R fset LED1 + + OCP Soft Start - - COMP Ref PGND C comp LED2 1 μF EN ON/OFF Feedback and Control PWM LED3 Reference Current Generator ISET LED4 LED-select Logic Vin 4.3 to 5.5 V Internal Power VIN Cin 0.1μF Shut down Rpullup Latch Reset LED5 Open and Short LED Detect UVLO FAULT TSD R Flip-flop S LED6 OVP OCP MODE FAULT LGND AGND PGND PGND DGND Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 22 NC 24 SW 23 SW 25 OVP 26 NC Pin-out Diagram NC 1 21 PGND COMP 2 20 PGND VIN 3 ISET 4 AGND 5 17 EN FSET 6 16 FAULT MODE 7 15 NC 19 PWM LED6 14 LED5 13 18 DGND LED4 12 LGND 11 9 LED2 LED3 10 8 LED1 PAD (Top View) Terminal List Table Number Name 1, 15, 22, 26 NC 2 COMP Function Not connected internally Compensation pin; connect 1 μF capacitor to AGND or common star ground 3 VIN Input supply for the IC; decouple with a 0.1 μF ceramic capacitor 4 ISET Sets 100% current through LED string; connect RISET from ISET to AGND 5 AGND Connect to common star ground 6 FSET Set switching frequency; connect RFSET from FSET to AGND 7 MODE Apply VIL for latching faults, apply VIH for auto-restart; see Fault Mode table 8, 9, 10, 12, 13, 14 LEDx LED current sinks; connect unused LEDx pins to ground 11 LGND Power ground pin for LEDx current sinks; connect to common star ground 16 ¯F ¯¯A¯U¯¯L¯¯T ¯ During normal operation, this pin is high (high impedance); at a fault event, this pin pulls low 17 EN 18 DGND Device enable Digital ground; connect to common star ground 19 PWM PWM LED-current control; apply logic level PWM for dimming 20, 21 PGND Power ground; connect both pins to common star ground 23, 24 SW DMOS switch drain node; tie both pins together on the PCB 25 OVP Connect this pin to output capacitor +ve node through ROVP to enable overvoltage protection; select ROVP > 10 kΩ (VOVP is 44 V typical) – PAD Exposed thermal pad, common star ground for PGND, DGND, LGND, and AGND; connect to copper plane of the application PCB for heat transfer Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch ELECTRICAL CHARACTERISTICS1 Valid using circuit shown in figure 1, TA = TJ = 25°C except indicates specifications guaranteed from −40°C to 105°C, VIN = 5.0 V, EN = PWM = VIH, RISET = 12.4 kΩ, RFSET = 34 kΩ, MODE = AGND , unless otherwise noted Characteristics Input Voltage Range Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis Window Supply Current Symbol Test Conditions VIN VUVLO VIN falling VUVLOHYS IVIN Min. Typ.2 Max. Unit 4.2 – 5.5 V – – 4.0 V – 0.1 – V Switching, at no load – 7 – mA Shutdown, EN= VIL, TA = 25°C – 0.1 1 μA Standby, EN = VIH, PWM = VIL – 1 2 mA 1.2 1.5 1.9 MHz Boost Controller Switching Frequency fSW Minimum Switch Off-Time toff(min) – 72 – ns Minimum Switch On-Time ton(min) – 72 – ns Input Voltage Level Low VIL – – 0.4 V Input Voltage Level High VIH 1.5 – – V Input Leakage Current IILKG EN = PWM = 5 V – 100 – μA – 44 – V VOVP = 22 V, ROVP = 0 Ω, EN = VIL – 0.1 – μA – 240 – μA ISW = 1 A – 250 – mΩ VSW = 22 V Logic Input Levels (EN and PWM pins) Overvoltage Protection Output Overvoltage Threshold Overvoltage Protection Leakage Current Overvoltage Protection Sense Current VOVP IOVPLKG IOVPH Boost Switch Switch On-Resistance Switch Leakage Current RDS(on) – 0.1 – μA ISWLIM – 2.7 – A LEDx Pin Regulation Voltage VLEDx – 600 – mV ISET to ILEDx Current Gain AISET – 320 – A/A ISET Pin Voltage VISET – 1.235 – V ISET Allowable Current Range ISET 33 – 100 μA Current Accuracy3 ErrILEDX LED1 through LED6 = 0.6 V, at 100% Current –3 ±0.6 3 % ISET = 100 μA, LED1 though LED6 = 0.6 V, at 100% Current –3 ±0.6 3 % VLEDx = 12 V, EN = 0 – 0.1 – μA LEDx pin voltage level that forces latched shutdown, MODE = low – 18.7 – V Switch Current Limit ISWLKG(B) LED Current Sinks LEDx LEDx Current Matching4 Switch Leakage Current (LEDx) LED Short-Detect Voltage ∆ILEDX ISWLKG(L) VSC ISET = 100 μA Continued on the next page… Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch ELECTRICAL CHARACTERISTICS1 (continued) Valid using circuit shown in figure 1, TA = TJ = 25°C except indicates specifications guaranteed from −40°C to 105°C, VIN = 5.0 V, EN = PWM = VIH, RISET = 12.4 kΩ, RFSET = 34 kΩ, MODE = AGND, unless otherwise noted Characteristics Min. Typ.2 Max. Unit Initial soft start current for boost switch – 0.4 – A – 2.6 – mA Symbol Test Conditions Soft Start Soft Start Boost Current Limit ISW(SS) Soft Start LEDx Current Limit ILED(SS) Current through enabled LEDx pins during soft start Soft Start Timeout tTO(SS) The longest duration the boost is allowed to operate during soft start – 131,072 – Clock Cycles Thermal Shutdown Threshold TSHDN TJ rising – 165 – °C Thermal Shutdown Hysteresis TSHDN(hys) – 45 – °C ¯F ¯¯A¯¯U¯¯L ¯¯T ¯ Pin ¯F ¯¯A¯U¯¯L¯¯T ¯ Pull-Down Voltage VFAULT ¯¯A¯U¯¯L¯¯T ¯ pin with fault enabled, 10 kΩ pull-up Voltage on ¯F resistor, to 3.3 V – – 0.4 V ¯F ¯¯A¯U¯¯L¯¯T ¯ Pull-Down Resistance RFAULT ¯¯A¯U¯¯L¯¯T ¯ pin and ground with fault Resistance between ¯F enabled, IFAULT = 100 μA – 77 – Ω 1Specifications over the range TA = -40°C to 105°C; guaranteed by design and characterization. values are at TA = 25°C. 3LED accuracy is defined as 100 × (I SET × 320 – ILED(av) ) / (ISET × 320), ILED(av) measured as the average of ILED1 through ILED6. 4LED current matching is defined as (I LEDx – ILED(av)) / ILED(av), with ILED(av) as defined in footnote 3. 2Typical Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Characteristic Performance High Efficiency Boost Converter PWM Efficiency at Various Input Voltage Levels (VBAT) VIN = 5 V, six channels with 9 series LEDs each, 20 mA per channel, PWM = 200 Hz, fSW = 1.5 MHz 100 Efficiency (%) 95 90 VBAT (V) 85 5 9 12 17 21 80 75 70 0 20 40 60 Duty Cycle (%) 80 100 PWM Efficiency at Various Input Voltage Levels (VBAT) VIN = 5 V, six channels with 9 series LEDs each, 20 mA per channel, PWM = 200 Hz, fSW = 980 kHz 100 Efficiency (%) 95 90 VBAT (V) 85 5 9 12 17 21 80 75 70 0 20 40 60 Duty Cycle (%) 80 100 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Characteristic Performance High Efficiency Boost Converter Efficiency (POUT/PBAT) versus Battery Supply Voltage for Various Output Power Levels L1 = 6.8 μH, fSW = 1.5 MHz, VIN = 5.0 V 96 95 Efficiency (%) 94 VOUT IOUT (V) (mA) 93 92 91 25 120 25 100 30 120 30 100 90 89 88 87 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VBAT (V) Efficiency (POUT/PBAT) versus Battery Supply Voltage for Various Switching Frequencies VIN = 5.0 V, VOUT = 30 V IOUT = 120 mA 96 95 Efficiency (%) 94 93 ISW (MHz) 92 1.5 1.0 91 2.0 90 89 88 87 86 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VBAT (V) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Characteristic Performance Turn-on and Shutdown VIN = 5 V, VBAT = 7 V, ILEDx = 20 mA, six LED channels with 10 series LEDs each (A) Turn-on using the EN pin, with VIN = 5 V (B) Turn-on using the VIN pin, with EN high VEN C1 C1 C2 IOUT VIN IOUT C2 t Symbol C1 C2 t t Parameter VEN IOUT time Units/Division 2V 20 mA 2 ms Symbol C1 C2 t Parameter VIN IOUT time Units/Division 2V 20 mA 2 ms (C) Shutdown using the EN pin IOUT VEN C1 C2 t Symbol C1 C2 t Parameter VEN IOUT time Units/Division 2V 20 mA 200 μs Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Characteristic Performance Average LED Current a Various PWM Duty Cycles VIN = 5.0 V, VBAT = 12 V, PWM = 200 Hz, Output = six LED channels with 10 series LEDs each 100 IOUT (mA) 10 1 0.1 1 10 100 PWM Duty Cycle (%) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch Functional Description 34 32 30 28 26 ILED (mA) The A8503 is a multi-output WLED/RGB LED driver for backlighting medium-size displays. It has an integrated boost converter to increase input supply voltage, allowing it to drive up to 12 LEDs per channel on 6 channels with a Vf (max) of 3.2 V at 20 mA per LED, at 5 V supply. The boost converter is a fixed frequency current-mode converter. The switching frequency can be set in a range from 600 kHz to 2 MHz, by an external resistor, RFSET , connected between FSET and ground. The integrated boost DMOS switch is rated for 55 V, 2 A. This switch is protected against overvoltage, and has pulse-by-pulse current limiting. The current limiting is independent of duty cycle. 24 22 20 18 16 14 12 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 RISET (kΩ) The A8503 has six well-matched current sinks that provide regulated current through the LEDs, for uniform display brightness. The boost converter is controlled by monitoring all LEDx pins simultaneously and continuously. All LED sinks are rated for 34 V to allow PWM dimming control. (A) 325 323 321 Gain LED Current Setting The maximum LED current can be set, to 32 mA/channel, through the ISET pin. Connect a resistor, RISET, between this pin and ground to set the reference current level, ISET. The value of ISET (mA) is determined by: VIN (V) 319 5.0 ISET = 1.235 / RISET (kΩ) . 317 The resulting current is multiplied internally by a gain of 320, then is mirrored to all enabled LEDx pins. This sets the maximum current through LEDx, referred as the 100% Current, as shown in figure 2A. The LEDx current can be reduced from the 100% Current value by applying an external PWM signal on the PWM pin (see figure 2B). 315 Enable The IC turns on when a high signal is applied on the EN pin and turns off when this pin is pulled low. PWM Dimming The A8503 has a very wide range of PWM signal input. It can accept a PWM signal from 100 Hz to 5 kHz. When a PWM high signal is applied, the LEDx pins sink 100% Current. When the 14 16 18 20 22 24 26 28 30 32 34 36 38 RISET (kΩ) (B) Figure 2. Effect of value of RISET on current through an LED string. Panel A shows level of 100% current, and panel B shows LEDx gain. 2 1.8 1.6 fSW (MHz) The typical RFSET versus frequency curve is shown in figure 3. 5.5 12 Boost Switching Frequency Setting Connect an external resistor between the FSET pin and AGND, to set boost switching frequency, fSW . The value of the boost switching frequency, fSW (MHz), is determined by: fSW = 52 / RFSET (kΩ) . 4.5 1.4 VIN (V) 1.2 4.5 1 5.0 5.5 0.8 0.6 25 30 35 40 45 50 55 60 65 70 75 80 85 RFSET (kΩ) Figure 3. Switching frequency setting versus RFSET (VIN = 5 V, VBAT = 12 V). Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch PWM signal is low, the LED sinks turn off. Referring to figure 5, there is a 4 μs ramp-up delay between when the PWM signal is applied and when the current reaches the 90% level. Increase the applied PWM pulse-width by 3 μs to compensate for this delay. Startup Sequence When EN is pulled high, the IC enters soft start. The IC first tries to determine which LEDx pins are being used, by raising the LEDx pin voltage with a small current. After a duration of 512 switching cycles, the LEDx pin voltage is checked. Any LEDx channel with a drain voltage smaller then 100 mV is removed from the control loop. After the first PWM positive trigger, the boost current is limited to 0.4 A and all active LEDx pins sink 1/12 of the set current until output voltage reaches sufficient regulation level. When the device comes out of soft start, boost current and the LEDx pin currents are set to normal operating level. Within a few cycles, the output capacitor charges to the voltage required to supply full LEDx current. After VOUT reaches the required level, LEDx current toggles between 0% and 100% with each PWM command signal. In case of a heavy overload on output voltage at startup, the device may stay in soft start mode indefinitely, if the output voltage cannot rise to the LED regulation level and the MODE pin is tied high. To avoid this scenario, A8503 has a soft start timeout when the MODE pin is tied low. With the MODE pin low, if the device does not finish soft start during 131,072 switching cycles, it is shut down. LED Open and Short Detect All unused LED pins should be connected to ground to prevent any undesired faults from triggering. For LED short detect, any enabled LEDx pins that have a voltage exceeding the short circuit detect voltage, VSC , causes the device to shut down irrespective of what mode the A8503 is in. The open LED fault will be triggered as soon as an enabled LEDx pin does not have sufficient current flowing through it to stay in regulation. This will result in increased output voltage until the LED is back in regulation or overvoltage protection (OVP) is tripped. If OVP is tripped, depending on the mode of operation, the A8503 will either shut down (MODE = low) or will remove the LED string from operation and continue to operate normally (MODE = high). Please refer to the Fault Mode table for latched and non-latched fault conditions. Overvoltage Protection The A8503 has two independent overvoltage protection features to protect the device against output overvoltage. The overvoltage level can be set, from 44 to 50 V typical, with an external resistor, ROVP. When the current though the OVP pin exceeds 240 μA, the OVP comparator goes high and the device shuts down in an OVP fault state when the MODE pin is low. If the MODE pin is high, the OVP fault disables all LEDx strings that are below regulation, thus preventing them from controlling the boost output voltage. The device also offers open Schottky diode protection. If for any reason the voltage on the SW pins exceeds more than 57 V, the IC shuts down and remains latched irrespective of the MODE pin level. The overvoltage protection circuit is shown in figure 6. Calculate the value for ROVP as follows: ROVP = (VOVP – 44) / 240 μA , where VOVP is the desired typical OVP level in V, and ROVP is in Ω. Overcurrent Protection The IC provides pulse-by-pulse current limiting at 2.7 A for the boost MOSFET. If the overcurrent fault state persists, the boost control loop will force the compensating capacitor to rise in voltage until it reaches the overcurrent fault level. This fault shuts down the IC and is latched when MODE pin is low (MODE = AGND). If MODE pin is high, the overcurrent fault forces the device into soft start. VOUT IOUT VFPWM Figure 4. PWM Pin Dimming, fPWM = 200 Hz, duty cycle = 10%. C1, IOUT 50 mA / div; ; C2, VFPWM (signal on PWM pin) 2 V / div; C3, VOUT 5 V / div, AC coupled. PWM 4 μs 90% Current ILEDx Figure 5. ILEDx versus PWM input Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Input UVLO The device is shut down when input voltage, VIN , falls below VUVLO. Thermal Shutdown Protection (TSD) The device shuts down when junction temperature exceeds 165°C. If the MODE pin is low, the thermal shutdown will latch the device off until EN is pulled low or UVLO is triggered. The A8503 will recover automatically when the MODE pin is high and the junction temperature falls below 120°C. Fault Mode The MODE pin controls the latching of faults as shown in the Fault Mode table. Latched faults are reset when EN is pulsed low or VIN falls below UVLO level. SW A8503 – + 1.23 V OVP – OVP disable + 22 kΩ 1.23 V Latch Figure 6. Overvoltage protection circuitry Fault Mode Table MODE = AGND MODE = VIN Description Overvoltage Protection Latched Auto-restart Fault occurs when OVP pin exceeds VOVP threshold. Used to protect the output voltage from damaging the part. Open Diode Protection Latched Latched Pulse-by-Pulse Current Limiting Auto-restart Auto-restart Fault occurs when the current through the DMOS switch exceeds ISWLIM, 2.7 A typical. The DMOS switch is turned off on a cycle-by-cycle basis. Overcurrent Protection Latched Auto-restart Fault occurs when the COMP pin exceeds the overcurrent detect threshold. Multiple pulse-by-pulse current limits will cause the COMP pin voltage to rise. After a time period determined by the COMP current and the compensation capacitor, the COMP voltage will exceed the overcurrent detect threshold and force a fault. Overtemperature Protection Latched Auto-restart Fault occurs when the die temperature exceeds the overtemperature threshold, 165°C typical. Shorted LED Protection Latched Latched No No Fault occurs when VIN drops below VUVLO, 4.0 V typical. This fault resets all latched faults. Latched Auto-restart Fault occurs if the IC is unable to finish soft start within approximately 131,000 clock cycles (approximately 74 ms at 1.73 MHz) after EN is set high. Protection VIN UVLO Soft Start Timeout Fault occurs when SW node exceeds the safe operating voltage of the boost DMOS switch. Typical value is 57 V. Fault occurs when the LEDx pin voltage exceeds VSC, 18.7 V typical. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Application Information A typical application circuit for dimming an LCD monitor backlight with 72 LEDs is shown in figure 1. Figure 7 shows two dimming methods: digital PWM control (PWM signal on the PWM pin) and analog PWM control, with the analog signal, VA , applied to the ISET pin through a resistor, RA. ISET RISETP Q1 The current flowing through RA can be calculated as: A8503 IA = (VA – VSET) / RA . Figure 8. Configuration for 1000:1 dimming. This current changes the reference current, ISET, as follows: ISET = VSET / RSET – (VA – VSET) / RA . 100 LED current can be changed by changing VA. ISET can be changed in the range from 33 to 100 μA. Accuracy (%) 95 Application Circuit for 1000:1 Dimming Level A wider dimming range can be achieved by changing the reference current, ISET, while using PWM dimming. For higher output, current levels turn on Q1 (see figure 8). RISET and RISETP set the 100% current level. This current level can be set up to 32 mA, and then it can be dimmed by applying 100% to 0.33% duty cycle on the PWM pin. The reference current can be reduced by turning off Q1. LED current can be dimmed to 10 mA by reducing reference current through the ISET pin. This provides a 1000:1 combined dimming level range. Figure 9 shows the accuracy, ErrLEDX , that results using this circuit. CBAT 4.7 μF 35 V CIN 0.1 μF RFSET CCOMP 1 μF EN PWM VA 85 75 0.1 1.0 10.0 Dimming Level (%) 100.0 Figure 9. Typical accuracy, normalized to the 100% current level, versus dimming level, with FPWM = 100 Hz. D1 VIN 4.3 to 5.5 V FAULT 90 80 VBAT 5 to 22 V RPULLUP RISET RA L1 10 μH VIN ROVP SW SW COUT 2.2 μF OVP FAULT FSET A8503 PAD COMP LED1 LED2 LED3 LED4 EN LED5 MODE LED6 PWM ISET AGND PGND PGND DGND LGND RISET Figure 7. Typical application circuit for analog dimming with external DC voltage source VA. This method of dimming can be combined with digital PWM dimming. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 VBAT 5 to 22 V D1 VIN 4.3 to 5.5 V RPULLUP CBAT 4.7 μF 35 V COUT 2.2 μF OVP FAULT A8503 FSET RFSET ROVP SW SW VIN CIN 0.1 μF FAULT L1 10 μH LED1 LED2 PAD CCOMP 1 μF LED4 EN PWM RISET LED3 COMP EN LED5 MODE LED6 PWM ISET AGND PGND PGND DGND LGND Figure 10. Typical application circuit with LED channels paralleled together to achieve higher LED current (up to 64 mA per string). VBAT 5 to 22 V D1 VIN 4.3 to 5.5 V RPULLUP FAULT CBAT 4.7 μF 35 V CIN 0.1 μF RFSET CCOMP 1 μF EN PWM RISET L1 10 μH VIN ROVP SW SW All ESD capacitors across LED arrays are 0.1 μF COUT 2.2 μF OVP FAULT FSET A8503 PAD COMP LED1 LED2 LED3 LED4 EN LED5 MODE LED6 PWM ISET AGND PGND PGND DGND LGND Figure 11. Typical application circuit for LED modules with ESD capacitors with values up to 10 nF. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 A8503 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch Recommended Components Table Component Rating CBAT 4.7 μF / 35 V, X5R ceramic capacitor CCOMP 1 μF / 10 V CIN 0.1 μF / 10 V Part Number Source GMK316F475ZG-T Taiyo Yuden COUT 2.2 μF / 50 V, X7R GRM31CR71H225KA88L Murata D1 Schottky diode 60 V, 1.5 A 10MQ060NTRPBF International Rectifier RFSET 34 kΩ, 1% RISET 19.6 kΩ, 1% (for 20 mA LED current) ROVP 10 kΩ RPULLUP 10 kΩ L1 10 μH, 1.3 A SLF6028T-100M1R3-PF TDK Alternate inductors 6.8 μH, 1.3 A D53LC A915AY-6R8M Toko 4.7 μH, 1.6 A NP04SZB 4R7N Taiyo Yuden Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 High Efficiency 6-Channel, 2 MHz, WLED/RGB Driver for Medium Displays, with Integrated 55 V Power Switch A8503 Package EC, 26-pin MLP/QFN 0.20 4.00 ±0.15 1 2 0.40 26 26 0.95 A 1 2 C 1.10 4.00 4.00 ±0.15 1.23 Top View 2.45 4.00 27X D SEATING PLANE 0.08 C 0.20 ±0.05 C PCB Layout Reference View 0.75 ±0.05 0.40 For Reference Only (reference JEDEC MO-220WGGE) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area +0.15 0.40 –0.10 B 1.23 1.10 2 1 26 B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 QFN40P400X400X80-29M) All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Coplanarity includes exposed thermal pad and terminals 2.45 Bottom View Copyright ©2009, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 17