LC823433TA CMOS LSI Audio Processing System LSI for MP3 Record and Playback Devices www.onsemi.com Overview LC823433TA is an audio processing system for MP3 record and playback devices. It integrates DSP for digital signal processing and analog blocks such as audio ADC, audio DAC, and speaker and headphone amplifier in addition to LCD segment driver. Features TQFP128 14x14 / TQFP128L 32bit LPDSP32 - SRAM (246KB) PM 75KB (40KB + 35KB : ISOLATED) DMA 170KB (16KB + 154KB:ISOLATED) DMB 1KB (ISOLATED) ISOLATED area : Power ON/OFF control is available by register. - ROM (264.5KB) PM 227.5KB (ISOLATED) DMA 34KB (ISOLATED) DMB 3KB (ISOLATED) ISOLATED area : Power ON/OFF control is available by the register. - SIO (Clock Serial IO 2ch) SIO0 : Ch0 eSIO (Clock speed = Sysclk/1 (max)) program load and execute is possible using Serial Flash (after internal ROM Boot) SIO1 : Ch1 SIO (Clock speed = Sysclk/8 (max)) - UART (1ch) - I2C (1ch Single Master, Full/Standard) - Plain Timer (2ch) Timer0 : w/ Watch Dog Timer Timer1 : w/o Watch Dog Timer and XT1 operation - Multiple Timer (2ch) PWM output (1ch) - RTC (Real Time Clock) Operating voltage is independent of internal core operating voltage. Only RTC power supply can be active during all others inactive (ISOLATED). Continued on next page. * I2C Bus is a trademark of Philips Corporation. ORDERING INFORMATION See detailed ordering and shipping information on page 20 of this data sheet. © Semiconductor Components Industries, LLC, 2015 May 2015 - Rev. 1 1 Publication Order Number : LC823433TA/D LC823433TA Continued from preceding page. - SD card IF (2ch) (w/o CPRM) eSD/eMMC can be connected. SD ch0 : program load and execute using eSD/eMMC (after internal ROM Boot) is possible. SD ch1 : SD card - USB2.0 (480Mbps/12Mbps) Device IF. built-in PHY - 10bit A/D converter (3ch) - GPIO (31ch) (GPIOs share the terminals with other functions. Refer to the terminal list in detail). LCD controller, LCD Driver. 18SEG * 8COM, 1/8Duty, 1/4Bias - Internal ROM Boot is possible. - Firmware writing function. The firmware reading from SD ch1 and writing to the following devices: Serial Flash connected SIO0. eMMC/eSD connected SD ch0. - JTAG (for debugger) Audio Functions - Record and Playback Compression method : MP31 (MPEG1/2/2.5 Layer3). Stereo/Mono compatible. Sampling frequences : 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and 48kHz Bitrate : 8kbps (*1) to 320kbps (for Decoder-VBR) (*1) Encoder supports only Mono (one channel) for 8Kbps. - Adjusting the playback speed Fast playback : 1.0 times to 2.0 times 10 steps. Slow playback : 0.5 times to 1.0 times 10 steps. - Multipurpose filter - Audio data automatic transfer function The audio buffer executes the data transfer between internal SRAM (DMA) and the audio block. Wait cycle(s) is inserted to the LPDSP32 access to the SRAM while the audio buffer accesses to internal SRAM(DMA). - Digital volume, digital mute, BEEP, and level meter The interrupt generation function at the operation completion (e.g. interrupt at mute completion). - Audio timer LR clock count and the interrupt generation function. - Flexible PCM audio interface (two interfaces) Master/Slave Mode Selectable Data Formats : I2S mode etc. - Sample Rate Converters 0.5times to 64 times conversion range. - Digital microphone IF (2ch) Continued on next page. 1 MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and Thomson. Supply of this product does not convey license nor imply any right to distribute content created with this product in revenue-generating broadcast systems (terrestrial, satellite, cable and/or other distribution channels), streaming applications (via Internet, intranets and/or networks), other content distribution systems (pay-audio or audio-on-demand applications and the like) or on physical media (compact discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). Supply of this product does not convey license under the relevant intellectual property of Thomson and/or Fraunhofer Gesellschaft nor imply any right to use this product in any finished end user or ready-to-use final product. An independent license for such use is required. For details, please visit http://mp3licensing.com/. www.onsemi.com 2 LC823433TA Continued from preceding page. Analog function - Microphone amplifier 0/18/24/30dB (2ch) - PGA with ALC -12dB to 35.25dB in 0.75dB steps (2ch) - 16 bit ΔΣADC (2ch) - Digital filter for 16 bits ΔΣDAC (2ch) - AB class amplifier The power supply only to AB class amplifier is possible (ISOLATED). Thermal shutdown circuit built-in Speaker amplifier (1ch BTL) 1dB to 4.5dB in 0.5dB steps Maximum output 300mW @3.0V, Speaker = 8[], 1dB Headphone amplifier (2ch) 0dB to 3dB in 1dB steps (Only same gain setting to 2ch is possible) Maximum output 5mW @3.0V, HeadPhone = 16[], Rd (Series) = 33[], 1dB Clock - RCOSC : Internal RC oscillation. 1MHz (TYP.) - XT1 : Main XTAL. 32.768kHz. Used as an original oscillation of the system clock and the audio clock, and a RTC clock. - XT2 : Optional XTAL. 12MHz (TYP) etc. - PLL1 : For system clock generation (LPDSP32 is included). - PLL2 : For audio clock generation Specification Supply voltage : 1.3V (core, etc), 3.15V (Audio, USB, etc) Maximum operation frequency : 42MHz ([email protected]) Package : 128pin TQFP Application IC Recorder, Audio Player Radio Recorder, Home Audio (Mini compo) www.onsemi.com 3 LC823433TA Specifications Absolute Maximum Ratings at VSS = 0V Parameter Supply voltage Symbol Domain of applicability Ratings Unit VDD1 VDDRTC AVDDPLL1 0.3 to +1.8 V 0.3 to +3.96 V AVDDPHY1 VDD2 VDDLCD AVDDPLL2 AVDDADC AVDDAADC AVDDADAC AVDDSPAMP AVDDPHY2 Input voltage VI 0.3 to *VDD*+0.3 (Max 3.96) V Operating temperature Topr 20 to +75 C Storage temperature Tstg 55 to +125 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Recommended Operating Conditions at Ta = 20C to +75C Parameter Supply voltage Symbol Test Conditions VDD1 typ max Unit 1.15 1.3 1.65 0.9 1.5 1.65 V 1.15 1.3 1.65 V VDD2 2.7 3.15 3.3 V VDDLCD 2.7 3.15 3.3 V AVDDPLL2 2.7 3.15 3.3 V AVDDADC 2.7 3.15 3.3 V AVDDAADC 2.7 2.8 3.3 V AVDDADAC 2.7 2.8 3.3 V VDDRTC AVDDPLL1 AVDDSPAMP Input voltage min V 1.8 3.15 3.8 V AVDDPHY1 1.35 1.5 1.65 V AVDDPHY2 3.0 3.15 3.6 V VIN 0 *VDD* V VIN3 (RTC) 0 3.6 V 0 3.3 V VIN_ADC (AN0-AN2). I_AN 300A Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 4 LC823433TA DC Characteristics at Ta = 20C to +75C, VDD1 = 1.15V to 1.65V, VDD2 = 2.7V to 3.3V, VDDRTC = 0.9V to 1.65V Parameter Input high voltage Symbol VIH Application Test Conditions 3ICUD 3IS, 3ISUD Schmitt 1IC 1IS Input low voltage VIL Schmitt min typ V V 0.7 VDDRTC V 0.7 VDDRTC V Schmitt 1IC Input high leakage current IIH 1IS Schmitt 3ICUD, 3IS, VIN = VDD2 3ISUD Input low leakage current IIL Output high voltage VOH 1IC, 1IS VIN = 3.3V 3IS, 3ISUD VIN = VSS V 0.2 VDDRTC V 0.2 VDDRTC V 10 A 10 A 10 A VIN = VSSRTC 10 A VDD20.4 V 3T4 IOH = 4mA VDD20.4 V 3T4(8) IOH = 4mA VDD20.4 V VDD20.4 V IOH = 6mA 3T2 IOL = 2mA 0.4 V 3T4 IOL = 4mA 0.4 V 3T4(8) IOL = 4mA 0.4 V 0.4 V 0.3 V 10 A (IOL = 8mA) 3T6(12) IOL = 6mA (IOL = 12mA) IOZ 0.25 VDD2 IOH = 2mA (IOH = 12mA) Output leakage current V 3T2 3T6(12) VOL 0.3 VDD2 1IC, 1IS (IOH = 8mA) Output low voltage Unit 0.75 VDD2 3ICUD 3IS, 3ISUD max 0.7 VDD2 OD3 IOL = 0.3mA 3T2, 3T4, When it outputs Hi-Z 10 3T4(8), 3T6(12) Pull-up resistor Rup 3ICUD, 3ISUD Pull-down resistor Rdn 3ICUD, 3ISUD 30 80 190 k 30 80 190 k Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 5 LC823433TA Package Dimensions unit : mm TQFP128 14x14 / TQFP128L CASE 932BA ISSUE A GENERIC MARKING DIAGRAM* XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *This information is generic. Please refer to device data sheet for actual part marking. www.onsemi.com 6 LC823433TA Pin Assignment (Bonding Option) Direction I Input pin O Output pin B P Attribute 3IS 3V Schmitt input 1IS 1V Schmitt input. 3ICUD 3V CMOS input pull-up/down 1IC 1V CMOS input Bidirectional pin 3ISUD 3V Schmitt input pull-up/down OD3 1V 0.3mA open drain output Power supply pin 3T2 3V 2mA tristate output 3T4 3V 4mA tristate output X Oscillation amplifier 3T4(8) Tristate output with 3V 4mA/8mA switch function 3A 3V analog through 3T6(12) Tristate output with 3V 6mA/12mA switch 1A 1V analog through (3V tolerant correspondence) (3V tolerant correspondence) (3V tolerant correspondence) function TQFP128L Name Pin No. Direction Attribute 1 AVSSSPAMP P 2 AVDDSPAMP P 3 AVREFSP O 3A 4 HPINL/SPKINM I 3A 5 HPINR I 3A 6 AVSSADAC P 7 OUTMR O 3A 8 OUTML/OUTM O 3A P 9 AVDDADAC 10 AVSSAADC P 11 AVREF O 3A 12 AVDDAADC P 13 AINL I 3A 14 AINR I 3A 15 AVDDADC P 16 AN0 I 3A 17 AN1 I 3A 18 AN2 I 3A 19 VSS P 20 VDD2 P 21 VDD1 P 22 TIOCA0/P10 B/B 3ISUD/3T2 23 BMODE0 I 3IS 24 BMODE1 I 3IS 25 BMODE2 I 3IS 26 NRES I 3IS 27 SDCLK1/MCLK1/P00 O/B/B 3ISUD/3T6(12) 28 SDCMD1/LRCK1/P02 B/O/B 3ISUD/3T4(8) 29 SDAT10/BCK1/P03 B/B/B 3ISUD/3T4(8) 30 SDAT11/DIN1/P04 B/I/B 3ICUD/3T4(8) 31 SDAT12/DOUT1/P05 B/O/B 3ICUD/3T4(8) 32 SDAT13/SDO1/P06 B/O/B 3ICUD/3T4(8) 33 SDWP1/SDI1/P01 I/I/B 3ISUD/3T2 34 SDCD1/SCK1/P0A I/B/B 3ISUD/3T2 35 SDCLK0/P14 O/B 3ICUD/3T6(12) 36 VDD2 P 37 VSS P 38 SDCMD0/P15 B/B 3ICUD/3T4(8) Continued on next page. www.onsemi.com 7 LC823433TA Continued from preceding page. TQFP128L Name Pin No. Direction Attribute 39 SDAT03/P16 B/B 3ICUD/3T4(8) 40 SDAT02/P17/SYSCLK B/B/O 3ICUD/3T4(8) 41 SDAT01/P18/AUD0CLK B/B/O 3ICUD/3T4(8) 42 SDAT00/P19/AUD1CLK B/B/O 3ICUD/3T4(8) 43 VSS P 44 XIN2 I X 45 XOUT2 O X 46 AVDDPHY1(+VDD1) P 47 AVSSPHY1 P 48 AVSSPHY1 P 49 RREF B 50 AVSSPHY2 P 51 AVDDPHY2 P 52 AVDDPHY2 P 53 AVSSPHY2 P 54 AVSSPHY2 P 55 AVSSPHY2 P 56 AVDDPHY2 P 57 DP B 3A 58 DM B 3A 59 AVSSPHY2 P 60 AVDDPHY2 P 61 COM0 O 3A 62 COM1 O 3A 63 COM2 O 3A 64 COM3 O 3A 65 VDDLCD P 66 VLCD1 O 3A 67 VLCD2 O 3A 68 VLCD3 O 3A 69 VSS P 70 VDD1 P 71 SEG0 O 3A 72 SEG1 O 3A 73 SEG2 O 3A 74 SEG3 O 3A 75 SEG4 O 3A 76 SEG5 O 3A 77 SEG6 O 3A 78 SEG7 O 3A 79 SEG8 O 3A 80 SEG9 O 3A 81 SEG10 O 3A 82 SEG11 O 3A 83 SEG12 O 3A 84 SEG13 O 3A 85 SEG14 O 3A 86 SEG15 O 3A 87 SEG16 O 3A 88 SEG17 O 3A 89 COM4 O 3A 90 COM5 O 3A 3A Continued on next page. www.onsemi.com 8 LC823433TA Continued from preceding page. TQFP128L Name Pin No. Direction Attribute 91 COM6 O 92 COM7 O 3A 3A 93 HPDET/SDI1/SCL/P1A I/I/O/B 3ISUD/3T2 94 HPMUTE/SDO1/SDA/P1B O/O/B/B 3ISUD/3T2 95 JTDO/P1C O/B 3ICUD/3T2 96 JTDI/P1D I/B 3ICUD/3T2 97 JTMS/P1E I/B 3ICUD/3T2 98 JTCK/P1F I/B 3ICUD/3T2 99 VDD1 P VDD2 SFMODE P 100 (Internal Signal) I 3IS 101 VSS P 102 TXD/SCL/P12 O/O/B 3ISUD/3T2 103 RXD/SDA/P13 I/B/B 3ISUD/3T2 104 SCK0/P07 B/B 3ISUD/3T4 105 SDO0/P08 O/B 3ISUD/3T4 106 SDI0/P09 I/B 3ISUD/3T2 107 MCLK0/DMCKO/SCK1/P0B B/O/B/B 3ISUD/3T2 108 DIN0/DMDIN/P0F I/I/B 3ISUD/3T2 109 DOUT0/P0E/NCS O/B/O 3ISUD/3T2 110 KEYINT1 I 1IS 111 KEYINT0 I 1IS 112 RTCRSTB I 1IC 113 PWRON O OD3 114 LINEFIXB I 1IS 115 XOUT32K O X 116 XIN32K I X 117 VDDRTC RTCMODE P (Internal Signal) I 1IS 118 VSSRTC P 119 AVDDPLL1 P 120 VCNT1 O 121 VSS P 122 AVDDPLL2 P 123 VCNT2 O 124 AVSSPLL2 P 125 HPOUTR O 3A 126 HPOUTL O 3A 1A 3A 127 SPOUTP O 3A 128 SPOUTN O 3A www.onsemi.com 9 LC823433TA Block Diagram JTAG RCOSC OSCCON System Clock (System) XT1 ON Semiconductor Peripheral0 Clock XT2 PLL1 Peripheral2 Clock System Clock DMA DMB DMIO OSCCON (FUNC) FUNCCLK1 XT2 System Clock 32 DMB OSCCON Audio Clock0 (Audio) XT1 XT2 PLL2 BCK0, BCK1 Audio Clock1 64 PDM DMA ISOLATED Dig MIC SRAM (154KB) + (16KB) PGA(ALC) MIC -12 to 35.25dB MIC ISOLATED ISOLATED 16bit A/D 0/18/24/30dB Plain Timer0 64 -12 to 35.25dB Plain Timer1 FUNCCLK1 MUX DF + ALC P/S “Lch” or “+” ISOLATED “+” “-” AUDIO functions (SRC, VOLUME, etc) “Rch” LPF AVDDADAC (Write To, Read From DMA) 1 eSIO (SIO0) SIO S-Flash Boot Ch0 etc UART “Lch” AVDDSPAMP 0 to 3dB(Lch, Rch common) PCM1 OUT 10bit A/D Peripheral2 “Rch” Peripheral0 VDD1 VDD2 AVDDADC VDDLCD AVDDPLL1 AVDDPLL2 Logic I/O 10bit A/D LCDCTL PLL1 PLL2 18seg × 8com or 36seg × 4com(TBD) LCD eMMC/eSD Boot Ch0 eSD eMMC Ch1 SD I/F Firmware DL etc USB2.0 HS Device ISOLATED 3 LCD CTL FUNCCLK1 S/P Boot monitor etc GPIO P/S PCM1 IN USB2.0 PHY XT2 or XT2/2 RTC VDDRTC LCD I2C 1 to 4.5dB HeadPhone PWM SIO Ch1 eSIO (SIO1) Peripheral1 PWM LPF Multiple Timer Audio Buffer 16bit D/A (2ch/BTL) Speaker ROM (227.5KB) PGA(ALC) MIC AMP AVDDAADC SRAM (35KB) + (40KB) ROM (34KB) 16bit A/D 0/18/24/30dB 40 PM ISOLATED S/P MIC AMP PCM0 OUT 32 ISOLATED Arbiter Digital MIC IF PRG SRAM (1KB) ROM (3KB) MCLK0, MCLK1 PCM0 IN IRQ 15ch FUNCCLK0 XT1 XT2 Sanyo 32bit32bit DSP DSP LPDSP32 LPDSP32 Peripheral1 Clock AVDDPHY2 AVDDPHY1 XT1 32.768kHz Note - Refer to the pin assignment for port share - ISOLATED SRAMs and ROMs described in this figure can be power off by a register, in addition to the tiny SRAMs (not described in this figure) in the SD I/F, USB2.0, SRC, 16bit D/A, DF. www.onsemi.com 10 LC823433TA Pin Functions JTAG Pin name Pol. Type Description Num. JTDO/ -/ O/ JTAG test data output/ P1C - B General purpose port JTDI/ -/ I/ JTAG test data input/ P1D - B General purpose port. The input level of the terminal JTDI is taken by rising edge of the terminal NRES. 1 1 The value can be read as a register, and can be used as the operation mode setting. JTMS/ -/ I/ JTAG test mode selection/ P1E - B General purpose port The input level of the terminal JTMS is taken by rising edge of the terminal NRES. 1 The value can be read as a register, and can be used as the operation mode setting. JTCK/ Pos/ I/ JTAG test clock/ P1F - B General purpose port 1 Total 4 RTC Pin name Pol. Type Description XIN32K Pos I 32.768kHz oscillation amplifier input (XT1) Num. 1 XOUT32K - O 32.768kHz oscillation amplifier output (XT1) 1 RTCRSTB Neg I RTC reset input (VDET) Neg I There is an optional bonding as Power supply watch comparison input. PWRON - O Main power supply ON/OFF control (RTCINT) Neg O There is an optional bonding as RTC interrupt output. LINEFIXB Neg I RTC isolator cutting and the connection (BACKUPB) Neg I There is an optional bonding as RTC operation mode selection. VDDRTC - P RTC block power supply. 1 - P RTC ground pin. 1 1 1 1 VSSRTC Total 7 www.onsemi.com 11 LC823433TA SIO (synchronous serial) interface Ch0 (eSIO)/Timer PWM output/General purpose port Pin name Pol. Type Description Num. SCK0/ Pos/ B/ Serial I/F Ch0 clock/ P07 - B General purpose port 1 (It is possible to use it as an external interrupt input.) SDO0/ -/ O/ Serial I/F Ch0 data output/ P08 - B General purpose port (It is possible to use it as an external interrupt input). (SDO0(SIO0)) -(-) O(B) SDI0/ -/ I/ Serial I/F Ch0 data input/ P09 - B General purpose port 1 There is an optional bonding as serial I/F Ch0 data output (Data I/O 0 when at high speed operating). (It is possible to use it as an external interrupt input). (SDI0(SIO3)) -(-) I(B) There is an optional bonding as serial I/F Ch0 data input TIOCA0/ -/ B/ MTM Ch0 A input capture and output capture/ P10 - B General purpose port - P There is an optional bonding as VSS. 1 (Data I/O 3 when at high speed operating). (VSS) 1 Total 4 UART (asynchronization serial) interface/I2C interface/General purpose port Pin name Pol. Type Description Num. TXD/ -/ O/ UART transmitted serial data output/ SCL/ -/ O/ I2C clock output (open drain output)/ P12 - B General purpose port RXD/ -/ I/ UART received serial data input/ SDA/ -/ B/ I2C data (open drain output)/ P13 - B General purpose port 1 (It is possible to use it as an external interrupt input). 1 (It is possible to use it as an external interrupt input). Total 2 Headphone control/SIO (synchronous serial) interface Ch1 (SDI, SDO)/I2C interface/General purpose port Pin name Pol. Type Description HPDET/ Pos/ I/ Headphone insertion detection/ SDI1/ -/ I/ Serial I/F Ch1 data input/ SCL/ -/ O/ I2C clock output (open drain output)/ P1A - B General purpose port (It is possible to use it as an external interrupt input). HPMUTE/ Pos/ O/ Headphone mute/ SDO1/ -/ O/ Serial I/F Ch1 data output/ SDA/ -/ B/ I2C data (open drain output)/ - B General purpose port P1B Num. Total 1 1 2 www.onsemi.com 12 LC823433TA PCM interface Ch0/Digital mic interface/ SIO (synchronous serial) interface Ch1 (SCK)/General purpose port/RTC (KeyInt RTC model) Pin name Pol. Type Description Num. MCLK0/ Pos/ B/ PCM Ch0 master clock/ DMCKO/ -/ O/ Digital mic clock output/ SCK1/ -/ B/ Serial I/F Ch1 clock/ P0B - B General purpose port KEYINT1 - I 1 (It is possible to use it as an external interrupt input). KEY interrupt1 (Notes: Operate in VDDRTC and the VSSRTC power supply). (NHOLD(SIO1)) - O(B) There is an optional bonding as serial I/F Ch0 hold output (Data I/O 1 when at high speed operating). (BCK0/ -/ B/ P0C) - B General purpose port KEYINT0 - I KEY interrupt0 1 There is an optional bonding as PCM Ch0 bit clock/ (Notes: Operate in VDDRTC and the VSSRTC power supply). (NWP(SIO2)) O(B) - (LRCK0/ P0D) -/ There is an optional bonding as serial I/F Ch0 write protect output (Data I/O 2 when high speed operating). B/ There is an optional bonding as PCM Ch0 LR clock/ B General purpose port - 1 (It is possible to use it as an external interrupt input). DIN0/ -/ I/ PCM Ch0 data input/ DMDIN/ -/ I/ Digital mic data input/ P0F - B General purpose port DOUT0/ -/ O/ PCM Ch0 data output/ P0E/ -/ B/ General purpose port NCS Neg O 1 (It is possible to use it as an external interrupt input). (It is possible to use it as an external interrupt input)/ CS for serial I/F Ch0 (When it boots from internal ROM and the program from SerialFlash connected to serial I/F Ch0 is loaded, it is used as CS 1 control terminal of SerialFlash). Neg (NCS) O There is an optional bonding as CS for serial I/F Ch0. Total 5 www.onsemi.com 13 LC823433TA SD interface Ch0/General purpose port Pin name Pol. Type Description Num. SDCLK0/ Pos/ O/ SD card I/F Ch0 clock output/ P14 - B General purpose port SDCMD0/ -/ B/ SD card I/F Ch0 command line/ P15 - B General purpose port SDAT03/ -/ B/ SD card I/F Ch0 data 3/ P16 - B General purpose port SDAT02/ -/ B/ SD card I/F Ch0 data 2/ P17/ -/ B/ General purpose port/ SYSCLK - O System Clock output (for evaluation) SDAT01/ -/ B/ SD card I/F Ch0 data 1/ P18/ -/ B/ General purpose port/ AUD0CLK - O Audio0 Clock output (for evaluation) SDAT00/ -/ B/ SD card I/F Ch0 data 0/ P19/ -/ B/ General purpose port/ AUD1CLK - O Audio1 Clock output (for evaluation) 1 1 1 1 1 1 Total 6 SD interface Ch1/PCM interface Ch1/SIO (synchronous serial) interface Ch1/General purpose port Pin name Pol. Type Description SDCLK1/ Pos/ O/ SD card I/F Ch1 clock output/ Num. MCLK1/ Pos/ O/ PCM Ch1 master clock/ P00 - B General purpose port SDCMD1/ -/ B/ SD card I/F Ch1 command line/ LRCK1/ -/ B/ PCM Ch1 LR clock/ P02 - B General purpose port SDAT13/ -/ B/ SD card I/F Ch1 data 3/ SDO1/ -/ O/ Serial I/F Ch1 data output/ P06 - B General purpose port SDAT12/ -/ B/ SD card I/F Ch1 data 2/ DOUT1/ -/ O/ PCM Ch1 data output/ P05 - B General purpose port SDAT11/ -/ B/ SD card I/F Ch1 data 1/ DIN1/ -/ I/ PCM Ch1 data input/ P04 - B General purpose port SDAT10/ -/ B/ SD card I/F Ch1 data 0/ BCK1/ -/ B/ PCM Ch1 bit clock/ P03 - B General purpose port SDWP1/ -/ I/ SD card I/F Ch1 write protect/ SDI1/ -/ I/ Serial I/F Ch1 data input/ P01 - B General purpose port SDCD1/ -/ I/ SD card I/F Ch1 card detect/ SCK1/ -/ B/ Serial I/F Ch1 clock/ P0A - B General purpose port 1 1 1 1 1 1 1 (It is possible to use it as an external interrupt input). 1 (It is possible to use it as an external interrupt input). Total 8 www.onsemi.com 14 LC823433TA Oscillation amplifier and PLL Pin name Pol. Type Description Num. XIN2 Pos I Oscillation amplifier input for audio (XT2) 1 XOUT2 - O Oscillation amplifier output for audio (XT2) 1 VCNT1 - O VCO control for PLL1 1 AVDDPLL1 - P Analog power supply for PLL1 1 AVSSPLL1 - P Analog ground for PLL1 1 VCNT2 - O VCO control for PLL2 1 AVDDPLL2 - P Analog power supply for PLL2 1 AVSSPLL2 - P Analog ground for PLL2 1 Total 8 10bitA/D Pin name Pol. Type Description AN[2:0] - I ADC input Num. 3 AVDDADC - P Power supply for ADC 1 VSS - P Ground for ADC. It connects VSS in LSI (terminal sharing). 1 (AVSSADC) Total There is an optional bonding as dedicated ground AVSSADC . 5 Audio CODEC Pin name Pol. Type Description Num. AINL - I AINR - I Analog voice input Rch (stereo) AVREF - O Audio ADC reference output 1 AVDDAADC - P Power supply for audio ADC 1 1 Analog voice input Lch (stereo) Analog voice input (monaural). 1 1 AVSSAADC - P Ground for audio ADC OUTML/ -/ O/ Audio DAC PWM output (Lch for HP)/ OUTM - O Audio DAC PWM output (monaural for speaker) OUTMR - O Audio DAC PWM output (Rch for HP) 1 AVDDADAC - P Power supply for audio DAC 1 AVSSADAC - P Ground for audio DAC 1 HPINL/ - I/ Headphone amplifier input (Lch) / I Speaker amplifier input (monaural) SPKINM 1 1 HPINR - I Headphone amplifier input (Rch) 1 SPOUTP - O AB class speaker amplifier output (+) 1 SPOUTN - O AB class speaker amplifier output (-) 1 HPOUTL - O Headphone amplifier output (Lch) 1 HPOUTR - O Headphone amplifier output (Rch) 1 AVREFSP - O AB class amplifier reference output 1 AVDDSPAMP - P Analog power supply for AB class amplifier 1 AVSSSPAMP - P Analog ground for AB class amplifier 1 Total 18 www.onsemi.com 15 LC823433TA LCD Driver (4COM/8COM bonding switch) Pin name Pol. Type Description Num. SEG[17:0] - O Segment output for LCD COM[7:4] - O COM [7:4], Common driver output for LCD 18 (when 8COM is used). 4 (SEG[21:18]) - O There is an optional bonding as segment outputs, SEG[21:18], COM[3:0] - O Common driver output for LCD. for the LCD(when 4COM is used). •Both 8COM and 4COM ··· COM[3:0]. VLCD1 - O 4 LCD drive voltage output 1 •When 1/3bias is used ··· 2 * VDDLCD /3. 1 •When 1/4bias is used ··· 3 * VDDLCD /4. VLCD2 - O LCD drive voltage output 2 •When 1/3bias is used ··· 1 * VDDLCD /3. 1 •When 1/4bias is used ··· 2 * VDDLCD /4. VLCD3 - O LCD drive voltage output 3 •When 1/3bias is used ··· 1 * VDDLCD /3. 1 •When 1/4bias is used ··· 1 * VDDLCD /4. VDDLCD - P 3V power supply for LCD driver Total 1 30 www.onsemi.com 16 LC823433TA USB 2.0 HS Device/LCD Driver (bonding switch when 4COM is used) Pin name Pol. Type Description Num. DP - B USB D+ (Device) (SEG32) - O There is an optional bonding as segment output 32 for LCD. DM - B USB D- (Device) (SEG33) - O There is an optional bonding as segment output 33 for LCD. RREF - B Reference resistance for USB PHY. (SEG24) - O There is an optional bonding as segment output 24 for LCD. AVDDPHY1 - P Analog 1.5V power supply for USB PHY. 1 1 1 It connects VDD1 in LSI (terminal sharing). AVSSPHY1 - P Analog ground for USB PHY. (SEG22) - O There is an optional bonding as segment output 22 for LCD. AVSSPHY1 - P Analog ground for USB PHY. (SEG23) - O There is an optional bonding as segment output 23 for LCD. AVDDPHY2 - P Analog 3.3V power supply for USB PHY. (SEG26) - O There is an optional bonding as segment output 26 for LCD. AVDDPHY2 - P Analog 3.3V power supply for USB PHY. (SEG27) - O There is an optional bonding as segment output 27 for LCD. AVDDPHY2 - P Analog 3.3V power supply for USB PHY. (SEG31) - O There is an optional bonding as segment output 31 for LCD. AVDDPHY2 - P Analog 3.3V power supply for USB PHY. (SEG35) - O There is an optional bonding as segment output 35 for LCD. AVSSPHY2 - P Analog ground for USB PHY. (SEG25) - O There is an optional bonding as segment output 25 for LCD. AVSSPHY2 - P Analog ground for USB PHY. (SEG28) - O There is an optional bonding as segment output 28 for LCD. AVSSPHY2 - P Analog ground for USB PHY. (SEG29) - O There is an optional bonding as segment output 29 for LCD. AVSSPHY2 - P Analog ground for USB PHY. (SEG30) - O There is an optional bonding as segment output 30 for LCD. AVSSPHY2 - P Analog ground for USB PHY. (SEG34) - O There is an optional bonding as segment output 34 for LCD. 1 1 1 1 1 1 1 1 1 1 1 1 Total 15 www.onsemi.com 17 LC823433TA Power supply etc. Pin name Pol. Type Description BMODE[2:0] - I Operation mode selection Num. NRES Neg I External reset and GPIO•LCD driver output force input 3 •When it is active (L input), the state of the GPIO•LCD driver is forced, and LED lighting and the LCD display is controlled until reset depends on LSI. When Low is input : GPIO = Hiz, LCD = Low Fixed (PIOFIXB). 1 •The state of JTDI and JTMS of JTAG is taken into the internal register by rising edge of NRES (for operation mode setting). VDD1 - P Digital internal power supply There is one VDD1 which is also connected with AVDDPHY1. VDD2 - P Digital IO power supply VSS - P Digital ground There is one VSS which is also connected with AVSSADC. 3 3 4 Total 14 Total 128 Notes : Do not open an unused digital input terminal or a digital bidirectional terminal of input state, and set Pull-up/Pull-down register in ON (only terminals with this function) or connect to digital IO power supply or digital ground. Left open AINL, AINR, HPINL/SPKINM, and HPINR terminals if they are not used (do not fix to L or H). Operational mode Various boot modes etc. can be selected by switching BMODE[2:0] terminal. BMODE2 BMODE1 BMODE0 Operational mode 0 0 0 Internal ROM boot (eMMC Physical Boot - SD interface Ch0) 0 0 1 Internal ROM boot (IPL Boot - SD interface Ch0) 0 1 0 Internal ROM boot (Partition Boot - SD interface Ch0) 0 1 1 Internal ROM boot 1 0 0 (External Serial Flash Boot - SIO (synchronous serial) interface Ch0) Liberation of the terminal for SD interface Ch0 and SIO Ch0 (SDCLK0, SDCMD0, SDAT03, SDAT02, SDAT01, SDAT00, SCK0, SDO0, SDI0, and DOUT0 (NCS) are output Hiz). 1 0 1 Internal ROM boot (Deletion Partition area and IPL user area – SD interface Ch0 and SIO external Serial Flash Ch0) 1 1 0 LSI test mode (Do not set to this mode when working actually). 1 1 1 LSI test mode (Do not set to this mode when working actually). www.onsemi.com 18 LC823433TA Pin Type EN A EN3 PAD CTU Y 3ICUD/ 3T2 CTD EN3 = 0: PAD is configured as input & Pull_up OFF, Pull_down OFF, EN3 = 1 normal EN A EN3 PAD CTU 3ISUD/ 3T2 Y 3ISUD/ 3T4 CTD EN3 = 0: PAD is configured as input & Pull_up OFF, Pull_down OFF, EN3 = 1 normal EN A EN3 PAD CTI CTU 3ICUD/ Y 3T4(8) 3ICUD/ CTD 3T6(12) CTI current ability switch terminal 0: 4mA 1: 8mA/ 0: 6mA 1: 12mA EN3 = 0:PAD is configured as input & Pull_up OFF, Pull_down OFF, EN3 = 1 normal EN A EN3 PAD CTI CTU 3ISUD/ Y 3T4(8) 3ISUD/ 3T6(12) CTD CTI current ability switch terminal 0: 4mA 1: 8mA/ 0: 6mA 1: 12mA EN3 = 0: PAD is configured as input & Pull_up OFF, Pull_down OFF, EN3 = 1 normal Continued on next page. www.onsemi.com 19 LC823433TA Continued from preceding page. 1IC 1IS PAD Y PAD Y 3IS PAD OD3 EN ORDERING INFORMATION Device LC823433TAK-2H Package Shipping (Qty / Packing) TQFP128 14x14 / TQFP128L (Pb-Free / Halogen Free) 450 / Tray JEDEC ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. 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