MC33153 D

MC33153
Single IGBT Gate Driver
The MC33153 is specifically designed as an IGBT driver for high
power applications that include ac induction motor control, brushless
dc motor control and uninterruptable power supplies. Although
designed for driving discrete and module IGBTs, this device offers a
cost effective solution for driving power MOSFETs and Bipolar
Transistors. Device protection features include the choice of
desaturation or overcurrent sensing and undervoltage detection. These
devices are available in dual−in−line and surface mount packages.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
8
High Current Output Stage: 1.0 A Source/2.0 A Sink
Protection Circuits for Both Conventional and Sense IGBTs
Programmable Fault Blanking Time
Protection against Overcurrent and Short Circuit
Undervoltage Lockout Optimized for IGBT’s
Negative Gate Drive Capability
Cost Effectively Drives Power MOSFETs and Bipolar Transistors
This is a Pb−Free and Halide−Free Device
SOIC−8
D SUFFIX
CASE 751
1
1
8
PDIP−8
P SUFFIX
CASE 626
1
VCC
33153
ALYW
G
MC33153P
AWL
YYWWG
1
6
VCC
Short Circuit
Comparator
VCC
Short Circuit
Latch
S
Q
R
Fault
Output 7
VEE
VCC
Overcurrent
Comparator
Overcurrent
Latch
S
Q
R
Current
Sense
1 Input
130 mV
65 mV
VCC
VEE
VCC
2
Kelvin
GND
A
= Assembly Location
L, WL = Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
270 mA
Fault Blanking/
Desaturation
Comparator
6.5 V
VEE
Fault
8 Blanking/
Desaturation
Input
VCC
Output
Stage
VCC
Input
VCC
4
VEE
Drive
5 Output
Under
Voltage
Lockout
Current Sense
Input
1
8 Fault Blanking/
Desaturation Input
Kelvin GND
2
7 Fault Output
VEE
3
6 VCC
Input
4
5 Drive Output
(Top View)
100 k
ORDERING INFORMATION
VEE
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
12 V/
11 V
3
VEE
This device contains 133 active transistors.
Figure 1. Representative Block Diagram
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 8
1
Publication Order Number:
MC33153/D
MC33153
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC − VEE
KGND − VEE
20
V
Vin
VEE −0.3 to VCC
V
Current Sense Input
VS
−0.3 to VCC
V
Blanking/Desaturation Input
VBD
−0.3 to VCC
V
Power Supply Voltage
VCC to VEE
Kelvin Ground to VEE (Note 1)
Logic Input
Gate Drive Output
Source Current
Sink Current
Diode Clamp Current
IO
Fault Output
Source Current
Sink Current
IFO
Power Dissipation and Thermal Characteristics
D Suffix SO−8 Package, Case 751
Maximum Power Dissipation @ TA = 50°C
Thermal Resistance, Junction−to−Air
P Suffix DIP−8 Package, Case 626
Maximum Power Dissipation @ TA = 50°C
Thermal Resistance, Junction−to−Air
A
1.0
2.0
1.0
mA
25
10
PD
RqJA
0.56
180
W
°C/W
PD
RqJA
1.0
100
W
°C/W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature
TA
−40 to +105
°C
Tstg
−65 to +150
°C
Storage Temperature Range
Electrostatic Discharge Sensitivity (ESD) (Note 2)
Human Body Model (HBM)
Machine Model (MM)
Charged Device Model (CDM)
ESD
V
2500
250
1500
NOTE: ESD data available upon request.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Kelvin Ground must always be between VEE and VCC.
2. ESD protection per JEDEC Standard JESD22−A114−F for HBM
per JEDEC Standard JESD22−A115−A for MM
per JEDEC Standard JESD22−C101D for CDM.
ELECTRICAL CHARACTERISTICS (VCC = 15 V, VEE = 0 V, Kelvin GND connected to VEE. For typical values TA = 25°C,
for min/max values TA is the operating ambient temperature range that applies (Note 3), unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Input Threshold Voltage
High State (Logic 1)
Low State (Logic 0)
VIH
VIL
−
1.2
2.70
2.30
3.2
−
Input Current
High State (VIH = 3.0 V)
Low State (VIL = 1.2 V)
IIH
IIL
−
−
130
50
500
100
Output Voltage
Low State (ISink = 1.0 A)
High State (ISource = 500 mA)
VOL
VOH
−
12
2.0
13.9
2.5
−
Output Pull−Down Resistor
RPD
−
100
200
VFL
VFH
−
12
0.2
13.3
1.0
−
Unit
LOGIC INPUT
V
mA
DRIVE OUTPUT
V
kW
FAULT OUTPUT
Output Voltage
Low State (ISink = 5.0 mA)
High State (ISource = 20 mA)
3. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible.
Thigh = +105°C for MC33153
Tlow = −40°C for MC33153
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2
V
MC33153
ELECTRICAL CHARACTERISTICS (continued) (VCC = 15 V, VEE = 0 V, Kelvin GND connected to VEE. For typical values TA = 25°C,
for min/max values TA is the operating ambient temperature range that applies (Note 4), unless otherwise noted.)
Symbol
Min
Typ
Max
tPLH(in/out)
tPHL (in/out)
−
−
80
120
300
300
Drive Output Rise Time (10% to 90%) CL = 1.0 nF
tr
−
17
55
ns
Drive Output Fall Time (90% to 10%) CL = 1.0 nF
tf
−
17
55
ns
tP(OC)
tP(FLT)
−
0.3
1.0
ms
Startup Voltage
VCC start
11.3
12
12.6
V
Disable Voltage
VCC dis
10.4
11
11.7
V
Overcurrent Threshold Voltage (VPin8 > 7.0 V)
VSOC
50
65
80
mV
Short Circuit Threshold Voltage (VPin8 > 7.0 V)
VSSC
100
130
160
mV
Vth(FLT)
6.0
6.5
7.0
V
ISI
−
−1.4
−10
mA
Ichg
−200
−270
−300
mA
Idschg
1.0
2.5
−
mA
−
−
7.2
7.9
14
20
Characteristic
Unit
SWITCHING CHARACTERISTICS
Propagation Delay (50% Input to 50% Output CL = 1.0 nF)
Logic Input to Drive Output Rise
Logic Input to Drive Output Fall
Propagation Delay
Current Sense Input to Drive Output
Fault Blanking/Desaturation Input to Drive Output
ns
UVLO
COMPARATORS
Fault Blanking/Desaturation Threshold (VPin1 > 100 mV)
Current Sense Input Current (VSI = 0 V)
FAULT BLANKING/DESATURATION INPUT
Current Source (VPin8 = 0 V, VPin4 = 0 V)
Discharge Current (VPin8 = 15 V, VPin4 = 5.0 V)
TOTAL DEVICE
ICC
Power Supply Current
Standby (VPin 4 = VCC, Output Open)
Operating (CL = 1.0 nF, f = 20 kHz)
mA
4. Low duty cycle pulse techniques are used during test to maintain the junction temperature as close to ambient as possible.
Thigh = +105°C for MC33153
Tlow = −40°C for MC33153
1.5
16
VCC = 15 V
TA = 25°C
VO , OUTPUT VOLTAGE (V)
I in , INPUT CURRENT (mA)
14
1.0
0.5
VCC = 15 V
TA = 25°C
0
0
2.0
4.0
6.0
8.0
10
12
14
12
10
8.0
6.0
4.0
2.0
0
16
0
1.0
2.0
3.0
4.0
Vin, INPUT VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 2. Input Current versus Input Voltage
Figure 3. Output Voltage versus Input Voltage
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3
5.0
VCC = 15 V
3.0
VIH
2.8
2.6
2.4
VIL
2.2
2.0
-60
-40
-20
0
20
40
60
80
100
120
140
2.6
2.5
2.4
VIL
2.3
2.2
12
13
14
15
16
17
18
19
Figure 4. Input Threshold Voltage
versus Temperature
Figure 5. Input Threshold Voltage
versus Supply Voltage
V OL, OUTPUT LOW STATE VOLTAGE (V)
ISink = 1.0 A
= 500 mA
1.5
= 250 mA
1.0
0.5
VCC = 15 V
-20
0
20
40
60
80
100
120
1.6
1.2
0.8
0.4
TA = 25°C
VCC = 15 V
0
0.2
0.4
0.6
0.8
TA, AMBIENT TEMPERATURE (°C)
ISink, OUTPUT SINK CURRENT (A)
Figure 6. Drive Output Low State Voltage
versus Temperature
Figure 7. Drive Output Low State Voltage
versus Sink Current
13.9
13.8
13.7
VCC = 15 V
ISource = 500 mA
13.6
-40
-20
0
20
40
60
80
100
120
140
1.0
15.0
VCC = 15 V
TA = 25°C
14.6
14.2
13.8
13.4
13.0
0
0.1
0.2
0.3
0.4
TA, AMBIENT TEMPERATURE (°C)
ISource, OUTPUT SOURCE CURRENT (A)
Figure 8. Drive Output High State Voltage
versus Temperature
Figure 9. Drive Output High State Voltage
versus Source Current
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20
2.0
0
140
14.0
13.5
-60
TA = 25°C
VIH
2.7
VCC, SUPPLY VOLTAGE (V)
2.0
-40
2.8
TA, AMBIENT TEMPERATURE (°C)
2.5
0
-60
VOH , DRIVE OUTPUT HIGH STATE VOLTAGE (V)
V IH - V IL , INPUT THRESHOLD VOLTAGE (V)
3.2
VOH , DRIVE OUTPUT HIGH STATE VOLTAGE (V)
V OL, OUTPUT LOW STATE VOLTAGE (V)
V IH - V IL , INPUT THRESHOLD VOLTAGE (V)
MC33153
0.5
MC33153
12
10
8.0
6.0
4.0
2.0
55
60
65
70
75
10
8.0
6.0
4.0
2.0
110
120
130
140
150
VPin 1, CURRENT SENSE INPUT VOLTAGE (mV)
VPin 1, CURRENT SENSE INPUT VOLTAGE (mV)
Figure 10. Drive Output Voltage
versus Current Sense Input Voltage
Figure 11. Fault Output Voltage
versus Current Sense Input Voltage
70
VCC = 15 V
68
66
64
62
60
-60 -40
-20
0
20
40
60
80
100
120
140
TA = 25°C
68
66
64
62
60
12
14
16
18
VCC, SUPPLY VOLTAGE (V)
Figure 12. Overcurrent Protection Threshold
Voltage versus Temperature
Figure 13. Overcurrent Protection Threshold
Voltage versus Supply Voltage
VCC = 15 V
130
-40
-20
0
20
40
60
80
100
120
140
160
70
TA, AMBIENT TEMPERATURE (°C)
135
125
-60
VCC = 15 V
VPin 4 = 0 V
VPin 8 > 7.0 V
TA = 25°C
12
0
100
80
V SOC , OVERCURRENT THRESHOLD VOLTAGE (mV)
V SOC , OVERCURRENT THRESHOLD VOLTAGE (mV)
0
50
VSSC, SHORT CIRCUIT THRESHOLD VOLTAGE (mV)
V Pin 7, FAULT OUTPUT VOLTAGE (V)
14
VCC = 15 V
VPin 4 = 0 V
VPin 8 > 7.0 V
TA = 25°C
14
VSSC, SHORT CIRCUIT THRESHOLD VOLTAGE (mV)
VO , DRIVE OUTPUT VOLTAGE (V)
16
20
135
TA = 25°C
130
125
12
14
16
18
20
TA, AMBIENT TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 14. Short Circuit Comparator Threshold
Voltage versus Temperature
Figure 15. Short Circuit Comparator Threshold
Voltage versus Supply Voltage
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0
VO , DRIVE OUTPUT VOLTAGE (V)
16
VCC = 15 V
TA = 25°C
-0.5
-1.0
-1.5
0
2.0
4.0
6.0
8.0
10
12
14
VCC = 15 V
VPin 4 = 0 V
VPin 1 > 100 mV
TA = 25°C
12
10
8.0
6.0
4.0
2.0
6.4
6.6
6.8
VPin 8, FAULT BLANKING/DESATURATION INPUT VOLTAGE (V)
Figure 16. Current Sense Input Current
versus Voltage
Figure 17. Drive Output Voltage versus Fault
Blanking/Desaturation Input Voltage
VCC = 15 V
VPin 4 = 0 V
VPin 1 > 100 mV
6.5
-40
-20
0
20
40
60
80
100
120
140
7.0
6.6
VPin 4 = 0 V
VPin 1 > 100 mV
TA = 25°C
6.5
6.4
12
14
16
18
20
VCC, SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 18. Fault Blanking/Desaturation Comparator
Threshold Voltage versus Temperature
Figure 19. Fault Blanking/Desaturation Comparator
Threshold Voltage versus Supply Voltage
-200
-200
VCC = 15 V
VPin 8 = 0 V
-220
Ichg, CURRENT SOURCE ( μ A)
Ichg, CURRENT SOURCE ( μ A)
6.2
VPin 1, CURRENT SENSE INPUT VOLTAGE (V)
6.6
6.4
-60
14
0
6.0
16
V BDT , FAULT BLANKING/DESATURATION
THRESHOLD VOLTAGE (V)
V BDT , FAULT BLANKING/DESATURATION
THRESHOLD VOLTAGE (V)
ISI , CURRENT SENSE INPUT CURRENT (μ A)
MC33153
-240
-260
-280
-300
-60
-40
-20
0
20
40
60
80
100
120
VPin 4 = 0 V
VPin 8 = 0 V
TA = 25°C
-220
-240
-260
-280
-300
5.0
140
10
15
20
TA, AMBIENT TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 20. Fault Blanking/Desaturation Current
Source versus Temperature
Figure 21. Fault Blanking/Desaturation Current
Source versus Supply Voltage
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MC33153
2.5
I dscg, DISCHARGE CURRENT (mA)
I chg, CURRENT SOURCE ( μ A)
-200
VCC = 15 V
VPin 4 = 0 V
TA = 25°C
-220
-240
-260
-280
-300
0
2.0
4.0
6.0
8.0
10
12
14
0.5
VCC = 15 V
VPin 4 = 5.0 V
TA = 25°C
0
0
4.0
8.0
12
16
VPin 8, FAULT BLANKING/DESATURATION INPUT VOLTAGE (V)
Figure 22. Fault Blanking/Desaturation
Current Source versus Input Voltage
Figure 23. Fault Blanking/Desaturation Discharge
Current versus Input Voltage
14.0
VPin 7 , FAULT OUTPUT VOLTAGE (V)
VPin 7 , FAULT OUTPUT VOLTAGE (V)
1.0
VPin 8, FAULT BLANKING/DESATURATION INPUT VOLTAGE (V)
VCC = 15 V
VPin 4 = 5.0 V
TA = 25°C
0.8
0.6
0.4
0.2
0
2.0
4.0
6.0
8.0
VCC = 15 V
VPin 4 = 0 V
VPin 1 = 1.0 V
Pin 8 = Open
TA = 25°C
13.8
13.6
13.4
13.2
13.0
10
0
2.0
4.0
10
12
14
16
18
Figure 24. Fault Output Low State Voltage
versus Sink Current
Figure 25. Fault Output High State Voltage
versus Source Current
20
12.5
Vth(UVLO), UNDERVOLTAGE
LOCKOUT THRESHOLD (V)
12
10
Turn-Off
Threshold
6.0
4.0
Startup
Threshold
2.0
0
10
8.0
ISource, OUTPUT SOURCE CURRENT (mA)
Startup Threshold
VCC Increasing
14
8.0
6.0
ISink, OUTPUT SINK CURRENT (mA)
16
VO , DRIVE OUTPUT VOLTAGE (V)
1.5
-0.5
16
1.0
0
2.0
11
12
13
VPin 4 = 0 V
TA = 25°C
14
12.0
11.5
11.0
10.5
-60
15
Turn-Off Threshold
VCC Decreasing
-40
-20
0
20
40
60
80
100
VCC, SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 26. Drive Output Voltage
versus Supply Voltage
Figure 27. UVLO Thresholds
versus Temperature
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120
140
MC33153
10
Output High
8.0
ICC, SUPPLY CURRENT (mA)
ICC, SUPPLY CURRENT (mA)
10
Output Low
6.0
4.0
TA = 25°C
2.0
0
5.0
10
15
8.0
6.0
4.0
VCC = 15 V
VPin 4 = VCC
Drive Output Open
2.0
0
-60
20
-40
-20
0
20
40
60
80
100
120
140
VCC, SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 28. Supply Current versus
Supply Voltage
Figure 29. Supply Current versus Temperature
ICC, SUPPLY CURRENT (mA)
80
CL = 10 nF
VCC = 15 V
TA = 25°C
= 5.0 nF
60
40
= 2.0 nF
20
= 1.0 nF
0
1.0
10
100
1000
f, INPUT FREQUENCY (kHz)
Figure 30. Supply Current versus Input Frequency
OPERATING DESCRIPTION
GATE DRIVE
Controlling Switching Times
the turn−on dv/dt. Excessive turn−on dv/dt is a common
problem in half−bridge circuits. The turn−off resistor, Roff,
controls the turn−off speed and ensures that the IGBT
remains off under commutation stresses. Turn−off is critical
to obtain low switching losses. While IGBTs exhibit a fixed
minimum loss due to minority carrier recombination, a slow
gate drive will dominate the turn−off losses. This is
particularly true for fast IGBTs. It is also possible to turn−off
an IGBT too fast. Excessive turn−off speed will result in
large overshoot voltages. Normally, the turn−off resistor is
a small fraction of the turn−on resistor.
The MC33153 contains a bipolar totem pole output stage
that is capable of sourcing 1.0 amp and sinking 2.0 amps
peak. This output also contains a pull down resistor to ensure
that the IGBT is off whenever there is insufficient VCC to the
MC33153.
In a PWM inverter, IGBTs are used in a half−bridge
configuration. Thus, at least one device is always off. While
The most important design aspect of an IGBT gate drive
is optimization of the switching characteristics. The
switching characteristics are especially important in motor
control applications in which PWM transistors are used in a
bridge configuration. In these applications, the gate drive
circuit components should be selected to optimize turn−on,
turn−off and off−state impedance. A single resistor may be
used to control both turn−on and turn−off as shown in
Figure 31. However, the resistor value selected must be a
compromise in turn−on abruptness and turn−off losses.
Using a single resistor is normally suitable only for very low
frequency PWM. An optimized gate drive output stage is
shown in Figure 32. This circuit allows turn−on and turn−off
to be optimized separately. The turn−on resistor, Ron,
provides control over the IGBT turn−on speed. In motor
control circuits, the resistor sets the turn−on di/dt that
controls how fast the free−wheel diode is cleared. The
interaction of the IGBT and free−wheeling diode determines
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MC33153
that the opto’s dv/dt capability is not exceeded. Like most
optoisolators, the HCPL4053 has an active low
open−collector output. Thus, when the LED is on, the output
will be low. The MC33153 has an inverting input pin to
interface directly with an optoisolator using a pullup
resistor. The input may also be interfaced directly to 5.0 V
CMOS logic or a microcontroller.
the IGBT is in the off−state, it will be subjected to changes
in voltage caused by the other devices. This is particularly
a problem when the opposite transistor turns on.
When the lower device is turned on, clearing the upper
diode, the turn−on dv/dt of the lower device appears across
the collector emitter of the upper device. To eliminate
shoot−through currents, it is necessary to provide a low sink
impedance to the device that is in the off−state. In most
applications the turn−off resistor can be made small enough
to hold off the device that is under commutation without
causing excessively fast turn−off speeds.
VCC
Optoisolator Output Fault
The MC33153 has an active high fault output. The fault
output may be easily interfaced to an optoisolator. While it
is important that all faults are properly reported, it is equally
important that no false signals are propagated. Again, a high
dv/dt optoisolator should be used.
The LED drive provides a resistor programmable current
of 10 to 20 mA when on, and provides a low impedance path
when off. An active high output, resistor, and small signal
diode provide an excellent LED driver. This circuit is shown
in Figure 33.
IGBT
Output
Rg
5
VEE
VEE
3
Short Circuit
Latch Output
VEE
VCC
Figure 31. Using a Single Gate Resistor
Q
7
VCC
IGBT
Ron
Output
5
Doff
VEE
Roff
Figure 33. Output Fault Optoisolator
VEE
VEE
VEE
UNDERVOLTAGE LOCKOUT
3
It is desirable to protect an IGBT from insufficient gate
voltage. IGBTs require 15 V on the gate to achieve the rated
on−voltage. At gate voltages below 13 V, the on−voltage
increases dramatically, especially at higher currents. At very
low gate voltages, below 10 V, the IGBT may operate in the
linear region and quickly overheat. Many PWM motor
drives use a bootstrap supply for the upper gate drive. The
UVLO provides protection for the IGBT in case the
bootstrap capacitor discharges.
The MC33153 will typically start up at about 12 V. The
UVLO circuit has about 1.0 V of hysteresis and will disable
the output if the supply voltage falls below about 11 V.
VEE
Figure 32. Using Separate Resistors
for Turn−On and Turn−Off
A negative bias voltage can be used to drive the IGBT into
the off−state. This is a practice carried over from bipolar
Darlington drives and is generally not required for IGBTs.
However, a negative bias will reduce the possibility of
shoot−through. The MC33153 has separate pins for VEE and
Kelvin Ground. This permits operation using a +15/−5.0 V
supply.
PROTECTION CIRCUITRY
INTERFACING WITH OPTOISOLATORS
Desaturation Protection
Isolated Input
Bipolar Power circuits have commonly used what is
known as “Desaturation Detection”. This involves
monitoring the collector voltage and turning off the device
if this voltage rises above a certain limit. A bipolar transistor
will only conduct a certain amount of current for a given
base drive. When the base is overdriven, the device is in
The MC33153 may be used with an optically isolated
input. The optoisolator can be used to provide level shifting,
and if desired, isolation from ac line voltages. An
optoisolator with a very high dv/dt capability should be
used, such as the Hewlett Packard HCPL4053. The IGBT
gate turn−on resistor should be set large enough to ensure
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MC33153
been cleared, the voltage will come down quickly to the
VCE(sat) of the device. Following turn−on, there is normally
considerable ringing on the collector due to the COSS
capacitance of the IGBTs and the parasitic wiring
inductance. The fault signal from the Desaturation
Comparator must be blanked sufficiently to allow the diode
to be cleared and the ringing to settle out.
The blanking function uses an NPN transistor to clamp the
comparator input when the gate input is low. When the input
is switched high, the clamp transistor will turn “off”,
allowing the internal current source to charge the blanking
capacitor. The time required for the blanking capacitor to
charge up from the on−voltage of the internal NPN transistor
to the trip voltage of the comparator is the blanking time.
If a short circuit occurs after the IGBT is turned on and
saturated, the delay time will be the time required for the
current source to charge up the blanking capacitor from the
VCE(sat) level of the IGBT to the trip voltage of the
comparator. Fault blanking can be disabled by leaving Pin 8
unconnected.
saturation. When the collector current rises above the knee,
the device pulls out of saturation. The maximum current the
device will conduct in the linear region is a function of the
base current and the dc current gain (hFE) of the transistor.
The output characteristics of an IGBT are similar to a
Bipolar device. However, the output current is a function of
gate voltage instead of current. The maximum current
depends on the gate voltage and the device type. IGBTs tend
to have a very high transconductance and a much higher
current density under a short circuit than a bipolar device.
Motor control IGBTs are designed for a lower current
density under shorted conditions and a longer short circuit
survival time.
The best method for detecting desaturation is the use of a
high voltage clamp diode and a comparator. The MC33153
has a Fault Blanking/Desaturation Comparator which
senses the collector voltage and provides an output
indicating when the device is not fully saturated. Diode D1
is an external high voltage diode with a rated voltage
comparable to the power device. When the IGBT is “on” and
saturated, D1 will pull down the voltage on the Fault
Blanking/Desaturation Input. When the IGBT pulls out of
saturation or is “off”, the current source will pull up the input
and trip the comparator. The comparator threshold is 6.5 V,
allowing a maximum on−voltage of about 5.8 V.
A fault exists when the gate input is high and VCE is
greater than the maximum allowable VCE(sat). The output of
the Desaturation Comparator is ANDed with the gate input
signal and fed into the Short Circuit and Overcurrent
Latches. The Overcurrent Latch will turn−off the IGBT for
the remainder of the cycle when a fault is detected. When
input goes high, both latches are reset. The reference voltage
is tied to the Kelvin Ground instead of the VEE to make the
threshold independent of negative gate bias. Note that for
proper operation of the Desaturation Comparator and the
Fault Output, the Current Sense Input must be biased above
the Overcurrent and Short Circuit Comparator thresholds.
This can be accomplished by connecting Pin 1 to VCC.
Desaturation
Comparator
VCC
Sense IGBT Protection
Another approach to protecting the IGBTs is to sense the
emitter current using a current shunt or Sense IGBTs. This
method has the advantage of being able to use high gain
IGBTs which do not have any inherent short circuit
capability. Current sense IGBTs work as well as current
sense MOSFETs in most circumstances. However, the basic
problem of working with very low sense voltages still exists.
Sense IGBTs sense current through the channel and are
therefore linear with respect to the collector current.
Because IGBTs have a very low incremental on−resistance,
sense IGBTs behave much like low−on resistance current
sense MOSFETs. The output voltage of a properly
terminated sense IGBT is very low, normally less than
100 mV.
The sense IGBT approach requires fault blanking to
prevent false tripping during turn−on. The sense IGBT also
requires that the sense signal is ignored while the gate is low.
This is because the mirror output normally produces large
transient voltages during both turn−on and turn−off due to
the collector to mirror capacitance. With non−sensing types
of IGBTs, a low resistance current shunt (5.0 to 50 mW) can
be used to sense the emitter current. When the output is an
actual short circuit, the inductance will be very low. Since
the blanking circuit provides a fixed minimum on−time, the
peak current under a short circuit can be very high. A short
circuit discern function is implemented by the second
comparator which has a higher trip voltage. The short circuit
signal is latched and appears at the Fault Output. When a
short circuit is detected, the IGBT should be turned−off for
several milliseconds allowing it to cool down before it is
turned back on. The sense circuit is very similar to the
desaturation circuit. It is possible to build a combination
circuit that provides protection for both Short Circuit
capable IGBTs and Sense IGBTs.
VCC
270 mA
D1
8
Kelvin
GND
Vref
6.5 V
VEE
Figure 34. Desaturation Detection
The MC33153 also features a programmable fault
blanking time. During turn−on, the IGBT must clear the
opposing free−wheeling diode. The collector voltage will
remain high until the diode is cleared. Once the diode has
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10
MC33153
APPLICATION INFORMATION
blanking capacitor should be connected from the
Desaturation pin to the VEE pin. If a dual supply is used, the
blanking capacitor should be connected to the Kelvin
Ground. The Current Sense Input should be tied high
because the two comparator outputs are ANDed together.
Although the reverse voltage on collector of the IGBT is
clamped to the emitter by the free−wheeling diode, there is
normally considerable inductance within the package itself.
A small resistor in series with the diode can be used to
protect the IC from reverse voltage transients.
Figure 35 shows a basic IGBT driver application. When
driven from an optoisolator, an input pull up resistor is
required. This resistor value should be set to bias the output
transistor at the desired current. A decoupling capacitor
should be placed close to the IC to minimize switching noise.
A bootstrap diode may be used for a floating supply. If the
protection features are not required, then both the Fault
Blanking/Desaturation and Current Sense Inputs should
both be connected to the Kelvin Ground (Pin 2). When used
with a single supply, the Kelvin Ground and VEE pins should
be connected together. Separate gate resistors are
recommended to optimize the turn−on and turn−off drive.
18 V
18 V
Bootstrap
6
VCC
7
B+
7
Input
VEE
GND
CBlank
Output
Sense
4
Sense
Desat/ 8
Blank
MC33153
MC33153
4
Fault
Desat/ 8
Blank
5
Output
Fault
6
VCC
Input
1
VEE
GND
5
1
2
3
2
3
Figure 37. Desaturation Application
Figure 35. Basic Application
When using sense IGBTs or a sense resistor, the sense
voltage is applied to the Current Sense Input. The sense trip
voltages are referenced to the Kelvin Ground pin. The sense
voltage is very small, typically about 65 mV, and sensitive
to noise. Therefore, the sense and ground return conductors
should be routed as a differential pair. An RC filter is useful
in filtering any high frequency noise. A blanking capacitor
is connected from the blanking pin to VEE. The stray
capacitance on the blanking pin provides a very small level
of blanking if left open. The blanking pin should not be
grounded when using current sensing, that would disable the
sense. The blanking pin should never be tied high, that
would short out the clamp transistor.
15 V
6
VCC
7
Fault
Desat/ 8
Blank
5
Output
MC33153
4
Sense
Input
VEE
GND
1
2
3
18 V
-5.0 V
7
Figure 36. Dual Supply Application
Fault
6
VCC
Desat/ 8
Blank
5
Output
MC33153
When used in a dual supply application as in Figure 36, the
Kelvin Ground should be connected to the emitter of the
IGBT. If the protection features are not used, then both the
Fault Blanking/Desaturation and the Current Sense Inputs
should be connected to Ground. The input optoisolator
should always be referenced to VEE.
If desaturation protection is desired, a high voltage diode
is connected to the Fault Blanking/Desaturation pin. The
Sense
4
Input
VEE
GND
1
2
3
Figure 38. Sense IGBT Application
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11
MC33153
ORDERING INFORMATION
Device
Operating Temperature Range
MC33153DG
MC33153DR2G
TA = −40° to +105°C
MC33153PG
Package
Shipping†
SOIC−8
(Pb−Free)
98 Units / Rail
SOIC−8
(Pb−Free)
1000 / Tape & Reel
PDIP−8
(Pb−Free)
50 Units / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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12
MC33153
PACKAGE DIMENSIONS
PDIP−8
P SUFFIX
CASE 626−05
ISSUE N
D
A
E
H
8
5
1
4
E1
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
M
e
8X
SIDE VIEW
b
0.010
eB
END VIEW
M
C A
M
B
M
NOTE 6
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13
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION E3 IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−− 0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−− 0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
MC33153
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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Phone: 81−3−5817−1050
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14
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC33153/D