MC10EL89 D

MC10EL89
5V ECL Coaxial Cable Driver
The MC10EL89 is a differential fanout gate specifically designed to
drive coaxial cables. The device is especially useful in Digital Video
Broadcasting applications; for this application, since the system is
polarity free, each output can be used as an independent driver. The
driver boasts a gain of approximately 40 and produces output swings
twice as large as a standard ECL output. When driving a coaxial cable,
proper termination is required at both ends of the line to minimize
signal loss. The 1.6 V output swings allow for termination at both ends
of the cable, while maintaining the required 800 mV swing at the
receiving end of the cable. Because of the larger output swings, the
device cannot be terminated into the standard −2.0 V. All of the DC
parameters are tested with a 50 to −3.0 V load. The driver accepts a
standard differential ECL input and can run off of the Digital Video
Broadcast standard −5.0 V supply.
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MARKING
DIAGRAMS*
8
SOIC−8
D SUFFIX
CASE 751
8
1
HEL89
ALYW
G
1
Features
•
•
375 ps Propagation Delay
1.6 V Output Swings
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −4.2 V to −5.7 V
Internal Input Pulldown Resistors
Pb−Free Packages are Available
8
TSSOP−8
DT SUFFIX
CASE 948R
8
1
1
DFN8
MN SUFFIX
CASE 506AA
Q0
1
8
HL89
ALYWG
G
5A M G
G
•
•
•
•
1
4
VCC
Q0
2
7
D
Q1
3
6
D
A
L
Y
W
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Q1
4
5
VEE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Figure 1. Logic Diagram and Pinout Assignment
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 9
1
Publication Order Number:
MC10EL89/D
MC10EL89
Table 1. PIN DESCRIPTION
PIN
Function
D, D
ECL Data Inputs
Q0, Q0; Q1, Q1
ECL Data Outputs (1.6 Vpp)
VCC
Positive Supply
VEE
Negative Supply
EP
(DFN8 only) Thermal exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the most negative supply (GND)
or leave unconnected, floating open.
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
50 K
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
> 2 kV
> 100 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Level 1
UL 94 V−0 @ 0.125 in
Transistor Count
31
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
8
V
VEE
NECL Mode Power Supply
VCC = 0 V
−8
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
JA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SO−8
SO−8
190
130
°C/W
°C/W
JC
Thermal Resistance (Junction−to−Case)
Standard Board
SO−8
41 to 44
°C/W
JA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
JC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
41 to 44 ± 5%
°C/W
JA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
Tsol
Wave Solder
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
265
265
°C
JC
Thermal Resistance (Junction−to−Case)
35 to 40
°C/W
Pb
Pb−Free
(Note 2)
VI VCC
VI VEE
DFN8
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
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2
MC10EL89
Table 4. 10EL SERIES PECL DC CHARACTERISTICS VCC = 5.0 V; VEE = 0.0 V (Note 3)
−40°C
Typ
Max
23
28
Max
23
28
3.77
3.90
4.02
3.87
3.98
4.10
Output LOW Voltage (Note 4)
2.10
2.28
2.42
2.00
2.30
VIH
Input HIGH Voltage (Single−Ended)
3770
4110
VIL
Input LOW Voltage (Single−Ended)
3050
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 5)
2.5
IIH
Input HIGH Current
IIL
Input LOW Current
Characteristic
Power Supply Current
VOH
Output HIGH Voltage (Note 4)
VOL
70
0.5
Min
85°C
Typ
Symbol
IEE
Min
25°C
Typ
Max
Unit
23
28
mA
3.94
4.04
4.19
V
2.44
1.95
2.33
2.49
V
3870
4190
3940
4280
mV
3500
3050
3520
3050
3555
mV
4.6
2.5
4.6
2.5
4.6
V
150
A
150
50
50
0.5
Min
150
30
40
0.3
25
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / −0.5 V.
4. Outputs are terminated through a 50 resistor to VCC − 3.0 V.
5. VIHCMR min varies 1:1 with VEE. VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 5. 10EL SERIES NECL DC CHARACTERISTICS VCC = 0.0 V; VEE = −5.0 V (Note 6)
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
23
28
Min
85°C
Typ
Max
23
28
Min
Typ
Max
Unit
23
28
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 7)
−1.23
−1.10
−0.98
−1.13
−1.02
−0.90
−1.06
−0.96
−0.81
V
VOL
Output LOW Voltage (Note 7)
−2.90
−2.72
−2.58
−3.00
−2.70
−2.56
−3.05
−2.67
−2.51
V
VIH
Input HIGH Voltage (Single−Ended)
−123
0
−890
−1130
−810
−106
0
−720
mV
VIL
Input LOW Voltage (Single−Ended)
−195
0
−150
0
−195
0
−148
0
−195
0
−144
5
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 8)
−2.5
−0.4
−2.5
−0.4
−2.5
−0.4
V
IIH
Input HIGH Current
150
A
IIL
Input LOW Current
70
0.5
150
50
50
0.5
30
150
20
0.3
25
A
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / −0.5 V.
7. Outputs are terminated through a 50 resistor to VCC − 3.0 V.
8. VIHCMR min varies 1:1 with VEE. VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
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3
MC10EL89
Table 6. AC CHARACTERISTICS VCC = 5.0 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −5.0 V (Note 9)
−40°C
Symbol
Characteristic
fmax
Maximum Toggle Frequency
tPLH
tPHL
Propagation Delay to
Output
tSKEW
Min
Typ
25°C
Max
Min
85°C
Typ
Max
Min
Typ
Max
1.5
200
340
480
Within-Device Skew
5
20
tJITTER
Random Clock Jitter (RMS)
5
VPP
Input Swing (Note 10)
150
tr
tf
Output Rise/Fall Times Q
(20% − 80%)
205
330
260
350
440
5
20
310
5
455
400
490
ps
5
20
ps
5
150
400
205
330
Unit
Gb/s
ps
150
455
205
mV
330
455
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. VEE can vary +0.25 V / −0.5 V.
10. VPP(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈ 40.
DC BLOCKING CAPACITORS
75
75 COAX
0.1F
75
EL89
75
150
150
75 COAX
0.1F
75
VEE
Figure 2. EL89 CATV Termination Configuration
Q
Zo = 50 D
Receiver
Device
Driver
Device
Q
D
Zo = 50 50 50 VTT
VTT = VCC − 3.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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4
MC10EL89
ORDERING INFORMATION
Package
Shipping†
SOIC−8
98 Units / Rail
MC10EL89DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC10EL89DR2
SOIC−8
2500 / Tape & Reel
MC10EL89DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC10EL89DT
TSSOP−8
100 Units / Rail
MC10EL89DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC10EL89DTR2
TSSOP−8
2500 / Tape & Reel
MC10EL89DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10EL89MNR4
DFN8
1000 / Tape & Reel
DFN8
(Pb−Free)
1000 / Tape & Reel
Device
MC10EL89D
MC10EL89MNR4G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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5
MC10EL89
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
MC10EL89
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x
0.15 (0.006) T U
0.10 (0.004)
S
2X
L/2
L
8
5
1
PIN 1
IDENT
0.15 (0.006) T U
K REF
M
T U
V
S
0.25 (0.010)
B
−U−
4
M
A
−V−
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
D
−W−
G
DETAIL E
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7
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
MC10EL89
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
2X
0.10 C
2X
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÇÇÇÇ
TOP VIEW
0.10 C
0.08 C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
1.10
1.30
2.00 BSC
0.70
0.90
0.50 BSC
0.20
−−−
0.25
0.35
A
0.10 C
8X
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
E
(A3)
SIDE VIEW
A1
C
D2
e
e/2
4
1
8X
L
E2
K
8
5
8X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
MC10EL89/D