AK8158A

[AK8158A]
AK8158A
Multiclock Generator with VCXO
1. General Description
The AK8158A is a member of AKM’s low power multi clock generator family designed for a feature rich
DTV or STB, requiring a range of system clocks with high performance. The AK8158A generates different
frequency clocks from a 27MHz crystal oscillator and provides them to up to four outputs configured by
pin-setting. The on-chip VCXO accepts a voltage control input to allow the output clocks to vary by ±110 ppm
for synchronizing to the external clock system. Both circuitries of VCXO and PLL in AK8158A are derived
from AKM’s long-term-experienced clock device technology, and enable clock output to perform low jitter
and to operate with very low current consumption. The AK8158A is available in a 20-pin QFN package.
2. Features
27MHz Crystal Input
Four Frequency-Selectable Clock Outputs
One 27MHz-Reference Output
Selectable Clock out Frequencies:
- 74.1758, 74.250MHz
- 25.000MHz
- 4.9152, 12.000, 24.000,24.576MHz
- 33.333MHz
Built-in VCXO
- Pull Range: ±110ppm (Min.)
Low Jitter Performance
- Period Jitter:
30psec typ. (1σ) at CLK1-4
- Long Term Jitter:
150psec typ. (1σ) 74.1758MHz
30psec typ. (1σ) at REFOUT
Low Current Consumption:
16.5mA typ. at 3.3V
Supply Voltage:
2.85 – 3.6V
Operating Temperature Range:
-20 to +85C
Package:
20-pin QFN (Lead free)
Application:
- Digital TV Sets
- Personal Video Recorders
- Set Top Boxes
- Multi Media Receivers
- Closed-Circuit Television
MS1335-E-01
2013/12
-1-
[AK8158A]
3. Table of Contents
1. General Description........................................................................................................................................1
2. Features ..........................................................................................................................................................1
3. Table of Contents ...........................................................................................................................................2
4. Block Diagram and Functions ........................................................................................................................3
5. Pin Configurations and Functions ..................................................................................................................4
6. Absolute Maximum Ratings ...........................................................................................................................5
7. Recommended Operating Conditions ............................................................................................................5
8. Electrical Characteristics ................................................................................................................................6
9. Functional Descriptions .................................................................................................................................8
10. Recommended External Circuits ..................................................................................................................9
11. Package .......................................................................................................................................................10
12. Important Notice.........................................................................................................................................12
MS1335-E-01
2013/12
-2-
[AK8158A]
4. Block Diagram and Functions
VDD
X1
X2
VIN
Voltage
Controlled
Crystal
Oscillator
PLL1
PLL1
PLL2
Divide
Logic
and
Output
Control
PLL3
CLK1
CLK2
CLK3
CLK4
S0
S1
REFOUT
S2
GND
Figure 1. AK8158A Multi Clock Generator
MS1335-E-01
2013/12
-3-
[AK8158A]
5. Pin Configurations and Functions
VDD3
S2
VDD2
GND2
CLK4
15
14
13
12
11
X2 16
10 CLK3
GND 17
9
REFOUT
GND 18
8
GND
GND 19
7
CLK2
X1 20
6
CLK1
1
2
3
4
5
S0
S1
VIN
VDD1
GND1
Figure 2. AK8158A Package: 20-Pin QFN(Top View)
Pin No.
Pin Name
Pin Type
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
S0
S1
VIN
VDD1
GND1
CLK1
CLK2
GND
REFOUT
CLK3
CLK4
GND2
VDD2
S2
VDD3
IN
IN
IN
--OUT
OUT
-OUT
OUT
OUT
--IN
--
16
X2
XI
17
18
19
GND
GND
GND
----
Clock Out Frequency Select 0, See Table 1 for the selection
Clock Out Frequency select 1, See Table 1 for the selection
VCXO Control Voltage Input
Power Supply 1
Ground 1
Clock output 1, See Table 1 for its selectable frequency
Clock output 2, See Table 1 for its selectable frequency
Connect to Ground
Reference Clock Output of VCXO based on 27.000MHz Crystal
Clock output 3, See Table 1 for its selectable frequency
Clock output 4, See Table 1 for its selectable frequency
Ground 2
Power Supply 2
Clock Out Frequency select 1, See Table 1 for the selection
Power Supply 3
Crystal connection, Connect to 27.000MHz crystal
Or external clock input (minimum 1Vpp input).
Connect to Ground
Connect to Ground
Connect to Ground
20
X1
XO
(2)
(2)
(3)
(2)
Crystal connection, Connect to 27.000MHz crystal
Please open when an external clock input is used
Note:
(1) The heatsink pad on the bottom surface of the package can be open or be connected to GND.
(2) Internal pull up 360kΩ
(3) Internal pull down 510kΩ
MS1335-E-01
2013/12
-4-
[AK8158A]
6. Absolute Maximum Ratings
Over operating free-air temperature range unless otherwise noted (1)
Items
Symbol
Ratings
Unit
Supply voltage
VDD
-0.3 to 4.6
V
Input voltage
Vin
VSS-0.3 to VDD+0.3
V
Input current (any pins except supplies)
IIN
±10
mA
Storage temperature
Tstg
-55 to 130
C
Note
(1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only. Functional operation of the device at these or any other
conditions beyond those indicated under “Recommended Operating Conditions” is not implied.
Exposure to absolute-maximum-rating conditions for extended periods may affect device reliability.
Electrical parameters are guaranteed only over the recommended operating temperature range.
This device is manufactured on a CMOS process, therefore,
generically susceptible to damage by excessive static voltage.
Failure to observe proper handling and installation procedures can cause damage. AKM
recommends that this device is handled with appropriate precautions.
ESD Sensitive Device
7. Recommended Operating Conditions
Parameter
Operating temperature
Supply voltage (1)
Output Load Capacitance
Symbol
Ta
VDD
Cp1
Cp2
Conditions
Pin: CLK1-4
Pin: REFOUT
Min
-20
2.85
Typ
3.3
Max
85
3.6
15
25
Unit
C
V
pF
pF
Note:
(1) Power to VDD1, VDD2 and VDD3 requires to be supplied from a single source. A decoupling
capacitor of 0.1μF for power supply line should be installed close to each VDD pin.
MS1335-E-01
2013/12
-5-
[AK8158A]
8. Electrical Characteristics
DC Characteristics
All specifications at VDD: over 2.85 to 3.6V, Ta: -20 to +85C, 27MHz Crystal, unless otherwise noted
Parameter
Symbol
Conditions
MIN
TYP
MAX
High Level Input Voltage
Low Level Input Voltage
Input Current 1
Input Current 2
VIH
VIL
IL1
IL2
Pin: S0, S1, S2
Pin: S0, S1, S2
Pin: S0, S1, S2
Pin: VIN
High Level Output Voltage
VOH
Pin: CLK1-4, REFOUT
IOH = -4mA (1)
Low level Output Voltage
VOL
Pin: CLK1-4, REFOUT
IOL = +4mA (1)
Current Consumption
IDD
0.7VDD
0.3VDD
+1.5
+3
-20
-3
Unit
V
V
A
A
0.8VDD
V
0.2VDD
V
No load
Clock out selection by note (2)
Ta = 25C
18.0
mA
No load
Clock out selection by note (3)
Ta = 25C
16.5
mA
Note:
(1) Polarity(-): Outgoing current from device
Polarity(+): Incoming current to device
(2) Pin setting for output clock selection: [S2:S0] = “HLL”
(3) Pin setting for output clock selection: [S2:S0] = “HLH”
MS1335-E-01
2013/12
-6-
[AK8158A]
AC Characteristics
All specifications at VDD: over 2.85 to 3.6V, Ta: over -20 to +85C, 27MHz Crystal, unless otherwise noted
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
Crystal Clock Frequency
VCXO Pullable Range (3)
VCXO Gain
Period Jitter (4)
Long Term Jitter
27.0000
GVCXO
(4)
Output Clock Duty Cycle
Output Clock Rise Time
trise
Output Clock Fall Time
tfall
Power-up Time
Output Transition Time (5)
150
30
MHz
ppm
ppm/V
ps
CLK1 at 74.1758MHz
1000 cycle delay
150
ns
REFOUT at 27.000MHz
1000 cycle delay
30
ps
VIN at over 0 to VDD V
VIN range at 1.5V±1.0V
CLK1-4
Pin: CLK1-4 (1)
Pin: REFOUT (2)
Pin: CLK1-4 (1)
Pin: REFOUT (2 )
Pin: CLK1-4 (1)
Pin: REFOUT (2 )
Pin: CLK1-4 (1)
Pin: CLK1 at
74.25 or 74.175MHz
±110
45
40
50
50
1.5
2.5
1.5
2.5
1
55
60
4
4
4
4
2
%
%
ns
ns
ns
ns
ms
90
140
s
Note:
(1) Measured with load capacitance of 15pF
(2) Measured with load capacitance of 25pF
(3) Pullable range depends on crystal characteristics, on-chip load capacitance, and stray capacity of
PCB. Min. ±110ppm is applied to AKM’s authorized test condition.
(4) 1σ in 10000 sampling or more
(5) Time to settle output into ±20ppm of specified frequency
MS1335-E-01
2013/12
-7-
[AK8158A]
9. Functional Descriptions
Output clock frequency selection
The AK8158A generates a range of low-jitter and hi-accuracy clock frequencies with three built-in PLLs and
provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by
pin-setting of S0 (Pin 1), S1 (Pin 2), and S2 (Pin 14).
The selectable frequency is shown in
Table 1..
Table 1. Clock output Frequency
Selection Pin
Clock Output Frequency (MHz)
S2
(Pin 14)
S1
(Pin 2)
S0
(Pin 1)
CLK1
(Pin 6)
CLK2
(Pin 7)
CLK3
(Pin 10)
CLK4
(Pin 11)
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
74.250
74.250
74.1758
74.1758
74.250
74.250
74.1758
74.1758
25.000
25.000
25.000
25.000
25.000
OFF
25.000
25.000
24.000
12.000
24.000
12.000
24.576
24.000
24.576
4.9152
33.333
33.333
33.333
33.333
33.333
33.333
33.333
33.333
Voltage Control Crystal Oscillator (VCXO)
The AK8158A has a voltage control crystal oscillator (VCXO), featuring fine frequency tuning for 27MHz of
primary clock frequency by external DC voltage control. This tuning enables output clock frequency to
synchronize the external clock system. VIN (Pin 3) accepts DC voltage control from a processor or a system
controller, and pulls the primary frequency of crystal to higher or lower. This pulling range is determined by
crystal characteristic, on-chip load capacitor, and stray capacitance of PCB. The AK8158A is designed to
range ±110ppm of primary frequency in AKM’s authorized condition.
MS1335-E-01
2013/12
-8-
[AK8158A]
10. Recommended External Circuits
+3.3V typ.
MPEG-TS
DECODER
CTL OUT2
Cext1
19
18
17
16
GND
GND
X2
S1
CTL OUT1
VIN
AK8158A
3
R11
13
VDD1
C11
REFOUT
CLK3
5
GND
GND1
12
CLK2
4
C1
15
14
2
CLK1
DC Voltage CTL OUT
(PWM)
20
GND
1
X1
S0
CTL OUT0
Cext2
Crystal
6
7
8
9
10
11
VDD3
S2
C3
VDD2
GND2
CLK4
C2
IEEE1394
24.576MHz
USB I/F
12.0/24.0MHz
REF CLK IN
Ethernet I/F
25.0MHz
HD Display I/F
74.25/74.1758MHz
GND
Figure 3: Typical Connection Diagram
C1, C2, C3: 0.1F
Cext1, Cext2: Depends on crystal characteristics. Refer the specification of the crystal.
R11, C11: In case of interface by PWM. For right configuration, refer the specification of the applied
processor.
PCB Layout Consideration
The AK8158A is a high-accuracy and low-jitter multi clock generator. For proper performances specified in
this datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the typical
connection diagram shown in Figure ..
Power supply line – AK8158A has three power supply pins (VDD1-3) which deliver power to internal
circuitry segments. A 0.1F decoupling capacitor should be placed as close to each VDD pin as possible.
Ground pin connection – AK8158A has two ground pins (GND1-2). These pin require connecting to
plane ground which will eliminate any common impedance with other critical switching signal return. 0.1F
decoupling capacitors placed at VDD1, VDD2, and VDD3 should be grounded at close to the GND1pin, the
GND2 pin, and the GND2, respectively.
Crystal connection – Proper oscillation performance and pullable range are susceptible to stray or parasitic
capacitors around crystal. The wiring traces to a crystal form X1 (Pin 20) and X2 (Pin 16) have equal lengths
with no via and as short in length as possible. These traces should be also located away from any traces with
switching signal.
MS1335-E-01
2013/12
-9-
[AK8158A]
11. Package
Outline Dimensions
20pin QFN (Unit: mm)
0.75±0.05
2.10±0.10
B
16
20
C0.35
15
5
11
10
6
0.55±0.10
4.00±0.10
2.10±0.10
1
A
0.10 M C A B
0.05MAX
4.00±0.10
0.25±0.05
0.08 C
0.50TYP
C
MS1335-E-01
2013/12
- 10 -
[AK8158A]
Marking
a: #1 Pin Index
b: Part number
c: Date code (4 digits: YWWL, Year/Weak/Lot No.)
15
b
14
13
12
11
16
10
17
9
158A
xxxx
18
19
8
c
7
6
20
a
1
2
3
MS1335-E-01
4
5
2013/12
- 11 -
[AK8158A]
12. Important Notice
IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information
contained in this document without notice. When you consider any use or application of AKM product
stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized
distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and application
examples of AKM Products. AKM neither makes warranties or representations with respect to the
accuracy or completeness of the information contained in this document nor grants any license to any
intellectual property rights or any other rights of AKM or any third party with respect to the information in
this document. You are fully responsible for use of such information contained in this document in your
product design or applications. AKM ASSUMES NO LIABILITY FOR ANY LOSSES INCURRED BY
YOU OR THIRD PARTIES ARISING FROM THE USE OF SUCH INFORMATION IN YOUR
PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily
high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human
life, bodily injury, serious property damage or serious public impact, including but not limited to,
equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment,
equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment,
equipment used to control combustions or explosions, safety devices, elevators and escalators, devices
related to electric power, and equipment used in finance-related fields. Do not use Product for the above
use unless specifically agreed by AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for
complying with safety standards and for providing adequate designs and safeguards for your hardware,
software and systems which minimize risk and avoid situations in which a malfunction or failure of the
Product could cause loss of human life, bodily injury or damage to property, including data loss or
corruption.
4. Do not use or otherwise make available the Product or related technology or any information contained in
this document for any military purposes, including without limitation, for the design, development, use,
stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products
(mass destruction weapons). When exporting the Products or related technology or any information
contained in this document, you should comply with the applicable export control laws and regulations and
follow the procedures required by such laws and regulations. The Products and related technology may not
be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable domestic or foreign laws or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the RoHS
compatibility of the Product. Please use the Product in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS
Directive. AKM assumes no liability for damages or losses occurring as a result of noncompliance with
applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth in this
document shall immediately void any warranty granted by AKM for the Product and shall not create or
extend in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written
consent of AKM.
MS1335-E-01
2013/12
- 12 -
Similar pages