VBUS05L1-DD1 www.vishay.com Vishay Semiconductors Bidirectional Symmetrical (BiSy) Low Capacitance, Single-Line ESD-Protection Diode in LLP1006-2M FEATURES • Ultra compact LLP1006-2M package • Low package height < 0.4 mm 2 1 • 1-line ESD-protection 21129 • Working range ± 5.5 V • Low leakage current IR < 0.1 μA 20855 • Very low load capacitance CD = 0.3 pF • ESD-protection acc. IEC 61000-4-2 ± 15 kV contact discharge ± 16 kV air discharge MARKING (example only) XY • Soldering can be checked by standard vision inspection; no X-ray necessary 21121 • Pin plating NiPdAu (e4) no whisker growth • e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn) Bar = pin 1 marking X = date code Y = type code (see table below) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 ORDERING INFORMATION DEVICE NAME ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VBUS05L1-DD1 VBUS05L1-DD1-G-08 8000 8000 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VBUS05L1-DD1 LLP1006-2M R 0.72 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS VBUS05L1-DD1 PARAMETER TEST CONDITIONS SYMBOL Peak pulse current Acc. IEC 61000-4-5; tp = 8/20 μs; single shot IPPM 2 A Peak pulse power Pin 1 to pin 2, acc. IEC 61000-4-5; tp = 8/20 μs; single shot PPP 34 W ESD immunity Operating temperature Storage temperature Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses Junction temperature VALUE UNIT ± 15 kV ± 16 kV TJ -40 to +125 °C TSTG -40 to +150 °C VESD PATENT(S): www.vishay.com/patents This Vishay product is protected by one or more United States and International patents. Rev. 1.4, 04-Feb-16 Document Number: 81188 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS05L1-DD1 www.vishay.com Vishay Semiconductors ELECTRICAL CHARACTERISTICS VBUS05L1-DD1 (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. Number of lines which can be protected Nchannel - Max. reverse working voltage VRWM - Reverse voltage at IR = 0.05 μA VR 5.5 - - V Reverse current at VRWM = 5.5 V IR - - 0.05 μA at IR = 1 mA VBR 7 8.4 9.5 V at IPP 1 A VC - 11.5 14 V at IPP = IPPM = 2 A VC - 14 17 V at VR = 0 V, f = 1 MHz CD - 0.33 0.4 pF at VR = 2.5 V, f = 1 MHz CD - 0.34 - pF Protection paths Reverse stand-off voltage Reverse breakdown voltage Reverse clamping voltage Capacitance MAX. UNIT - 1 lines - 5.5 V VBUS05L1-DD1: ESD PROTECTION WITH LOWEST LOAD CAPACITANCE The VBUS05L1-DD1 is a bidirectional and symmetrical (BiSy) ESD-protection device which clamps positive and negative overvoltage transients to ground. Connected between the signal or data line and the ground the VBUS05L1-DD1 offers a high isolation (low leakage current, lowest capacitance) within the specified working range. Due to the short leads and small package size of the tiny LLP1006-2M package the line inductance is very low, so that fast transients like an ESD-strike can be clamped with minimal over- or undershoots. TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 120 % Rise time = 0.7 ns to 1 ns 8 µs to 100 % 100 % 80 % 80 % 60 % IPPM Discharge Current IESD 100 % 60 % 53 % 20 µs to 50 % 40 % 40 % 27 % 20 % 20 % 0% -10 0 10 20 30 40 50 60 70 80 90 100 20557 Time (ns) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) Rev. 1.4, 04-Feb-16 0% 0 20548 10 20 30 40 Time (µs) Fig. 2 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Document Number: 81188 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS05L1-DD1 www.vishay.com 1.0 Vishay Semiconductors 140 both polarities f = 1 MHz 0.9 acc. IEC 61000-4-2 + 8 kV contact discharge 120 0.8 100 VC-ESD (V) 0.7 CD (pF) 0.6 0.5 0.4 80 60 40 0.3 20 0.2 0 0.1 0 - 20 0 1 2 3 4 5 6 - 10 0 10 20 30 40 50 60 70 80 90 VR (V) 21863 t (ns) 21866 Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR Fig. 6 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 20 10 both polarities 9 0 8 - 20 VC-ESD (V) 7 VR (V) 6 5 4 3 - 40 - 60 acc. IEC 61000-4-2 - 8 kV contact discharge - 80 - 100 2 - 120 1 0 0.001 0.01 0.1 21864 1 10 - 140 - 10 0 10 20 30 40 50 60 70 80 90 100 1000 10 000 IR (µA) Fig. 4 - Typical Reverse Voltage VR vs. Reverse Current IR Fig. 7 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) 18 200 both polarities 16 acc. IEC 61000-4-2 contact discharge 150 14 100 10 VC-ESD (V) 12 VC (V) t (ns) 21867 VC 8 6 50 VC-ESD 0 - 50 - 100 4 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 2 - 150 - 200 0 0 21865 0.5 1 1.5 2 2.5 3 IPP (A) Fig. 5 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP Rev. 1.4, 04-Feb-16 0 21868 2 4 6 8 10 12 VESD (kV) Fig. 8 - Typical Peak Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) Document Number: 81188 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS05L1-DD1 www.vishay.com Vishay Semiconductors 0.25 [0.010] 0.15 [0.006] PACKAGE DIMENSIONS in millimeters (inches): LLP1006-2M 0.65 [0.026] 0.55 [0.022] 0.05 [0.002] 0 [0.000] 0.4 [0.016] 0.33 [0.013] 0.45 [0.018] 0.35 [0.014] Orientation identification 0.125 [0.005] ref. 0.55 [0.022] 0.45 [0.018] 0.3 [0.012] 0.2 [0.008] 1.05 [0.041] 0.95 [0.037] 0.6 [0.024] 1 [0.039] solder resist mask solder pad 0.05 [0.002] Document no.: S8-V-3906.04-019 (4) Rev. 1 - Date: 15.July 2015 21798 0.2 [0.008] 0.5 [0.020] Foot print recommendation: 0.25 [0.010] 0.05 [0.002] Soldermask opening ± 0.03 measured middle of the package Unreeling direction Bidirectional LLP1006-xx Pin 1 mark Top view Rev. 1.4, 04-Feb-16 Pad layout - view from top seen at bottom side Document Number: 81188 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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