Electromagnetic Compatibility

Electromagnetic Compatibility
1
Agenda
• Basic Information and Market Trends
• EMC Tests
• Design Flow
– IC Examples
• Case Studies
–
–
–
–
LDO
SMPS
Drivers
IVN
• General PCB Guidelines
2
Basic Information and Market Trends
3
Intro to EMC
• EMC stands for Electro Magnetic Compatibility
– EMC is the “generalized” terminology used for making electronic
systems “compatible” with the magnetic fields that everywhere exist.
– Magnetic fields like: radio, mobile, TV, power cables, transformers,
inductors, etc...
– “To make compatible” means 2 things:
• My electronic system should not disturb other systems.
We talk about Electro Magnetic Emission (EME)
• My electronic system is immune for disturbances induced by other
systems.
We talk about Electro Magnetic Susceptibility (EMS)
– For EME we distinguish:
• “conducted emission” (transferred by coupling or cables)
• and “radiated emission” (transferred through the air)
4
Basic Principles
EMC for ICs
Emission
Susceptibility
of electromagnetic energy
To an electromagnetic wave
5
Historical Development
IC Supplier
Module Design
Car Manufaturer
Design to spec
use IC as is
fixes on board level
(PCB redesign, RF filters)
Design to spec
use IC as is
fixes on board level
(PCB redesign, RF filters)
fix or $
Consider EMC requirements
EMC redesign
force redesigns
fixes on board level
(PCB redesign, RF filters)
don‘t accept
violations
Consider EMC requirements
very seriously
EMC compliance as
acceptance criteria
don‘t accept violations
EMC characterization results have become a reject criteria for ICs.
6
acceptance level low
Higher Complexity Changes Design Criteria
•
•
•
Cars are becoming more and more complex w/ each generation.
With increased complexity (and variety of configurations) it is necessary
to guarantee well-defined interface conditions to ensure plug-and-play
for all configurations during car-assembly.
In the past, IEC7637-x was used to “define” the supply conditions.
– Nominal ratings, load dump, switching transients, etc. are described
by this norm.
– However it does not cover
• RF susceptibility
• Emissions
•
•
•
Spectrum/Power has widened in the recent past due to increased usage
of RF-based tools.
Wide application range of ASSPs vs. ASICs
Consequently, the EMC requirements must to be considered at IC level
to improve system compatibilities.
7
EMC Tests
8
EMC Standards
•
Acceptance tests Car-level
– Radiated power (emissions, immision), tested at car
– Norm: CISPR25 and customs
– Frequency range: 10kHz – 18GHz
•
Since 2003, standards have been released to provide test methods especially
for components.
•
For Emission, IEC-61967 is commonly used. ON Semiconductor uses IEC61967-4 which is 1 Ω/150 Ω conducted method accepted by car manufacturers.
In a few cases IEC-61967-2 (Tem Cell method) can be applied for radiated
emission.
•
For Susceptibility, ON Semiconductor applies IEC-62132-3. The DPI (Direct
Power Injection) test method is currently accepted because it is easy to
reproduce the set up and close to the perturbations received on the application
board.
9
IEC 61967-4
10
IEC 61967-4
Board Layout Example
11
IEC 61967-4
Measurement Levels
12
IEC 62132-4
ON Semiconductor DPI Setup
Signal generator
Oscilloscope
Device under test
Coupling
Capacitance
IEEE Bus
Amplifier
PC Monitoring
13
DUT
Printed Circuit
Board
Wattmeter
Vout
Good signal
or Failure signal
IEC 62132-4
Measurement levels
30 dBm = 1 W
A global pin carries a signal or power which enters or leaves the application board
A local pin carries a signal or power which does not leave the application board. It remains on
the application board as a signal between two components
14
IEC 62132-4
Board Example
15
IEC 62132-4
DPI Results
16
EMC Setup Conclusion
•
•
•
•
Direct power injection (DPI) - conducted immunity method in accordance to:
• IEC 62132 part 4 – measurement of electromagnetic immunity of integrated
circuits
• CISPR25 – limits and methods for measurement
• ISO 11452 part 7 – component test method for electrical disturbances
• FTZ recommendation (IBEE tests) for CANs and LINs
1 Ω and 150 Ω method for conducted emission measurement in accordance to:
• IEC 61967 part 4 – measurement of conducted emission of integrated circuits
• CISPR25 – limits and methods for measurement
• FTZ recommendation (IBEE tests) for CANs and LINs
Emission measurements by TEM cell – radiated electromagnetic emissions method in
accordance to:
• IEC 61967 part 2 - measurements of radiated electromagnetic emissions of
integrated circuits
• CISPR25 – limits and methods for measurement
Bulk current injection (BCI) – immunity test by magnetic field in accordance to:
• IEC 62132 part 3 – immunity test of integrated circuits by bulk current injection
400Mhz
• ISO 11452 part 4 – component immunity test by bulk current injection
17
Design Flow
18
EMC Methodology
• Why taking into account EMC in development phase?
• EMC fails has been one of the most critical success factors
in new module developments.
–
–
There are multiple ways to fail.
An EMC issue always impacts the timeline.
EMC solutions
design
EMC cost
validation
time schedule
19
production
EMC Methodology
• EMC validated
before fabrication
• Include reduction
techniques in the
early design phases
and run simulation
EMC internal Specifications
EMC design/layout review
20
Impact to design work
• What can be done at the development phase to improve
designs ?
• Individual contributions:
– Device definition
• Pinout, Partitioning, Technology selection
– Circuit concepts
• Signal processing paths, Biasing, Logic concepts
– Circuit topologies
• I/O structures !
– Layout
• Floorplanning, Metal routing,...
21
Capacitive Coupling (Layout)
PIN
Parasitic CAP
Injected Noise
Sensitive node
Hi-Z
M2
M2
M1
poly
Metal 1
poly
VBAT
Capacitive Coupling
22
Vbat
Rectification
rectification
23
Drain Coupling
Cdg
Cgs
24
Parasitic NMOS
25
Case Study: LDO
26
NCV4275A BCI Failure
• During VIN injection, the NCV4275 exhibits a non
acceptable failure on the RST pin
RST drops due to power injection
26dBmA
27
NCV4275A EMC Solution
• By filtering the RST comparator, the failure mode
disappears
RST drops due to the VOUT issue
Normal behavior
28
NCV4275A DPI results
VIN
VOUT
RST
29
Case Study: SMPS
30
NCV8851 Emission Levels
• Radiated emissions testing
for switching regulator
Baseline
60
• Switching creates a lot of
noise
55
50
Baseline
45
65
40
0
2
4
6
Frequency (MHz)
8
10
Amplitude (dBuV)
Amplitude (dBuV)
65
60
55
50
45
40
0
0.2
0.4
0.6
Frequency (MHz)
31
0.8
1
Spread Spectrum Techniques
• Spread spectrum modulates
the switching frequency
Time Domain
• Reduces peak noise in
frequency domain by
spreading to sidebands
Frequency Domain
Unmodulated
V
t
fc
3fc
5fc
7fc
9fc
fc
3fc
5fc
7fc 9fc
Modulated
V
t
32
NCV8851 Spread Spectrum
Typical setup for a TEM cell.
Signal Generator
X1
33
RSG
Rosc
1
2
•
178k
Rosc
28k
•
Signal generator attached to
Rosc network to modulate the
current.
•
Changes the switching frequency
NCV8851 Spread Spectrum
•
The switching frequency for the
SMPS device tested is set by the
Rosc pin which connects to GND
through a resistor.
•
The resistor value is determined
by:
ROSC
•
8687000
=
FSW
Fsw is the switching frequency
[Hz] and Rosc is the pin
resistance [kΩ].
34
Voltage (V)
0
0.5
1
Rosc (kΩ)
24.19
28.00
33.23
Fsw (kHz)
359.05
310.25
261.45
NCV8851 Spread Spectrum
• Peaks are reduced and the sidebands are expanded
• Harmonic peak values are also reduced
• Modulation with a 10 kHz sine wave was the most effective
method
0.1MHz to 1MHz
10kHz Sin Wave compared to Baseline
Amplitude (dBuV)
65
Original Emission
60
55
Modulated Emission
50
45
40
0
0.2
0.4
0.6
Frequency (MHz)
35
0.8
1
Spread Spectrum Conclusions
• Spread spectrum methods have the unique ability to reduce
the noise at the switching frequency of an SMPS device.
• Through modulation at the Rosc pin, the switching
frequency can be spread to nearby frequencies, thereby
reducing the peak emission levels at the fundamental
frequency and the related harmonics
36
Case Study: Drivers
37
NCV7729 Charge pump Architecture
• CHP: Regulated Chargepump (max. -0.3 / 50 V)
– 2 kHz mode w/ reduced chargepump power
38
EMI Improvements
•
Waveshaping to suppress higher
harmonics in load current (d²I/dt²)
•
Regulated Chargepump principle
– Reduced RF current consumption of
Chargepump
– Improved Gate control
(Voltage control vs. Current control)
– No RF output voltage ripple
– Smaller chargepump w/ improved
efficiency
39
Switching frequency
CHP switching charge Q(CHP)
Slope time
Chargepump charge time
Chargepump efficiency
[kHz]
[nC]
[µs]
[%]
[%]
20.00
60.00
3.00
50.00
30.00
ICHP
[mA]
40.00
Unbuffered chargepump
I(VB) for CHP
[mA]
133.33
Buffered chargepump
ICHP(average)
I(VB) for CHP
[mA]
[mA]
1.20
4.00
I(VB) buffered/I(VB) unbuffered
[1]
dB
0.03
-30.46
EMI Comparison using 150 Ω on VS pin
Regulated 3 phases charge pump
Unregulated 3 phases charge pump
No PWM, IN1, IN2 tied to Vcc
40
EMI Comparison using 150 Ω on OUT1 pin
Regulated 3 phases charge pump
Unregulated 3 phases charge pump
Load 2.2 mH, 13Ω, 1 Amp load current
41
Low Power CHP Mode
•
By programming the low power mode, the frequency of the CHP is
reduced to 1 MHz improving the EMI performance in HF
150 Ω on VS pin
42
NCV7729 DPI Results
• The device exhibits severe
susceptibility at three
distinct frequencies
during injection on VS pin.
– 100 Mhz
– 200 Mhz
– 600 Mhz
43
Av44 Vs BB59
Functional Root Cause
•
Functional Root Cause appears
to be the death of the ΔVBE/R
current source inside the VCC
BIAS circuit block.
VCC BIAS CIRCUIT
VCC_ext
•
VCC_CL
The difference in susceptibility of
AV44 to BB59 is explained by
the capacitors added to the
ΔVBE/R bias.
2VBE
I-BIAS
93K
93K
6pF
2X
•
The same functional behavior
was proved to be the root cause
during injection on VS, OUT1,
and OUT2, throughout the entire
frequency range.
44
9pF
4K
Theory of injection effect
• Injection on VS and OUTx
pins injects noise into the
substrate thus effecting
circuitry that is running on
VCC.
• Voltage difference between
SUB and AGND is
explained by layout.
45
0.7Meg
ΔVBE/R simulations Sub injection
46
• With 50 mVpp signal
the ref can drop from
1.1 V to 1 V.
ΔVBE/R Solution
• By balancing the
noise on the
branches we were
able to get a robust
bias structure
VCC_CL
2VBE
I-BIAS
93K
93K
2X
4K
47
EMC Conclusion
• The susceptibilities at three distinct frequencies during
injection on VS pin (100 MHz, 200 MHz, 600 MHz) have
been improved
48
Case Study: IVN
49
Case Study: Design CAN Receiver
• Requirements:
–
–
–
–
–
–
–
–
5 V operation
Bit rates up to 1 MB / sec
Propagation delay < 200 nsec
Zin > 20 kΩ
2 CMP levels in 0.5 V to 0.9 V
Hysteresis > 100 mV
+7 to –2 V DC input capability
Etc…
• Starting topology:
– Bipolar differential pair
– High Gm, low offset
50
>250pF
60
>250pF
100
100
4.7nF
DPI
4.7nF
~
Case Study: Design CAN Receiver
• Step 1: Identify potential rectifiers
– Most risky: bandwidth limitation
51
Case Study: Design CAN Receiver
• Step 1: Identify potential rectifiers
– Most risky: bandwidth limitation
• Step 2: Pass / fail criterion:
– Eg. DM DC shift |V1 – V2| < 20 mV
– Eg. CM DC shift V1, V2 < 200 mV
– Defines max Vemc on Diff pair
52
Vmax Diff
Vmax CM
Q1
Q2
Case Study: Design CAN Receiver
•
Step 1: Identify potential rectifiers
– Most risky: bandwidth limitation
•
Step 2: Pass / fail criterion:
– Eg. DM DC shift |V1 – V2| < 20 mV
– Eg. CM DC shift V1, V2 < 200 mV
– Defines max Vemc on Diff pair
•
Q1
Vmax Diff
Vmax CM
Q2
Step 3: Impedance + AC analysis
– Pole at common emitter
Gm
~ 63 MHz
=
F
− 3db 2 *π * C1
(@ Ic=10uA, 1pF)
– To avoid charge pumping
• Limit input signal bandwidth << f(pole)
• Speed requirements allow an LPF >15 MHz
with 50% process tolerance
⇒ This gives a too low attenuation
⇒ Increase CMP bandwidth
⇒ Attenuate the input signal resistively
53
Impedance
LPF
Com. Emit
1K
10K
100K 1M
10M 100M
Frequency
1G
Case Study: Design CAN Receiver
• Step 4: Zin + external components
– DPI power is common mode, Zin >> 60 Ω
– Vrms ~45 V peak CM, Mismatch gives also DM
• LF filtering: NOK due to speed requirements
– Add strong attenuation at LF !
•
•
•
•
Resistive divider, divide by 25
Solves also CM + DM CMP input range
Put LPF at 30 MHz
Boost bandwidth by Rbias
>250pF
Q1
– HV ESD protections
60
>250pF
54
Q2
Case Study: Design CAN Receiver
• Better alternative:
55
Case Study: Design CAN Receiver
• Step 5: Check for resonance
– A very basic PCB + package model is used
– Use PCB back-annotation or “measure”
Resonance at ~80 MHz, ~30 dB peak
Reduce C1, C2 or L3 (difficult)
Add damping resistor(s)
PCB + CAN bus
220p
C3
10n
L5
100n
100n
L1
L8
Bus terminator
56
220p
C2
120
R2
100n
100n
L2
L7
Line + EMC
CANH
22k
V2
120
R1
V1
220p
C4
ASIC
R5
R3
4.7n
2.2n
L3
L4
220p
C1
22k
R4
1.8K
C5
1.8K
R6
Bus terminator
Divider + LPF
C6
CANL
Case Study: Design CAN Receiver
• Step 6: Check by transient simulation
– 5 frequencies are selected:
•
•
•
•
Min and max required EMC frequencies (boundaries).
Resonance frequency, vulnerable, some soft rectification is expected.
Comparator pole frequency. No rectification may occur
LP filter frequency. Frequency where LPF starts to act
Figure: Transient simulation results
V(Q1_collector) with:
• Femc = 30 MHz (LPF)
• 100 MHz (cmp pole)
• 77.288 MHz (resonance).
3.42654
3.42652
3.4265
V
3.42648
3.42646
3.42644
3.42642
3.4264
3.42638
3.42636
0
10
20
Time/µSec s
57
30
40
50
60
70
80
90
10µSec s /div
General PCB Guidelines
58
Why design rules for EMC?
•
EMI must reach the conductors in order to disturb the components. This
means that the loops, long length and large surface of the conductors
are vulnerable to EMI, making the PCB the principal subject of EMC
improvements.
PCB tracks are transmissions lines
Ω/m
F /m
R : resistance
C : capacitance
L
R
C
59
R
G
L : inductance H / m
G : conductance S / m
L
characteristic impedance Z =
propagation velocity v =
R+ jLω
G+ jCω
1
LC
Arrangement of functional groups
Analog group
Digital group
Power supply
group
I/O connector
• All components should be placed with an appropriate
functional group and their tracks routed within their
designated PCB area
60
Ground Plane
•
•
•
•
•
Place ground plane(s) under all components and all their associated
tracks.
A continuous ground plane with no avoidance
A good ground plane is achieved by using a complete layer for ground
Do not cut the ground plane by routing signal lines in GND plane.
Provide a length / width ratio less than 5 for the PCB. (At a ratio > 5 the
inductance of the ground plane increases)
61
Trace Width
•
•
•
•
Connect each component directly to plane.
Use a via for each component-pin for GND-connection instead of GNDtraces.
Connections to ground must be shorter than 0.5 mm (20 mils).
Trace widths should be around 20 mils to reduce partial parasitic
inductance.
62
Decoupling Traces
• Decoupling capacitors have to be placed very closely to the
VCC and GND pin of the IC.
Ground plane
c
I
Vcc
c
• High-frequency, low-inductance ceramic capacitors should
be used for IC decoupling at each power pin. Use 0.1 µF for
up to 15 MHz, and 0.01 µF over 15 MHz.
63
High Switching Current
• Printed circuit board traces which carry high switching
current with fast rise/fall times (5 - 10 ns) should maintain at
least 3 mm spacing from other signal traces which run
parallel to them.
• With high density layout ground guard traces should be
placed between them.
64
PCB Radiated Emission
•
Radiated emission is the most important factor in EMC failure and
strongly dependant of the PCB design
Common mode
Cable length < λ
Differential mode
Loop length < ¼ λ
A = loop area
65
PCB Radiated Emission
• Comparison between common mode and differential mode
radiated emission
Common mode is the principal source of noise up to 2 GHz
66
Reduce common mode emission
•
•
•
•
•
Most of the techniques for reducing Differential mode emission can
apply to the common mode emission. For example, by using ground
plane.
Reduce the cable length and/or the common mode current reduces the
common mode emission
The common mode radiation is linked to the electric field by the following
equation:
For example, to limit the radiated emission, 3 m distance at 100 uV/m
with 1 m cable length.
Maximum current in common mode should be 15 uA. (This the
maximum current due to the voltage drop in the circuit)
67
Reduce differential mode emission
•
Based on the equation, Ed is proportional to the current in the loop (I)
and the loop area (A).
68
Conclusions
• Changes in our modern world:
– Strong increase in HF signals (more & faster PC’s, uP’s in about
everything, more & faster networks, ADSL, GPS, satellite TV/radio
etc…)
– More and more mobile systems (eg. mouse + keyboard of a PC,
Bluetooth, GPS, GSM, TV, radio, PDA, iPod…)
– Everything gets more compact, merge sensitive and harsh
environments together on 1 die
• Car electronics evolved from comfort applications
– Interior light, radio, heating, climate control, electronic windows etc…
• to safety improving applications
– Central door locks, light-on warning etc…
• to today also safety critical applications
– Drive by wire, Engine control, Airbag, In vehicle networking, ABS,
Cruse control etc…
69
For More Information
•
View the extensive portfolio of power management products from ON
Semiconductor at www.onsemi.com
•
View reference designs, design notes, and other material supporting
automotive applications at www.onsemi.com/automotive
70
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