INTERSIL ISL28474

ISL28274, ISL28474
®
Data Sheet
December 13, 2006
Micropower, Single Supply, Rail-to-Rail
Input-Output Instrumentation Amplifier
and Precision Operational Amplifier
The ISL28274 is a combination of a micropower
instrumentation amplifier (Amp A) with a low power precision
amplifier (Amp B) in a single package. The ISL28474 consist
of two micropower instrumentation amplifiers (Amp A) and
two low power precision amplifiers (Amp B) in a single
package. The amplifiers are optimized for operation at 2.4V
to 5V single supplies. Inputs and outputs can operate rail-torail. As with all instrumentation amplifiers, a pair of inputs
provide a high common-mode rejection and are completely
independent from a pair of feedback terminals. The
feedback terminals allow zero input to be translated to any
output offset, including ground. A feedback divider controls
the overall gain of the amplifier. The additional precision
amplifier can be used to generate higher gain, with smaller
feedback resistors or used to generate a reference voltage.
The instrumentation amp (Amp A) is compensated for a gain
of 100 or more and the precision amp (Amp B) is unity gain
stable. Both amplifiers have PMOS inputs that provide less
than 30pA input bias currents.
FN6345.0
Features
• Combination of IN-AMP and OP-AMP in a single package
• 120µA supply current for ISL28274
• Input Offset Voltage IN-AMP 400µV max
• Input Offset Voltage OP-AMP 225µV max
• 30pA max input bias current
• 100dB CMRR and PSRR
• Single supply operation of 2.4V to 5.0V
• Ground Sensing
• Input voltage range is rail-to-rail and output swings
rail-to-rail
• Pb-free plus anneal available (RoHS compliant)
Applications
• 4-20mA loops
• Industrial Process Control
• Medical Instrumentations
The amplifiers can be operated from one lithium cell or two
Ni-Cd batteries. The amplifiers input range goes from below
ground to slightly above positive rail. The output stage
swings completely to ground or positive supply - no pull-up
or pull-down resistors are needed.
Ordering Information
PART NUMBER
(Note)
ISL28274FAZ
PART
MARKING
28274FAZ
ISL28274FAZ-T7 28274FAZ
Coming Soon
ISL28474FAZ
QTY. PER PACKAGE
TUBE/REEL (Pb-Free)
97/Tube
PKG.
DWG. #
16 Ld QSOP MDP0040
7”
16 Ld QSOP MDP0040
(1000 pcs) Tape & Reel
ISL28474FAZ
55 /Tube
24 Ld QSOP MDP0040
Coming Soon
ISL28474FAZ
7”
24 Ld QSOP MDP0040
ISL28474FAZ-T7
(1000 pcs) Tape & Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28274, ISL28474
Pinout
ISL28474
(16 LD QSOP)
TOP VIEW
ISL28274
(16 LD QSOP)
TOP VIEW
IA OUT_1 1
24 IA OUT_2
16 V+
IA FB+_1 2
23 IA FB+_2
IA OUT 2
15 OUT
IA FB-_1 3
IA FB+ 3
14 NC
IA IN-_1 4
21 IA IN-_2
13 NC
IA IN+_1 5
20 IA IN+_2
IA IN- 5
12 IN-
IA EN_1 6
19 IA EN_2
IA IN+ 6
11 IN+
V+ 7
IA EN 7
10 EN
EN_1 8
17 EN_2
V- 8
9 NC
IN+_1 9
16 IN+_2
IA = Instrumentation Amplifier
IN-_1 10
15 IN-_2
A
= Instrumentation Amplifier
NC 11
B
= Precision Amplifier
22 IA FB-_2
18 V-
+ -
B
A
B
- +
A
+ -
+ -
- +
B
OUT_1 12
14 NC
13 OUT_2
IA = Instrumentation Amplifier
A
= Instrumentation Amplifier
B
= Precision Amplifier
+ + -
IA FB- 4
A
- +
NC 1
2
FN6345.0
December 13, 2006
+ + -
ISL28274, ISL28474
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs
Input Current (IN, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage (IN, FB) . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV
ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance
θJA (°C/W)
16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .
112
24 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .
88
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VOS
INSTRUMENTATION AMPLIFIER “A” V+ = +5V, VS- = GND, VCM = 1/2VS+ TA = +25°C, unless otherwise
specified. For ISL28274 ONLY. Boldface limits apply over the operating temperature range, -40°C to
+125°C.
DESCRIPTION
CONDITIONS
Input Offset Voltage
MIN
TYP
MAX
UNIT
400
-750
35
400
750
µV
Input Offset Voltage Temperature
Coefficient
Temperature = -40°C to +125°C
Input Offset Current between IN+ and
IN-, and between FB+ and FB-
(see Figure 44 for extended temperature range)
-40°C to +85°C
-30
-80
±5
30
80
pA
IB
Input Bias Current (IN+, IN-, FB+, and (see Figure 36 and 37 for extended temperature
FB- terminals)
range)
-40°C to +85°C
-30
-80
±10
30
80
pA
eN
Input Noise Voltage
f = 0.1Hz to 10Hz
Input Noise Voltage Density
Input Noise Current Density
TCVOS
IOS
iN
0.7
µV/°C
0.75
µVP-P
fo = 1kHz
210
nV/√Hz
fo = 1kHz
0.65
pA/√Hz
1
GΩ
RIN
Input Resistance
VIN
Input Voltage Range
V+ = 2.4V to 5.0V
0
CMRR
Common Mode Rejection Ratio
VCM = 0V to 5V
80
75
100
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5V
80
75
100
dB
EG
Gain Error
RL = 100kΩ to 2.5V
-0.2
%
SR
Slew Rate
RL = 1kΩ to GND
GBWP
Gain Bandwidth Product
Electrical Specifications
PARAMETER
0.40
0.35
V+
0.5
0.65
0.70
2.5
V
V/µs
MHz
OPERATIONAL AMPLIFIER “B” VS+ = +5V, VS- = GND, VCM = 1/2VS+ TA = +25°C, unless otherwise
specified. For ISL28274 ONLY. Boldface limits apply over the operating temperature range, -40°C to
+125°C.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
-225
-450
±20
225
450
µV
VOS
Input Offset Voltage
ΔV OS
-----------------ΔTime
Long Term Input Offset Voltage
Stability
1.2
µV/Mo
ΔV OS
---------------ΔT
Input Offset Drift vs Temperature
2.2
µV/°C
IOS
Input Offset Current
3
(see Figure 46 for extended temperature range)
-40°C to +85°C
-30
-80
±5
30
80
pA
FN6345.0
December 13, 2006
ISL28274, ISL28474
Electrical Specifications
PARAMETER
OPERATIONAL AMPLIFIER “B” VS+ = +5V, VS- = GND, VCM = 1/2VS+ TA = +25°C, unless otherwise
specified. For ISL28274 ONLY. Boldface limits apply over the operating temperature range, -40°C to
+125°C. (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
-30
-80
±10
30
80
pA
IB
Input Bias Current
(see Figure 40 and 41for extended temperature
range)
-40°C to +85°C
eN
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz
5.4
µVPP
Input Noise Voltage Density
fO = 1kHz
50
nV/√Hz
iN
Input Noise Current Density
fO = 1kHz
0.14
pA/√Hz
CMIR
Input Voltage Range
Guaranteed by CMRR test
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
80
75
100
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5V
85
80
105
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ
200
190
300
V/mV
SR
Slew Rate
0.12
0.09
±0.14
GBW
Gain Bandwidth Product
Electrical Specifications
PARAMETER
VOUT
5
0.16
0.21
300
V
V/µs
kHz
COMMON ELECTRICAL SPECIFICATIONS V+ = 5V, V- = GND, VCM = 1/2VS+ TA = 25°C, unless otherwise
specified.For ISL28274 ONLY. Boldface limits apply over the operating temperature range, -40°C to
+125°C.
DESCRIPTION
Maximum Output Voltage Swing
CONDITIONS
MIN
Output low, RL = 100kΩ
Output low, RL = 1kΩ
TYP
MAX
UNIT
3
6
30
mV
130
175
225
mV
Output high, RL = 100kΩ
4.990
4.97
4.996
V
Output high, RL = 1kΩ
4.800
4.750
4.880
V
IS,ON
Supply Current, Enabled
ISL28274 All channels enabled
120
ISL28474 All channels enabled
240
IS,OFF
Supply Current, Disabled
ISL28274 All channels enabled
4
ISL28474 All channels enabled
8
µA
156
175
µA
7
9
µA
µA
ISC+
Short Circuit Sourcing Capability
RL = 10Ω
28
25
31
mA
ISC-
Short Circuit Sinking Capability
RL = 10Ω
24
20
26
mA
VS
Minimum Supply Voltage
VINH
Enable Pin High Level
VINL
Enable Pin Low Level
IENH
Enable Pin Input Current
VEN = 5V
IENL
Enable Pin Input Current
VEN = 0V
4
2.4
V
2
V
0.8
V
0.8
1
1.3
µA
0
26
50
100
µA
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves
90
90
COMMON-MODE INPUT = V+
COMMON-MODE INPUT = 1/2V+
GAIN = 10,000
GAIN = 10,000
80
80
70
GAIN = 5,000
GAIN = 2,000
GAIN (dB)
GAIN (dB)
GAIN = 5,000
GAIN = 1,000
60
GAIN = 500
50
GAIN = 200
70
GAIN = 500
50
GAIN = 200
GAIN = 100
40
30
1
10
100
1k
10k
FREQUENCY (Hz)
100k
30
1M
FIGURE 1. AMPLIFIER “A”(INAMP) FREQUENCY
RESPONSE vs CLOSED LOOP GAIN
1
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
FIGURE 2. AMPLIFIER “A”(INAMP) FREQUENCY RESPONSE
vs CLOSED LOOP GAIN. VCM = 1/2V+
45
90
COMMON-MODE INPUT = VM +10mV
GAIN = 10,000
40
GAIN = 5,000
35
80
VS = 5V
30
70
GAIN = 2,000
GAIN (dB)
GAIN (dB)
GAIN = 1,000
60
GAIN = 100
40
GAIN = 1,000
60
GAIN = 500
50
VS = 2.4V
25
20
AV = 100
RL = 10kΩ
CL = 10pF
RF/RG = 100
RF = 10kΩ
RG = 100Ω
15
GAIN = 200
10
GAIN = 100
40
5
0
30
1
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
10k
100k
1M
100
1200pF
820pF
AV = 100
R = 10kΩ
CL = 10pF
RF/RG = 100
RF = 10kΩ
RG = 100Ω
10
100
CMRR (dB)
2200pF
40
25
1k
120
45
30
100
FIGURE 4. AMPLIFIER “A”(INAMP) FREQUENCY
RESPONSE vs SUPPLY VOLTAGE
50
35
10
FREQUENCY (Hz)
FIGURE 3. AMPLIFIER “A”(INAMP) FREQUENCY
RESPONSE vs CLOSED LOOP GAIN
GAIN (dB)
GAIN = 2,000
80
60
AV = 100
40
56pF
20
1k
10k
100k
FREQUENCY (Hz)
FIGURE 5. AMPLIFIER “A”(INAMP) FREQUENCY
RESPONSE vs CLOAD
5
1M
0
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 6. AMPLIFIER “A”(INAMP) CMRR vs FREQUENCY
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
700
INPUT VOLTAGE NOISE (nV/√Hz)
120
100
PSRR (dB)
80
PSRR+
60
PSRR-
40
AV = 100
20
600
500
400
300
AV = 100
200
100
0
0
10
100
1k
10k
100k
1
1M
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. AMPLIFIER “A”(INAMP) INPUT VOLTAGE NOISE
SPECTRAL DENSITY
FIGURE 7. AMPLIFIER “A”(INAMP) PSRR vs FREQUENCY
2.0
VOLTAGE NOISE (2µV/DIV)
CURRENT NOISE (pA/√Hz)
1.8
1.6
1.4
1.2
1.0
0.8
AV = 100
0.6
0.4
0.2
0.0
1
10
100
1k
10k
100k
TIME (1s/DIV)
FREQUENCY (Hz)
FIGURE 9. AMPLIFIER “A”(INAMP) INPUT CURRENT NOISE
SPECTRAL DENSITY
FIGURE 10. AMPLIFIER “A”(INAMP) 0.1 Hz TO 10Hz INPUT
VOLTAGE NOISE
45
+1
0
40
VS = ±2.5V
RL = 1k
-1
35
VS = ±1.2V
RL = 10k
30
GAIN (dB)
-2
GAIN (dB)
VS = ±1.2V
RL = 1k
VS = ±2.5V
RL = 10k
-3
-4
8
1k
VS = ±1.2V
20
15
-5 V
OUT = 50mVp-p
AV = 1
-6
CL = 3pF
-7 RF=0/RG = INF
VS = ±2.5V
25
10
5
AV = 100
RL = 10kΩ
CL = 3pF
RF = 100kΩ
RG = 1kΩ
VS = ±1.0V
0
10k
100k
FREQUENCY (Hz)
1M
FIGURE 11. AMPLIFIER “B” (OP-AMP) FREQUENCY
RESPONSE vs SUPPLY VOLTAGE
6
5M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 12. AMPLIFIER “B” (OP-AMP) FREQUENCY
RESPONSE vs SUPPLY VOLTAGE
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
100
VCM = VDD/2
60
40
20
VDD = 5V
0
-20
-40
VDD = 2.5V
-60
-80
-100
VOS, µV
-40
-60
-80
-100
0
1
2
3
OUTPUT VOLTAGE (V)
4
0
5
100
80
40
80
40
0
-40
-40
-80
-80
100
10k
1k
100k
1M
150
50
40
0
20
GAIN
-50
-100
100
10k
1k
100k
-150
1M
FREQUENCY (Hz)
FIGURE 16. AMPLIFIER “B” (OP-AMP) AVOL vs FREQUENCY
@ 1kΩ LOAD
10
VS = 5VDC
VSOURCE = 1Vp-p
RL = 10kΩ
AV = +1
0
-20
CMRR (dB)
PSRR -
-40
-50
-60
PSRR +
-30
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
-100
10
100
VS = ±2.5VDC
VSOURCE = 1Vp-p
RL = 10kΩ
-10
-30
PSRR (dB)
100
60
-20
10
-120
10M
10
-20
5
200
FREQUENCY (Hz)
-10
4
0
FIGURE 15. AMPLIFIER “B” (OP-AMP) AVOL vs FREQUENCY
@ 100kΩ LOAD
0
3
PHASE
GAIN (dB)
0
PHASE (°)
80
10
2
FIGURE 14. AMPLIFIER “B” (OP-AMP) INPUT OFFSET
VOLTAGE vs COMMON-MODE INPUT VOLTAGE
120
1
1
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 13. AMPLIFIER “B” (OP-AMP) INPUT OFFSET
VOLTAGE vs OUTPUT VOLTAGE
GAIN (dB)
-20
PHASE (°)
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
0
80
1k
10k
100k
1M
TEMPERATURE (°C)
FIGURE 17. AMPLIFIER “B” (OP-AMP) PSRR vs FREQUENCY
7
10
100
1k
10k
100k
1M
TEMPERATURE (°C)
FIGURE 18. AMPLIFIER “B” (OP-AMP) CMRR vs FREQUENCY
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
2.56
5.0
VS = 5VDC
VOUT = 2Vp-p
RL = 1kΩ
AV = -2
VIN
2.54
4.0
3.0
VOUT
2.50
VOLTS (V)
VOLTS (V)
2.52
2.48
VS = 5VDC
VOUT = 0.1Vp-p
2.46
VOUT
2.0
VIN
1.0
RL = 1kΩ
2.44
0
AV = +1
2.42
0
2
4
6
8
10
12
TIME (µs)
14
16
18
20
FIGURE 19. AMPLIFIER “B” (OP-AMP) SMALL SIGNAL
TRANSIENT RESPONSE
0
100
150
TIME (µs)
200
250
FIGURE 20. AMPLIFIER “B” (OP-AMP) LARGE SIGNAL
TRANSIENT RESPONSE
1k
VOLTAGE NOISE (nV/√Hz)
10.00
CURRENT NOISE (pA/√Hz)
50
1.00
0.10
100
10
1
0.01
1
10
100
1k
10k
1
100k
10
100
FREQUENCY (Hz)
FIGURE 21. AMPLIFIER “B” (OP-AMP) CURRENT NOISE vs
FREQUENCY
10k
1k
100k
FREQUENCY (Hz)
FIGURE 22. AMPLIFIER “B” (OP-AMP) VOLTAGE NOISE vs
FREQUENCY
6
V+ = 5V
VIN
VOLTS (V)
VOLTAGE NOISE (1µV/DIV)
5
4
100K
VS +
3
100K
2
Function
Generator
33140A
DUT
+
VOUT
1K
VS -
1
5.4µVP-P
0
0
TIME (1s/DIV)
FIGURE 23. AMPLIFIER “B” (OP-AMP) 0.1Hz TO 10Hz INPUT
VOLTAGE NOISE
8
50
100
TIME (ms)
150
200
FIGURE 24. AMPLIFIER “B” (OP-AMP) INPUT VOLTAGE
SWING ABOVE THE V+ SUPPLY
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
155
1V/DIV
SUPPLY CURRENT (µA)
AV = -1
VIN = 200mVp-p
V+ = 5V
V- = 0V
EN
INPUT
135
115
95
0
VOUT
0.1V/DIV
75
55
35
2
2.5
3
3.5
4
4.5
5
5.5
0
10µs/DIV
SUPPLY VOLTAGE (V)
FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE
170
FIGURE 26. AMPLIFIER “B” (OP-AMP) ENABLE TO OUTPUT
DELAY TIME
5.0
n = 100
MAX
160
4.8
MAX
4.6
140
CURRENT (µA)
150
CURRENT (µA)
n = 100
MEDIAN
130
120
110
100
4.4
4.2
4.0
3.8
3.6
90
3.2
80
-40
3.0
-40
-20
0
20
40
60
80
MEDIAN
3.4
MIN
100
120
MIN
-20
0
TEMPERATURE (°C)
FIGURE 27. TOTAL SUPPLY CURRENT vs TEMPERATURE
VS = ±2.5V ENABLED. RL = INF
80
100
MIN
MAX
120
IA FB+ IBIAS (pA)
MEDIAN
-5.0
-5.5
-6.0
MIN
0
20
n = 100
0
-4.5
CURRENT (µA)
60
50
n = 100
-20
40
FIGURE 28. DISABLED POSITIVE SUPPLY CURRENT vs
TEMPERATURE VS = ±2.5V. RL = INF
-4.0
-6.5
-40
20
TEMPERATURE (°C)
-50
-100
-150
MEDIAN
-200
-250
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 29. DISABLED NEGATIVE SUPPLY CURRENT vs
TEMPERATURE VS = ±2.5V. RL = INF
9
-300
-40
MAX
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 30. I BIAS (IA FB+) vs TEMPERATURE VS = ±2.5V.
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
25
40
MIN
20
n = 100
n = 100
-25
IA FB+ IBIAS (pA)
IA FB- IBIAS (pA)
0
-20
-40
-60
-80
MEDIAN
-100
-120
-160
-40
-20
0
20
40
60
80
-125
-175
MEDIAN
-225
MAX
-140
MIN
-75
100
-275
-40
120
MAX
-20
0
TEMPERATURE (°C)
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 31. I BIAS (IA FB-) vs TEMPERATURE VS = ±2.5V.
FIGURE 32. I BIAS (IA FB+) vs TEMPERATURE VS = ±1.2V
50
50
n = 100
IA IN+ IBIAS (pA)
IA FB- IBIAS (pA)
n = 100
0
0
MIN
-50
-100
MEDIAN
-150
MAX
-200
-250
-40
-50
MEDIAN
MIN
-100
-150
-200
-250
MAX
-300
-20
0
20
40
60
80
100
-350
-40
120
-20
0
20
40
60
80
100
FIGURE 33. I BIAS (IA FB-) vs TEMPERATURE VS = ±1.2V
FIGURE 34. I BIAS (IA IN+) vs TEMPERATURE VS = ±2.5V
50
50
n = 100
n = 100
0
0
-50
IA IN+ IBIAS (pA)
IA IN- IBIAS (pA)
120
TEMPERATURE (°C)
TEMPERATURE (°C)
MIN
-100
-150
MEDIAN
-200
MAX
-250
-300
-40
120
-20
0
20
40
60
80
100
MIN
-100
-150
MEDIAN
-200
MAX
-250
120
TEMPERATURE (°C)
FIGURE 35. I BIAS (IA IN-) vs TEMPERATURE VS = ±2.5V
10
-50
-300
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. I BIAS (IA IN+) vs TEMPERATURE VS = ±1.2V
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
50
50
n = 100
n = 100
0
IN+ IBIAS (pA)
IA IN- IBIAS (pA)
-50
MIN
-100
MEDIAN
-150
-250
-40
-20
0
20
40
60
80
-50
MIN
-100
MEDIAN
-150
MAX
-200
MAX
-200
100
-250
-40
120
-20
0
TEMPERATURE (°C)
n = 100
10
120
n = 100
-10
-10
-30
-50
IN+ IBIAS (pA)
IN- IBIAS (pA)
100
40
30
MIN
-70
-90
MEDIAN
-110
MAX
-20
0
20
40
60
80
-60
MIN
-110
-160
MEDIAN
-210
MAX
-260
-130
-150
-40
20
40
60
80
TEMPERATURE (°C)
FIGURE 38. I BIAS(IN+) vs TEMPERATURE VS = ±2.5V
FIGURE 37. I BIAS (IA IN-) vs TEMPERATURE VS = ±1.2V
100
-310
-40
120
-20
0
TEMPERATURE (°C)
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 40. I BIAS(IN+) vs TEMPERATURE VS = ±1.2V
FIGURE 39. I BIAS(IN-) vs TEMPERATURE VS = ±2.5V
40
40.0
MAX
n = 100
0.0
-110
IA IOS (pA)
MIN
-60
MEDIAN
MAX
-160
n = 100
20.0
-10
IN- IBIAS (pA)
OU
0
MIN
-20.0
-40.0
MEDIAN
-60.0
-80.0
-210
-100.0
-260
-310
-40
-120.0
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 41. I BIAS(IN-) vs TEMPERATURE VS = ±1.2V
11
-140.0
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 42. IA INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±2.5V
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
100
50
n = 100
n = 100
40
20
0
10
IOS (pA)
IA IOS (pA)
30
MAX
0
-10
-50
MEDIAN
-100
-20
-30
MEDIAN
-150
MIN
MIN
-40
-50
-40
MAX
50
-20
0
20
40
60
80
100
-200
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 43. IA INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±1.2V
800
n = 100
20
600
0
400
IA VOS (µV)
IOS (pA)
-20
-40
-60
-80
-100
0
20
40
60
80
n = 100
MIN
200
0
-200
MEDIAN
-600
MIN
-20
100
-800
-40
120
MAX
-20
0
TEMPERATURE (°C)
FIGURE 45. INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±1.2V
800
500
400
MIN
VOS (µV)
IA VOS (µV)
120
MIN
200
200
0
MEDIAN
100
0
-100
-200
-400
MEDIAN
-300
-600
-800
-40
100
n = 100
300
400
-200
20
40
60
80
TEMPERATURE (°C)
FIGURE 46. IA INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±2.5V
n = 100
600
120
-400
MEDIAN
-120
-1400
-40
100
FIGURE 44. INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±2.5V
40
MAX
20
40
60
80
TEMPERATURE (°C)
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 47. IA INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±1.2V
12
MAX
-400
MAX
-500
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 48. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±2.5V
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
500
145
n = 100
400
n = 100
135
MIN
300
IA CMRR (dB)
VOS (µV)
MIN
125
200
100
0
-100
MEDIAN
-200
115
MEDIAN
105
95
-300
85
MAX
-400
-500
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
75
-40
120
0
20
120
n = 100
135
IA PSRR (dB)
CMRR (dB)
100
145
MIN
120
MEDIAN
100
80
-40
80
155
n = 100
MIN
125
115
MEDIAN
105
95
MAX
90
60
FIGURE 50. IA CMRR vs TEMPERATURE VCM = +2.5V TO
-2.5V
140
110
40
TEMPERATURE (°C)
FIGURE 49. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±1.2V
130
MAX
-20
MAX
85
-20
0
20
40
60
80
100
75
-40
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 51. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V
FIGURE 52. IA PSRR vs TEMPERATURE VS = ±2.5V
4.910
155
n = 100
n = 100
4.900
145
MIN
MIN
IA VOUT (V)
PSRR (dB)
135
4.890
125
115
MEDIAN
105
95
4.870
MEDIAN
4.860
MAX
MAX
4.850
85
75
-40
4.880
-20
0
20
40
60
80
TEMPERATURE (°C)
100
FIGURE 53. PSRR vs TEMPERATURE VS = ±2.5V
13
120
4.840
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 54. IA VOUT HIGH vs TEMPERATURE RL = 1k.
VS = ±2.5V
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
4.9980
170
n = 100
4.9975
MIN
150
4.9970
IA VOUT (mV)
IA VOUT (V)
n = 100
160
4.9965
MEDIAN
4.9960
130
MEDIAN
120
110
MAX
4.9955
MIN
140
MAX
100
4.9950
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
90
-40
120
FIGURE 55. IA VOUT HIGH vs TEMPERATURE RL = 100k.
VS = ±2.5V
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 56. IA VOUT LOW vs TEMPERATURE RL = 1k.
VS = ±2.5V
6.5
4.910
n = 100
n = 100
6.0
4.900
5.5
4.890
MIN
5.0
VOUT (V)
IA VOUT (mV)
MIN
MEDIAN
4.5
4.870
MAX
4.0
3.5
-40
4.880
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
4.850
-40
0
20
40
60
80
100
120
FIGURE 58. VOUT HIGH vs TEMPERATURE RL = 1k.
VS = ±2.5V
170
n = 100
n = 100
4.9984
4.9982
160
MIN
VOUT (mV)
4.9978
4.9976
MEDIAN
4.9972
140
130
MEDIAN
120
MAX
110
MAX
4.9970
MIN
150
4.9980
VOUT (V)
-20
TEMPERATURE (°C)
4.9986
100
4.9968
4.9966
-40
MAX
4.860
FIGURE 57. IA VOUT LOW vs TEMPERATURE RL = 100k.
VS = ±2.5V
4.9974
MEDIAN
-20
0
20
40
60
80
TEMPERATURE (°C)
100
FIGURE 59. VOUT HIGH vs TEMPERATURE RL = 100k.
VS = ±2.5V
14
120
90
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 60. VOUT LOW vs TEMPERATURE RL = 1k. VS = ±2.5V
FN6345.0
December 13, 2006
ISL28274, ISL28474
Typical Performance Curves (Continued)
4.4
n = 100
4.2
MIN
VOUT (mV)
4.0
3.8
3.6
MEDIAN
3.4
MAX
3.2
3.0
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 61. VOUT LOW vs TEMPERATURE RL = 100k. VS = ±2.5V
Pin Descriptions
ISL28274
ISL28474
(16 LD QSOP) (24 LD QSOP)
1, 9, 13, 14
PIN NAME
EQUIVALENT
CIRCUIT
NC
DESCRIPTION
No internal connection
11, 14
2
IA OUT
IA OUT_1/2
Circuit 3
Instrumentation Amplifier output
1, 24
IA FB+
IA FB+_1/2
Circuit 1
Instrumentation Amplifier Feedback from non-inverting output
2, 23
IA FBIA FB-_1/2
Circuit 1
Instrumentation Amplifier Feedback from inverting output
3, 22
IA INIA IN-_1/2
Circuit 1
Instrumentation Amplifier inverting input
4, 21
IA IN+
IA IN+_1/2
Circuit 1
Instrumentation Amplifier non-inverting input
5, 20
IA EN
IA EN_1/2
Circuit 2
6, 19
Instrumentation Amplifier enable pin internal pull-down; Logic “1” selects
the disabled state; Logic “0” selects the enabled state.
18
V-
Circuit 4
Negative power supply
Circuit 2
8, 17
EN
EN 1/2
Amplifier enable pin with internal pull-down; Logic “1” selects the
disabled state; Logic “0” selects the enabled state.
IN+
IN+ 1/2
Circuit 1
Amplifier non-inverting input
9, 16
ININ- 1/2
Circuit 1
Amplifier inverting input
10, 15
OUT
OUT 1/2
Circuit 3
Amplifier output
12, 13
7
V+
Circuit 4
Positive power supply
3
4
5
6
7
8
10
11
12
15
16
IA = Instrumentation Amplifier
V+
V+
IN-
IN+
V+
LOGIC
PIN
V-
VCIRCUIT 2
15
CAPACITIVELY
COUPLED
ESD CLAMP
OUT
V-
CIRCUIT 1
V+
VCIRCUIT 3
CIRCUIT 4
FN6345.0
December 13, 2006
ISL28274, ISL28474
Description of Operation and Application
Information
Product Description
The ISL28274 and ISL28474 provide both a micropower
instrumentation amplifier (Amp A) and a low power precision
amplifier (Amp B) in the same package. The amplifiers
deliver rail-to-rail input amplification and rail-to-rail output
swing on a single 2.4V to 5V supply. They also deliver
excellent DC and AC specifications while consuming only
60µA typical supply current per amplifier. Because the
instrumentation amplifiers provide an independent pair of
feedback terminals to set the gain and to adjust the output
level, the in-amp achieve high common-mode rejection ratio
regardless of the tolerance of the gain setting resistors. The
instrumentation amplifier is internally compensated for a
minimum closed loop gain of 100 or greater. An EN pin is
used to reduce power consumption, typically 4µA for the
ISL28274 and 8µA for the ISL28474, while both amplifiers
are disabled. The user has independent control of each
amplifier via separate EN pins.
Input Protection
The input and feedback terminals have internal ESD
protection diodes to both positive and negative supply rails,
limiting the input voltage to within one diode drop beyond the
supply rails. If overdriving the inputs is necessary, the
external input current must never exceed 5mA. External
series resistor may be used as a protection to limit excessive
external voltage and current from damaging the inputs.
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of both amplifiers “A” and
amp “B” are single differential pair P-MOSFET devices aided
by an Input Range Enhancement Circuit to increase the
headroom of operation of the common-mode input voltage.
The feedback terminals (FB+ and FB-) of amplifier “A” also
have a similar topology. As a result, the input common-mode
voltage range is rail-to-rail. These amps are able to handle
input voltages that are at or slightly beyond the supply and
ground making them well suited for single 5V or 3.3V low
voltage supply systems. There is no need then to move the
common-mode input to achieve symmetrical input voltage.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drives the output
VOUT to within a few mV of the supply rails. At a 100kΩ
load, the PMOS sources current and pulls the output up to
4mV below the positive supply, while the NMOS sinks
current and pulls the output down to 3mV above the negative
supply, or ground in the case of a single supply operation.
The current sinking and sourcing capability of the ISL28274
are internally limited to 31mA.
Gain Setting of Instrumentation amp “A”
of the ISL28274 in-amp is to maintain the differential voltage
across FB+ and FB- equal to IN+ and IN-; (FB+ - FB-) =
(IN+ - IN-). Consequently, the transfer function can be
derived. The gain is set by two external resistors, the
feedback resistor RF, and the gain resistor RG.
2.4V to 5V
16
VIN/2
6 IN+
5 IN-
7
VS+
+
3 FB+
4 FB-
Amp “A”
EN
-
VIN/2
VCM
EN_BAR
2
ISL28274
VOUT
+
-
VS8
RG
RF
FIGURE 62. GAIN IS BY EXTERNAL RESISTORS RF AND RG
RF ⎞
⎛
VOUT = ⎜ 1 + --------⎟ VIN
R
⎝
G⎠
In Figure 62, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, the above gain
equation is only true for a positive swing in VIN; negative
input swings will be ignored and the output will be at ground.
Reference Connection
Unlike a three-opamp instrumentation amplifier, a finite
series resistance seen at the REF terminal does not degrade
the high CMRR performance eliminating the need for an
additional external buffer amplifier. Figure 63 uses the FB+
pin to provide a high impedance REF terminal.
2.4V to 5V
16
VIN/2
6 IN+
5 INVIN/2
3 FB+
VCM
4 FB-
2.9V to 5V
EN_BAR
7
VS+
+
ISL28274
EN
Amp “A”
2
VOUT
+
-
VS8
R1
REF
R2
RG
RF
FIGURE 63. GAIN SETTING AND REFERENCE CONNECTION
RF ⎞
RF ⎞
⎛
⎛
VOUT = ⎜ 1 + --------⎟ ( VIN ) + ⎜ 1 + --------⎟ ( VREF )
R
R
⎝
⎝
G⎠
G⎠
VIN, the potential difference across IN+ and IN-, is replicated
(less the input offset voltage) across FB+ and FB-. The goal
16
FN6345.0
December 13, 2006
ISL28274, ISL28474
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
by resistors RF and RG as shown in Figure 63.
The FB+ pin can also be connected to the other end of resistor,
RG. See Figure 64. Keeping the basic concept that the in-amps
maintain constant differential voltage across the input terminals
and feedback terminals (IN+ - IN- = FB+ - FB-), the transfer
function of Figure 64 can be derived.
2.4V to 5V
16
VIN/2
6 IN+
5 INVIN/2
3 FB+
VCM
4 FB-
Using Only the Instrumentation Amplifier
If the application only requires the instrumentation amp, the
user must configure the unused Opamp to prevent it from
oscillating. The unused Opamp will oscillate if the input and
output pins are floating. This will result in higher than
expected supply currents and possible noise injection into
the in-amp. The proper way to prevent this oscillation is to
short the output to the negative input and ground the positive
input (as shown in Figure 65).
-
EN_BAR
+
7
VS+
+
ISL28274
EN
Amp “A”
2
VOUT
FIGURE 65. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
+
Proper Layout Maximizes Performance
-
VS8
RG
amplifiers will power down when EN bar is pulled above 2V,
and will power on when EN bar is pulled below 0.8V.
RF
VREF
FIGURE 64. REFERENCE CONNECTION WITH AN AVAILABLE
VREF
RF ⎞
⎛
VOUT = ⎜ 1 + --------⎟ ( VIN ) + ( VREF )
R
⎝
G⎠
A finite resistance Rs in series with the VREF source, adds
an output offset of VIN*(RS/RG). As the series resistance Rs
approaches zero, the gain equation is simplified to the above
equation for Figure 64. VOUT is simply shifted by an amount
VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the ISL28274, the CMRR is not degraded by
any resistor mismatches. Hence, unlike a three opamp and
especially a two opamp in-amp, the ISL28274 reduce the
cost of external components by allowing the use of 1% or
more tolerance resistors without sacrificing CMRR
performance. The ISL28274 CMRR will be 100dB
regardless of the tolerance of the resistors used.
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in
the circuit board layout. The PC board surface must remain
clean and free of moisture to avoid leakage currents
between adjacent traces. Surface coating of the circuit board
will reduce surface moisture and provide a humidity barrier,
reducing parasitic resistance on the board. When input
leakage current is a concern, the use of guard rings around
the amplifier inputs will further reduce leakage currents.
Figure 66 shows a guard ring example for a unity gain
amplifier that uses the low impedance amplifier output at the
same voltage as the high impedance input to eliminate
surface leakage. The guard ring does not need to be a
specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
components can be mounted to the PC board using Teflon
standoff insulators.
HIGH IMPEDANCE INPUT
IN
V+
1/2 ISL28274
1/4 ISL28474
FIGURE 66. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
Disable/Power-Down
The ISL28274 Amplifiers “A” and “B” can be powered down
reducing the supply current to typically 4µA. When disabled,
the output is in a high impedance state. The active low EN
bar pin has an internal pull down and hence can be left
floating and the in-amp and Opamp enabled by default.
When the EN bar is connected to an external logic, the
17
Current Limiting
The ISL28274 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
FN6345.0
December 13, 2006
ISL28274, ISL28474
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated as shown in
Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------RL
(EQ. 2)
where:
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
18
FN6345.0
December 13, 2006
ISL28274, ISL28474
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
E
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1
I.D. MARK
E1
1
(N/2)
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
-
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
Rev. E 3/01
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
L1
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
c
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
SEE DETAIL "X"
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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19
FN6345.0
December 13, 2006