EVB-USB3320 Evaluation Board Schematic - EVB-USB3320 Evaluation Board Schematic

5
4
3
2
1
Selectable Frequency 32-pin QFN Evaluation Board
Transceiver R24
USB3320
ZERO
C3
2.2uF
C19
0.1uF
1.0uF
1.0uF
VDDIO
C23
22pF
USB83340
DNP
This portion of the schematic
shows components needed for
PHY to operate in a HS peripheral
application.
D
1
RESETB
2
VDD1p8
R35
10.0
12.0 MHz
000
52.0 MHz
111
C22
22pF
REFSEL1
50V
24.0 MHz
101
19.2 MHz
011
27.0 MHz
001
38.4 MHz
100
13.0 MHz
D
REFSEL0
R26
ZERO
R28
ZERO
DNP
DNP
R30
ZERO
1/16W
VDDIO
TP2
+3.3V
C21
0.1uF
10V
TEST_POINT
TP3
26
25
27
29
28
TEST_POINT
8.06K
7
VDDIO
8
RESET
U8
4
XO
REFCLK
DP
REFSEL0
CPEN33
R10
DNP
1.0K 1W
R23
21
20
10K 1/10W
+ C1
2.2uF
50V
C
P1
19
18
17
C3
2.2uF
6.3V
C11
0.1uF
10V
3
R34
ZERO
1/4W
81
87
38
VIO
VIO
VIO
DNP
P2
1
2
3
4
5
VBUS
DM
DP
ID
USBGND
VBUS
DD+
ID
GND
SHIELD1
SHIELD2
SHIELD3
SHIELD4
VBUS
DD+
ID
GND
6
7
8
9
SHLD1
SHLD2
SHLD3
SHLD4
CON-USB_MINIAB
Micro-AB
74LVC1G04
8
16
57
69
VDD
VDD
VDD
VDD
1
2
3
4
5
6
7
8
9
VBUS
DM
DP
ID
USBGND
RESETB
1
+3.3V
RESETB
DATA4
9
2
STP
DM
23
22
33
CLKOUT
DATA3
DATA5
90
17
5
Clk
Reset
VDD33
C13
0.1uF
10V
For host/OTG applications, R10 1K resistor should be installed.
For peripheral applications, R23 10K resistor should be installed.
24
FLAG
6
DATA2
16
DIR
VBAT
SPK_R
5
DATA1
SPK_L
DIR
VBUS
15
70
4
ID
USB33XX QFN32
DATA0
14
NXT
NXT
13
71
3
12
NXT
STP
1/16W
+5.0V
RBIAS
REFSEL2
2
96
STP
CLKOUT
DATA7
1/16 W
NC
1
27
REFSEL1
R33
VDD18_1
DNP
VDD18_2
R12
ZERO
DIR
VDDIO
45
SPKR_MIC
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
30
32
U1
31
R2
15
SPKR_L
REFSEL0
1
26
3
29
5
6
56
7
58
11
61
12
63
50
78
XO
26.0 MHz
010
REFSEL2
3
C4
0.1uF
10V
11
CPEN
R29
ZERO
110
DNP
GND
VDDIO
DATA6
C
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
10
VBUS_FAULT_N
Reserved1
Reserved2
Reserved3
Reserved4
Reserved5
Reserved6
Reserved7
Reserved8
Reserved9
Reserved10
Reserved11
Reserved12
Reserved13
Reserved14
Reserved15
Reserved16
Reserved17
Reserved18
Reserved19
Reserved20
Reserved21
Reserved22
Reserved23
Reserved24
Reserved25
Reserved26
Reserved27
Reserved28
Reserved29
Reserved30
Reserved31
Reserved32
Reserved33
Reserved34
R27
ZERO
4
GND
26 MHz
R17
1M
1/10W
R24
ZERO
J1
31
82
33
83
34
85
36
86
R25
ZERO
50V
Y1
REFCLK
T&MT Connector
60
75
66
72
74
22
19
20
18
67
25
23
98
48
55
97
59
10
79
37
88
41
91
42
93
44
94
99
30
89
64
77
14
40
REFSEL[2:0] REFCLK
Source
Schematic shows 26.0 MHz Configuration.
REFCLK[2:0] = 110
C16
0.1uF
10V
VDDIO
ULPI Testpoints
REFSEL1
R32
28
ZERO 1/4W
52
B
100
49
VBUS_out
System_Clock
PSU_SHD_N
DC_PSNT_N
J2
A7
A8
1.8V Regulator
+3.3V
VDD1p8
U9
1
2
C5
1.0uF
10V
3
IN
VOUT
R14
10.0K
1/16W
TEST_POINT
C7
10uF
6.3V
4
TPS76318DBVT
SPKR_L
C18
10uF
6.3V
R13
R15
10.0K
R11
10.0K
1/16W
1/16W
SPKR_RM
C17
10uF
DNP
Oscillator Support
VDD1p8
R1
100K
1/10W
REFCLK
C9
0.1uF
10V
DNP
EN
VCC
GND
OUT
4
DNP
2
C10
3
26.0 MHZ
0.1uF
10V
1
2
3
Vin
5
+5.0V
GND
/EN
FB
4
R18
78.7K
1/16W
2
R8
10.0K
1/16W
4
R4
CPEN
2
3
4
C12
10uF
6.3V
R9
169K
1/16W
DNP
1
C2
0.1uF
10V
5
ONA FAULTA
INA
IN
INB
OUTA
GND
OUTB
ONB FAULTB
10
9
8
7
STP
R13
ZERO
U2
C8
0.1uF
10V
U6
DATA1
DATA0
VDDIO
Vout
TPS77001DBVT
R7
27K
1/16W
5
1
C14
1.0uF
10V
+3.3V
DNP
CK2+
CK2--
TEK_6960_CONN_ALT
A0/C2:0
A0/C2:1
A0/C2:2
A0/C2:3
A0/C2:4
A0/C2:5
A0/C2:6
A0/C2:7
A1/C3:0
A1/C3:1
A1/C3:2
A1/C3:3
A1/C3:4
A1/C3:5
A1/C3:6
A1/C3:7
D1/A3:7
D1/A3:6
D1/A3:5
D1/A3:4
D1/A3:3
D1/A3:2
D1/A3:1
D1/A3:0
D0/A2:7
D0/A2:6
D0/A2:5
D0/A2:4
D0/A2:3
D0/A2:2
D0/A2:1
D0/A2:0
DNP
B
C20
150uF
10V
+
6
A
DNP
MAX1823B
3930 East Ray Road
Suite 200
Phoenix, Arizona 85044
480-759-0200
74LVC1G04
R12 = 78.7K
R12 = 107K
R12 = 178K
R12 = 243K
R12 = 287K
VDDIO = 1.8 V
VDDIO = 2.0 V
VDDIO = 2.5 V
VDDIO = 3.0 V
VDDIO = 3.3 V
Title
For host applications 150 uF to to ground is required on
VBUS to comply with the USB2.0 specification.
PCB7163 Evaluation Board
Size
C
Date:
5
CK1+
CK1--
ZERO
1
3
A
+5.0V
DATA3
DATA2
VBUS_FAULT_N
U10
VDDIO
DATA5
DATA4
VBUS Switch
R16
10.0K
1/16W
DNP
VDDIO Regulator
X1
DATA7
DATA6
Peripheral
6.3V
ZERO
R6
10.0K
1/16W
A1
A2
B2
B3
A4
A5
B5
B6
B8
B9
A10
A11
B11
B12
A13
A14
B14
B15
A16
A17
B17
B18
A19
A20
A22
A23
B23
B24
A25
A26
B26
B27
DIR
NXT
Zero Ohm Host / OTG
TEST_POINT
AMP_UTMI+_ULPI
R5
10.0K
1/16W
CPEN
VBUS_FAULT_N
RESETB
+3.3V
TP5
R3
B21
B20
TP4
5
GND
ENBLE NC
CLKOUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
TEST_POINT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TP1
+5.0V
2
4
9
13
21
24
27
32
35
39
43
46
51
53
54
62
65
68
73
76
80
84
92
95
B1
A27
B25
A12
A24
B22
A9
A21
B19
REFSEL2
VBUS_in
B4
B7
B10
B13
A15
A3
B16
A18
A6
47
4
3
2
Document Number
SCH-7163AZ-A00
Rev
A
Tuesday, February 02, 2010
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