INTERSIL ISL32496E

±60V Fault Protected, 5V, RS-485/RS-422 Transceivers
with ±25V CMR and ESD Protection
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E,
ISL32498E
The ISL32490E, ISL32492E, ISL32493E, ISL32495E,
Features
ISL32496E, ISL32498E are fault protected, 5V powered,
differential transceivers that exceed the RS-485 and RS-422
standards for balanced communication. The RS-485 transceiver
pins (driver outputs and receiver inputs) are fault protected up to
±60V and are protected against ±16.5kV ESD strikes without
latch-up. Additionally, the extended common mode range allows
these transceivers to operate in environments with common
mode voltages up to ±25V (>2x the RS-485 requirement),
making this fault protected RS-485 family one of the most
robust on the market.
Transmitters (Tx) deliver an exceptional 2.5V (typical)
differential output voltage into the RS-485 specified 54Ω load.
This yields better noise immunity than standard RS-485 ICs or
allows up to six 120Ω terminations in star network topologies.
• Fault Protected RS-485 Bus Pins . . . . . . . . . . . . . . Up to ±60V
• Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±25V
More than Twice the Range Required for RS-485
• ±16.5kV HBM ESD Protection on RS-485 Bus Pins
• 1/4 Unit Load for Up to 128 Devices on the Bus
• High Transient Overvoltage Tolerance . . . . . . . . . . . . . . . ±80V
• Full Fail-Safe (Open, Short, Terminated) RS-485 Receivers
• High Rx IOL for Opto-Couplers in Isolated Designs
• Hot Plug Circuitry; Tx and Rx Outputs Remain Three-State
During Power-Up/Power-Down
• Choice of RS-485 Data Rates. . . . . . . . . 250kbps to 15Mbps
Receiver (Rx) inputs feature a “Full Fail-Safe” design that
ensures a logic high Rx output if Rx inputs are floating, shorted,
or on a terminated but undriven (idle) bus. Rx outputs have high
drive levels; typically, 15mA @ VOL = 1V (for opto-coupled,
isolated applications).
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.3mA
Half duplex (Rx inputs and Tx outputs multiplexed together)
and full duplex pinouts are available. See Table 1 on page 2 for
key features and configurations by device number.
• High Node Count RS-485 Systems
For fault protected or wide common mode range RS-485
transceivers with cable invert (polarity reversal) pins, please
see the ISL32483E data sheet.
• Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . . 10µA
Applications
• Utility Meters/Automated Meter Reading Systems
• PROFIBUS™ and RS-485 Based Field Bus Networks, and
Factory Automation
• Security Camera Networks
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
30
VID = ±1V
B
A
20
VOLTAGE (V)
25
COMMON MODE RANGE
25
15
10
5
RO
0
0
-7
-12
-20
-25
-5
STANDARD RS-485
TRANSCEIVER
TIME (20ns/DIV)
FIGURE 1. EXCEPTIONAL Rx OPERATES AT >15Mbps EVEN WITH
A ±25V COMMON MODE VOLTAGE
March 16, 2012
FN7786.2
12
1
CLOSEST
COMPETITOR
ISL3249xE
FIGURE 2. ISL3249xE DELIVERS SUPERIOR COMMON MODE
RANGE vs STANDARD RS-485 DEVICES
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
TABLE 1. SUMMARY OF FEATURES
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
SLEW-RATE
LIMITED?
EN PINS?
HOT
PLUG?
QUIESCENT ICC
(mA)
LOW POWER
SHDN?
PIN
COUNT
ISL32490E
Full
0.25
Yes
Yes
Yes
2.3
Yes
10, 14
ISL32492E
Half
0.25
Yes
Yes
Yes
2.3
Yes
8
ISL32493E
Full
1
Yes
Yes
Yes
2.3
Yes
10, 14
ISL32495E
Half
1
Yes
Yes
Yes
2.3
Yes
8
ISL32496E
Full
15
No
Yes
Yes
2.3
Yes
10, 14
ISL32498E
Half
15
No
Yes
Yes
2.3
Yes
8
PART NUMBER
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL32490EIBZ
ISL32490 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32490EIUZ
2490E
-40 to +85
10 Ld MSOP
M10.118
ISL32492EIBZ
32492 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32492EIUZ
2492E
-40 to +85
8 Ld MSOP
M8.118
ISL32493EIBZ
ISL32493 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32493EIUZ
2493E
-40 to +85
10 Ld MSOP
M10.118
ISL32495EIBZ
32495 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32495EIUZ
2495E
-40 to +85
8 Ld MSOP
M8.118
ISL32496EIBZ
ISL32496 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32496EIUZ
2496E
-40 to +85
10 Ld MSOP
M10.118
ISL32498EIBZ
32498 EIBZ
-40 to +85
8 Ld SOIC
M8.15
ISL32498EIUZ
2498E
-40 to +85
8 Ld MSOP
M8.118
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information pages for ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E.
For more information on MSL please see techbrief TB363.
2
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Pin Configurations
RO
RE
1
8
R
2
DE
3
DI
4
D
10 VCC
NC 1
RE 2
9 A
RO 2
8 B
RE 3
7 Z
DE 4
6 Y
DI 5
RO 1
VCC
7
ISL32490E, ISL32493E, ISL32496E
(14 LD SOIC)
TOP VIEW
ISL32490E, ISL32493E, ISL32496E
(10 LD MSOP)
TOP VIEW
ISL32492E, ISL32495E, ISL32498E
(8 LD MSOP, 8 LD SOIC)
TOP VIEW
B/Z
6
A/Y
DE 3
5
GND
DI 4
R
D
GND 5
14 VCC
13 VCC
R
12 A
11 B
D
10 Z
GND 6
9 Y
GND 7
8 NC
NOTE: Evaluate creepage and clearance requirements at your maximum fault voltage before using small pitch packages (e.g., MSOP).
Truth Tables
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
RE
DE
DI
Z
Y
X
1
1
0
1
X
1
0
1
0
0
0
X
High-Z
High-Z
1
0
X
High-Z
(see Note)
High-Z
(see Note)
NOTE: Low Power Shutdown Mode (see Note 11 on page 9).
OUTPUT
RE
DE
Half Duplex
DE
Full Duplex
A-B
RO
0
0
X
≥ -0.01V
1
0
0
X
≤ -0.2V
0
0
0
X
Inputs
Open/Shorted
1
1
0
0
X
High-Z
(see Note)
1
1
1
X
High-Z
NOTE: Low Power Shutdown Mode (see Note 11 on page 9).
Pin Descriptions
PIN
NAME
8 LD
PIN #
10 LD
PIN #
14 LD
PIN #
RO
1
1
2
Receiver output. If A-B ≥ -10mV, RO is high; if A-B ≤ -200mV, RO is low; RO = High if A and B are
unconnected (floating), shorted together, or connected to an undriven, terminated bus.
RE
2
2
3
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Internally
pulled low.
DE
3
3
4
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high
impedance when DE is low. Internally pulled high.
DI
4
4
5
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y
high and output Z low.
GND
5
5
6, 7
A/Y
6
-
-
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level, non-inverting receiver input and
non-inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
7
-
-
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level, inverting receiver input and inverting
driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A
-
9
12
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level, non-inverting receiver input.
B
-
8
11
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level, inverting receiver input.
3
FUNCTION
Ground connection.
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Pin Descriptions (Continued)
PIN
NAME
8 LD
PIN #
10 LD
PIN #
14 LD
PIN #
Y
-
6
9
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level, non-inverting driver output.
Z
-
7
10
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level, inverting driver output.
VCC
8
10
NC
-
-
FUNCTION
13, 14 System power supply input (4.5V to 5.5V).
1, 8
No internal connection.
Typical Operating Circuits
+5V
+5V
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
B/Z
7
3 DE
A/Y
6
4 DI
DI 4
D
2 RE
RT
RT
7
B/Z
DE 3
6
A/Y
RE 2
RO 1
R
D
GND
GND
5
5
ISL32492E, ISL32495E, ISL32498E HALF DUPLEX EXAMPLE
+5V
+5V
+
13, 14
VCC
2 RO
R
A 12
0.1µF
0.1µF
RT
+
13, 14
VCC
9 Y
B 11
10 Z
D
3 RE
DE 4
4 DE
5 DI
DI 5
Z 10
Y 9
D
GND
6, 7
RT
RE 3
11 B
R
12 A
RO 2
GND
6, 7
ISL32490E, ISL32493E, ISL32496E FULL DUPLEX EXAMPLE (SOIC PIN NUMBERS SHOWN)
4
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Absolute Maximum Ratings
Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z
(Transient Pulse Through 100Ω, (Note 15 on page 9) . . . . . . . . . . . ±80V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . see “ESD PERFORMANCE” on page 6
Latch-up (Tested per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . +125°C
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
8 Ld MSOP Package (Notes 4, 5) . . . . . . . .
140
40
8 Ld SOIC Package (Notes 4, 5) . . . . . . . . .
108
47
10 Ld MSOP Package (Note 4, 5). . . . . . . .
135
50
14 Ld SOIC Package (Notes 4, 5) . . . . . . . .
88
39
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common Mode Voltage Range. . . . . . . . . . . . . . . . . . -25V to +25V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
Full
-
-
VCC
V
RL = 100Ω (RS-422)
Full
2.4
3.2
-
V
RL = 54Ω (RS-485)
Full
1.5
2.5
VCC
V
RL = 54Ω (PROFIBUS, VCC ≥ 5V)
Full
2.0
2.5
RL = 21Ω (Six 120Ω terminations for Star
Configurations, VCC ≥ 4.75V)
Full
0.8
1.3
-
V
Full
-
-
0.2
V
RL = 60Ω, -7V ≤ VCM ≤ 12V
Full
1.5
2.1
VCC
V
RL = 60Ω, -25V ≤ VCM ≤ 25V (VCC ≥ 4.75V)
Full
1.7
2.3
RL = 21Ω, -15V ≤ VCM ≤ 15V (VCC ≥ 4.75V)
Full
0.8
1.1
-
V
RL = 54Ω or 100Ω
Full
-1
-
3
V
RL = 60Ω or 100Ω, -20V ≤ VCM ≤ 20V
Full
-2.5
-
5
V
PARAMETER
TEST CONDITIONS
DC CHARACTERISTICS
VOD1
Driver Differential VOUT
(No load)
VOD2
Driver Differential VOUT
(Loaded, Figure 3A)
ΔVOD
Change in Magnitude of Driver RL = 54Ω or 100Ω (Figure 3A)
Differential VOUT for
Complementary Output
States
VOD3
Driver Differential VOUT with
Common Mode Load
(Figure 3B)
VOC
Driver Common-Mode VOUT
(Figure 3)
ΔVOC
Change in Magnitude of Driver RL = 54Ω or 100Ω (Figure 3A)
Common-Mode VOUT for
Complementary Output
States
Full
-
-
0.2
V
IOSD
Driver Short-Circuit Current
DE = VCC, -25V ≤ VO ≤ 25V (Note 8)
Full
-250
-
250
mA
IOSD1
At First Fold-back, 22V ≤ VO ≤ -22V
Full
-83
83
mA
IOSD2
At Second Fold-back,
35V ≤ VO ≤ -35V
Full
-13
13
mA
DE, DI, RE
Full
2.5
-
V
VIH
Logic Input High Voltage
5
-
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
VIL
Logic Input Low Voltage
DE, DI, RE
Full
-
-
0.8
V
IIN1
Logic Input Current
DI
Full
-1
-
1
µA
DE, RE
Full
-15
6
15
µA
DE = 0V,
VIN = 12V
VCC = 0V or 5.5V
VIN = -7V
Full
-
110
250
µA
Full
-200
-75
-
µA
VIN = ±25V
Full
-800
±240
800
µA
VIN = ±60V (Note 16)
Full
-6
±0.5
6
mA
Full
-
90
125
µA
VIN = -7V
Full
-100
-70
-
µA
VIN = ±25V
Full
-500
±200
500
µA
VIN = ±60V (Note 16)
Full
-3
±0.4
3
mA
Full
-
20
200
µA
Full
-100
-5
-
µA
VIN = ±25V
Full
-500
±40
500
µA
VIN = ±60V (Note 16)
Full
-3
±0.1
3
mA
IIN2
IIN3
IOZD
Input/Output Current (A/Y,
B/Z)
Input Current (A, B)
(Full Duplex Versions Only)
VCC = 0V or 5.5V VIN = 12V
VIN = 12V
Output Leakage Current (Y, Z) RE = 0V,
(Full Duplex Versions Only)
DE = 0V,
V = -7V
VCC = 0V or 5.5V IN
V TH
Receiver Differential
Threshold Voltage
-25V ≤ VCM ≤ 25V
Full
-200
-100
-10
mV
ΔV TH
Receiver Input Hysteresis
-25V ≤ VCM ≤ 25V
25
-
25
-
mV
VOH
Receiver Output High Voltage
IO = -2mA, VID = -10mV
Full
VCC - 0.5
4.75
-
V
IO = -8mA, VID = -10mV
Full
2.8
4.2
-
V
VOL
Receiver Output Low Voltage
IO = 6mA, VID = -200mV
Full
-
0.27
0.4
V
IOL
Receiver Output Low Current
VO = 1V, VID = -200mV
Full
15
22
-
mA
IOZR
Three-State (High Impedance) 0V ≤ VO ≤ VCC
Receiver Output Current
Full
-1
0.01
1
µA
IOSR
Receiver Short-Circuit Current 0V ≤ VO ≤ VCC
Full
±12
-
±110
mA
SUPPLY CURRENT
ICC
ISHDN
No-Load Supply Current
(Note 7)
DE = VCC, RE = 0V or VCC, DI = 0V or VCC
Full
-
2.3
4.5
mA
Shutdown Supply Current
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
10
50
µA
RS-485 Pins (A, Y, B, Z, A/Y,
B/Z)
1/2 Duplex
Human Body
Model, From Bus
Full Duplex
Pins to GND
25
-
±16.5
-
kV
25
-
±15
-
kV
All Pins
Human Body Model, per JEDEC
25
-
±8
-
kV
Machine Model
25
-
±700
-
V
No CM Load
Full
-
320
450
ns
-25V ≤ VCM ≤ 25V
Full
-
-
1000
ns
No CM Load
Full
-
6
30
ns
-25V ≤ VCM ≤ 25V
Full
-
-
50
ns
ESD PERFORMANCE
DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32490E, ISL32492E)
tPLH, tPHL
tSKEW
Driver Differential Output
Delay
RD = 54Ω,
CD = 50pF
(Figure 4)
Driver Differential Output
Skew
RD = 54Ω,
CD = 50pF
(Figure 4)
6
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
tR, tF
PARAMETER
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
No CM Load
Full
400
650
1200
ns
-25V ≤ VCM ≤ 25V
Full
300
-
1200
ns
TEST CONDITIONS
Driver Differential Rise or Fall RD = 54Ω,
Time
CD = 50pF
(Figure 4)
Maximum Data Rate
CD = 820pF (Figure 6)
Full
0.25
1.5
-
Mbps
tZH
Driver Enable to Output High
SW = GND (Figure 5), (Note 9)
Full
-
-
1200
ns
tZL
Driver Enable to Output Low
SW = VCC (Figure 5), (Note 9)
Full
-
-
1200
ns
tLZ
Driver Disable from Output
Low
SW = VCC (Figure 5)
Full
-
-
120
ns
tHZ
Driver Disable from Output
High
SW = GND (Figure 5)
Full
-
-
120
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
tZH(SHDN)
Driver Enable from Shutdown
to Output High
SW = GND (Figure 5), (Notes 11, 12)
Full
-
-
2500
ns
tZL(SHDN)
Driver Enable from Shutdown
to Output Low
SW = VCC (Figure 5), (Notes 11, 12)
Full
-
-
2500
ns
No CM Load
Full
-
70
125
ns
-25V ≤ VCM ≤ 25V
Full
-
-
350
ns
No CM Load
Full
-
4.5
15
ns
-25V ≤ VCM ≤ 25V
Full
-
-
25
ns
No CM Load
Full
70
170
300
ns
-25V ≤ VCM ≤ 25V
Full
70
-
400
ns
fMAX
tSHDN
DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32493E, ISL32495E)
tPLH, tPHL
tSKEW
tR, tF
Driver Differential Output
Delay
RD = 54Ω,
CD = 50pF
(Figure 4)
Driver Differential Output
Skew
RD = 54Ω,
CD = 50pF
(Figure 4)
Driver Differential Rise or Fall RD = 54Ω,
Time
CD = 50pF
(Figure 4)
Maximum Data Rate
CD = 820pF (Figure 6)
Full
1
4
-
Mbps
tZH
Driver Enable to Output High
SW = GND (Figure 5), (Note 9)
Full
-
-
350
ns
tZL
Driver Enable to Output Low
SW = VCC (Figure 5), (Note 9)
Full
-
-
300
ns
tLZ
Driver Disable from Output
Low
SW = VCC (Figure 5)
Full
-
-
120
ns
tHZ
Driver Disable from Output
High
SW = GND (Figure 5)
Full
-
-
120
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
tZH(SHDN)
Driver Enable from Shutdown
to Output High
SW = GND (Figure 5), (Notes 11, 12)
Full
-
-
2000
ns
tZL(SHDN)
Driver Enable from Shutdown
to Output Low
SW = VCC (Figure 5), (Notes 11, 12)
Full
-
-
2000
ns
No CM Load
Full
-
21
45
ns
-25V ≤ VCM ≤ 25V
Full
-
-
80
ns
No CM Load
Full
-
3
6
ns
-25V ≤ VCM ≤ 25V
Full
-
-
7
ns
No CM Load
Full
5
17
30
ns
-25V ≤ VCM ≤ 25V
Full
5
-
30
ns
fMAX
tSHDN
DRIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL32496E, ISL32498E)
tPLH, tPHL
tSKEW
tR, tF
Driver Differential Output
Delay
RD = 54Ω,
CD = 50pF
(Figure 4)
Driver Differential Output
Skew
RD = 54Ω,
CD = 50pF
(Figure 4)
Driver Differential Rise or Fall RD = 54Ω,
Time
CD = 50pF
(Figure 4)
7
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
fMAX
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
Maximum Data Rate
CD = 470pF (Figure 6)
Full
15
25
-
Mbps
tZH
Driver Enable to Output High
SW = GND (Figure 5), (Note 9)
Full
-
-
100
ns
tZL
Driver Enable to Output Low
SW = VCC (Figure 5), (Note 9)
Full
-
-
100
ns
tLZ
Driver Disable from Output
Low
SW = VCC (Figure 5)
Full
-
-
120
ns
tHZ
Driver Disable from Output
High
SW = GND (Figure 5)
Full
-
-
120
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
tZH(SHDN)
Driver Enable from Shutdown
to Output High
SW = GND (Figure 5), (Notes 11, 12)
Full
-
-
2000
ns
tZL(SHDN)
Driver Enable from Shutdown
to Output Low
SW = VCC (Figure 5), (Notes 11, 12)
Full
-
-
2000
ns
-25V ≤ VCM ≤ 25V (Figure 7)
Full
0.25
5
-
Mbps
Receiver Input to Output Delay -25V ≤ VCM ≤ 25V (Figure 7)
Full
-
200
280
ns
Receiver Skew |tPLH - tPHL |
(Figure 7)
Full
-
4
10
ns
tZL
Receiver Enable to Output
Low
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 10)
Full
-
-
50
ns
tZH
Receiver Enable to Output
High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 10)
Full
-
-
50
ns
tLZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
Low
Full
-
-
50
ns
tHZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
High
Full
-
-
50
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
tZH(SHDN)
Receiver Enable from
Shutdown to Output High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full
-
-
2000
ns
tZL(SHDN)
Receiver Enable from
Shutdown to Output Low
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
Full
-
-
2000
ns
-25V ≤ VCM ≤ 25V (Figure 7)
Full
1
15
-
Mbps
Receiver Input to Output Delay -25V ≤ VCM ≤ 25V (Figure 7)
Full
-
90
150
ns
Receiver Skew |tPLH - tPHL |
(Figure 7)
Full
-
4
10
ns
tZL
Receiver Enable to Output
Low
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 10)
Full
-
-
50
ns
tZH
Receiver Enable to Output
High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 10)
Full
-
-
50
ns
tLZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
Low
Full
-
-
50
ns
tHZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
High
Full
-
-
50
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
Receiver Enable from
Shutdown to Output High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full
-
-
2000
ns
tSHDN
RECEIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32490E, ISL32492E)
fMAX
tPLH, tPHL
tSKD
tSHDN
Maximum Data Rate
RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32493E, ISL32495E)
fMAX
tPLH, tPHL
tSKD
tSHDN
tZH(SHDN)
Maximum Data Rate
8
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
Full
-
-
2000
ns
-25V ≤ VCM ≤ 25V (Figure 7)
Full
15
25
-
Mbps
Receiver Input to Output Delay -25V ≤ VCM ≤ 25V (Figure 7)
Full
-
35
70
ns
Receiver Skew |tPLH - tPHL |
(Figure 7)
Full
-
4
10
ns
tZL
Receiver Enable to Output
Low
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 10)
Full
-
-
50
ns
tZH
Receiver Enable to Output
High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 10)
Full
-
-
50
ns
tLZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
Low
Full
-
-
50
ns
tHZ
Receiver Disable from Output RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
High
Full
-
-
50
ns
Time to Shutdown
(Note 11)
Full
60
160
600
ns
tZH(SHDN)
Receiver Enable from
Shutdown to Output High
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13)
Full
-
-
2000
ns
tZL(SHDN)
Receiver Enable from
Shutdown to Output Low
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
Full
-
-
2000
ns
SYMBOL
tZL(SHDN)
PARAMETER
Receiver Enable from
Shutdown to Output Low
TEST CONDITIONS
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13)
RECEIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL32496E, ISL32498E)
fMAX
tPLH, tPHL
tSKD
tSHDN
Maximum Data Rate
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” beginning on page 14 for more information.
9. Keep RE = 0 to prevent the device from entering SHDN.
10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to
enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown
Mode” on page 13.
12. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
13. Set the RE signal high time >600ns to ensure that the device enters SHDN.
14. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
15. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15µs at a 1% duty cycle).
16. See “Caution” statement below the “Latch-up (Tested per JESD78, Level 2, Class A) +125°C” section on page 5.
9
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Test Circuits and Waveforms
RL/2
DE
VCC
VCC
Z
DI
Z
DI
VOD
D
VCM
VOD
D
Y
Y
VOC
VOC
RL/2
375Ω
RL/2
DE
375Ω
RL/2
FIGURE 3A. VOD AND VOC
FIGURE 3B. VOD AND VOC WITH COMMON MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
3V
DI
1.5V
1.5V
0V
VCC
375Ω*
DE
DI
CD
D
RD
Y
VCM
375Ω*
SIGNAL
GENERATOR
tPHL
tPLH
Z
*USED ONLY FOR COMMON
MODE LOAD TESTS
OUT (Z)
VOH
OUT (Y)
VOL
90%
DIFF OUT (Y - Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL |
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
CL
3V
DE
1.5V
(Note 11)
tZH, tZH(SHDN)
(Note 11)
PARAMETER
OUTPUT
RE
DI
SW
CL (pF)
tHZ
Y/Z
X
1/0
GND
50
tLZ
Y/Z
X
0/1
VCC
50
tZH
Y/Z
0 (Note 9)
1/0
GND
100
tZL
Y/Z
0 (Note 9)
0/1
VCC
100
tZH(SHDN)
Y/Z
1 (Note 12)
1/0
GND
100
tZL(SHDN)
Y/Z
1 (Note 12)
0/1
VCC
100
FIGURE 5A. TEST CIRCUIT
1.5V
0V
tHZ
OUTPUT HIGH
VOH - 0.5V
2.3V
OUT (Y, Z)
VOH
0V
tZL, tZL(SHDN)
tLZ
(Note 11)
VCC
OUT (Y, Z)
2.3V
VOL + 0.5V
OUTPUT LOW
VOL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
10
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Test Circuits and Waveforms (Continued)
VCC
DE
DI
3V
+
Z
54Ω
D
DI
VOD
CD
Y
0V
-
SIGNAL
GENERATOR
+VOD
DIFF OUT (Y - Z)
0V
-VOD
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
B
RE
B
R
A
VCM + 750mV
15pF
RO
VCM
VCM
VCM - 750mV
A
tPLH
SIGNAL
GENERATOR
tPHL
SIGNAL
GENERATOR
VCC
50%
RO
50%
VCM
0V
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
R
1kΩ
RO
SIGNAL
GENERATOR
15pF
(Note 11)
VCC
SW
GND
3V
RE
1.5V
0V
tZH, tZH(SHDN)
PARAMETER
DE
A
1.5V
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 10)
0
+1.5V
GND
tZL (Note 10)
0
-1.5V
VCC
tZH(SHDN) (Note 13)
0
+1.5V
GND
tZL(SHDN) (Note 13)
0
-1.5V
VCC
FIGURE 8A. TEST CIRCUIT
(Note 11)
tHZ
OUTPUT HIGH
VOH - 0.5V
1.5V
RO
VOH
0V
tZL, tZL(SHDN)
tLZ
(Note 11)
VCC
RO
1.5V
VOL + 0.5V
OUTPUT LOW
VOL
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one-unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one-unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
11
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000 feet; thus, the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
The ISL3249xE is a family of ruggedized RS-485 transceivers
that improves on the RS-485 basic requirements and thereby
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
increases system reliability. The CMR increases to ±25V, while
the RS-485 bus pins (receiver inputs and driver outputs) include
fault protection against voltages and transients up to ±60V.
Additionally, larger-than-required differential output voltages
(VOD) increase noise immunity, while the ±16.5kV built-in ESD
protection complements the fault protection.
Receiver (Rx) Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input (load) current surpasses the RS-422 specification
of 3mA and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common mode voltages as great as ±25V,
making them ideal for industrial or long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that guarantees
a high-level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
Rx outputs feature high drive levels (typically 22mA @ VOL = 1V) to
ease the design of optically coupled isolated interfaces.
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are three-statable
via the active low RE input.
The Rx in the 250kbps and 1Mbps versions include noise filtering
circuitry to reject high-frequency signals. The 1Mbps version
typically rejects pulses narrower than 50ns (equivalent to
20Mbps), while the 250kbps Rx rejects pulses below 150ns
(6.7Mbps).
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485) and at least
2.4V across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and minimize EMI,
and all drivers are three-statable via the active high DE input.
The 250kbps and 1Mbps driver outputs are slew rate limited to
minimize EMI and to minimize reflections in unterminated or
improperly terminated networks. Outputs of the ISL32496E and
ISL32498E drivers are not limited; thus, faster output transition
times allow data rates of at least 15Mbps.
High Overvoltage (Fault) Protection
Increases Ruggedness
NOTE: The available smaller pitch package (MSOP) may not meet the
creepage and clearance (C&C) requirements for ±60V levels. The user is
advised to determine his C&C requirements before selecting a package
type.
The ±60V (referenced to the IC GND) fault protection on the
RS-485 pins makes these transceivers some of the most rugged
12
on the market. This level of protection makes the ISL3249xE
perfect for applications where power (e.g., 24V and 48V supplies)
must be routed in the conduit with the data lines, or for outdoor
applications where large transients are likely to occur. When
power is routed with the data lines, even a momentary short
between the supply and data lines will destroy an unprotected
device. The ±60V fault levels of this family are at least five times
higher than the levels specified for standard RS-485 ICs. The
ISL3249xE protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down.
If transients or voltages (including overshoots and ringing)
greater than ±60V are possible, then additional external
protection is required.
Widest Common Mode Voltage (CMV)
Tolerance Improves Operating Range
RS-485 networks operating in industrial complexes or over long
distances are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL3249xE’s
extended ±25V CMR is the widest available, allowing operation in
environments that would overwhelm lesser transceivers.
Additionally, the Rx will not phase invert (erroneously change
state), even with CMVs of ±40V or differential voltages as large
as 40V.
High VOD Improves Noise Immunity and
Flexibility
The ISL3249xE driver design delivers larger differential output
voltages (VOD) than the RS-485 standard requires or than most
RS-485 transmitters can deliver. The typical ±2.5V VOD provides
more noise immunity than networks built using many other
transceivers.
Another advantage of the large VOD is the ability to drive more
than two bus terminations, which allows for utilizing the
ISL3249xE in “star” and other multi-terminated, nonstandard
network topologies. Figure 10 on page 14 details the
transmitter’s VOD vs IOUT characteristic and includes load lines
for four (30Ω) and six (20Ω) 120Ω terminations. Figure 10 shows
that the driver typically delivers ±1.3V into six terminations, and
the “Electrical Specifications” on page 5 guarantees a VOD of
±0.8V at 21Ω over the full temperature range. The RS-485
standard requires a minimum 1.5V VOD into two terminations,
but the ISL3249xE deliver RS-485 voltage levels with 2x to 3x the
number of terminations.
Hot Plug Function
When a piece of equipment powers up, there is a period of time
during which the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx
outputs are kept disabled. If the equipment is connected to the
bus, a driver activating prematurely during power-up may crash
the bus. To avoid this scenario, the ISL3249xE devices
incorporate a “Hot Plug” function. Circuitry monitoring VCC ensures
that, during power-up and power-down, the Tx and Rx outputs
remain disabled, regardless of the state of DE and RE, if VCC is less
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
than ≈3.5V. This gives the processor/ASIC a chance to stabilize and
drive the RS-485 control lines to the proper states. Figure 9
illustrates the power-up and power-down performance of the
ISL3249xE compared to an RS-485 IC without the Hot Plug feature.
RE = GND
3.5V
2.8V
2.5
VCC
0
5.0
RL = 1kΩ
2.5
0
A/Y
ISL3249xE
ISL83088E
RL = 1kΩ
RO
ISL3249xE
5.0
2.5
0
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
5.0
VCC (V)
DE, DI = VCC
TIME (40µs/DIV)
FIGURE 9. HOT PLUG PERFORMANCE (ISL3249xE) vs
ISL83088E WITHOUT HOT PLUG CIRCUITRY
ESD Protection
All pins on these devices include class 3 (>8kV) Human Body
Model (HBM) ESD protection structures that are good enough to
survive ESD events commonly seen during manufacturing. Even
so, the RS-485 pins (driver outputs and receiver inputs)
incorporate more advanced structures, allowing them to survive
ESD events in excess of ±16.5kV HBM (±15kV for full-duplex
version). The RS-485 pins are particularly vulnerable to ESD
strikes because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port pins or
connecting a cable can cause an ESD event that might destroy
unprotected ICs. These new ESD structures protect the device
whether or not it is powered up, and without interfering with the
exceptional ±25V CMR. This built-in ESD protection minimizes
the need for board-level protection structures (e.g., transient
suppression diodes) and the associated, undesirable capacitive
load they present.
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to
4000 feet, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 15Mbps
may be used at lengths up to 150 feet (46m), but the distance
can be increased to 328 feet (100m) by operating at 10Mbps.
The 1Mbps versions can operate at full data rates with lengths up
to 800 feet (244m). Jitter is the limiting parameter at these
faster data rates, so employing encoded data streams (e.g.,
Manchester coded or Return-to-Zero) may allow increased
transmission distances. The slow versions can operate at
115kbps or less at the full 4000-foot (1220m) distance or at
250kbps for lengths up to 3000 feet (915m). DC cable
attenuation is the limiting parameter, so using better quality
cables (e.g., 22 AWG) may allow increased transmission
distance.
13
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receivers in
these ICs.
Proper termination is imperative, when using the 15Mbps
devices, to minimize reflections. Short networks using the
250kbps versions need not be terminated; however, terminations
are recommended unless power dissipation is an overriding
concern.
In point-to-point or point-to-multipoint (single driver on bus, like
RS-422) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as possible.
Multipoint (multi-driver) systems require that the main cable be
terminated in its characteristic impedance at both ends. Stubs
connecting a transceiver to the main cable should be kept as
short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst-case bus contentions undamaged. These
transceivers meet this requirement via driver output short circuit
current limits and on-chip thermal shutdown circuitry.
The driver output stages incorporate a double foldback, short
circuit current limiting scheme, which ensures that the output
current never exceeds the RS-485 specification, even at the
common mode and fault condition voltage range extremes. The
first foldback current level (≈70mA) is set to ensure that the
driver never folds back when driving loads with common mode
voltages up to ±25V. The very low second foldback current
setting (≈9mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
In the event of a major short circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about +15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Low Power Shutdown Mode
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they also include a
shutdown feature that reduces the already low quiescent ICC to a
10µA trickle. These devices enter shutdown whenever the
receiver and driver are simultaneously disabled (RE = VCC and
DE = GND) for a period of at least 600ns. Disabling both the
driver and the receiver for less than 60ns guarantees that the
transceiver will not enter shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 9, 10, 11, 12
and 13, at the end of the “Electrical Specifications” table on
page 9, for more information.
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Typical Performance Curves
3.6
RD = 20Ω
80
RD = 30Ω
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
90
VCC = 5V, TA = +25°C; Unless Otherwise Specified.
+25°C
70
RD = 54Ω
+85°C
60
50
40
RD = 100Ω
30
20
10
0
0
1
2
3
4
DIFFERENTIAL OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
DE = VCC, RE = X
2.35
2.30
ICC (mA)
2.8
2.6
RD = 54Ω
2.4
-25
0
25
50
TEMPERATURE (°C)
75
85
70
2.40
2.25
DE = GND, RE = GND
2.20
2.15
2.10
2.05
60
VOL, +25°C
50
-25
0
25
50
TEMPERATURE (°C)
75
VOL, +85°C
40
30
20
10
0
-10
VOH, +85°C
-20
VOH, +25°C
-30
0
85
FIGURE 12. SUPPLY CURRENT vs TEMPERATURE
1
2
3
4
RECEIVER OUTPUT VOLTAGE (V)
5
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
1000
150
+85°C
VCC = 0V to 5.5V
800
100
Y OR Z = LOW
BUS PIN CURRENT (µA)
OUTPUT CURRENT (mA)
3.0
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
2.45
2.00
-40
RD = 100Ω
3.2
2.2
-40
5
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
3.4
50
+25°C
0
-50
Y OR Z = HIGH
+25°C
-100
0
10
20
30
40
50
OUTPUT VOLTAGE (V)
FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
14
400
200
Y or Z
0
-200
-400
+85°C
-150
-60 -50 -40 -30 -20 -10
600
60
A/Y or B/Z
-600
-70 -60 -50 -40 -30 -20 -10 0
10 20 30 40 50 60 70
BUS PIN VOLTAGE (V)
FIGURE 15. BUS PIN CURRENT vs BUS PIN VOLTAGE
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Typical Performance Curves
340
VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
8
RD = 54Ω, CD = 50pF
RD = 54Ω, CD = 50pF
7
330
6
tPLH
325
SKEW (ns)
PROPAGATION DELAY (ns)
335
320
315
tPHL
310
5
4
3
2
305
1
300
-40
0
-25
25
0
50
TEMPERATURE (°C)
75
-40
85
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32490E, ISL32492E)
|tPLH - tPHL|
-25
0
50
25
TEMPERATURE (°C)
75
85
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32490E, ISL32492E)
4.0
85
RD = 54Ω, CD = 50pF
RD = 54Ω, CD = 50pF
3.5
75
SKEW (ns)
PROPAGATION DELAY (ns)
80
70
tPLH
65
3.0
tPHL
60
2.5
55
50
-40
-25
0
25
50
75
2.0
-40
85
|tPLH - tPHL|
-25
TEMPERATURE (°C)
FIGURE 18. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32493E, ISL32495E)
75
85
FIGURE 19. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32493E, ISL32495E)
3.4
RD = 54Ω, CD = 50pF
RD = 54Ω, CD = 50pF
3.2
25
3.0
23
SKEW (ns)
PROPAGATION DELAY (ns)
27
0
50
25
TEMPERATURE (°C)
tPLH
21
19
2.8
2.6
2.4
tPHL
17
2.2
15
-40
2.0
-40
-25
25
0
50
TEMPERATURE (°C)
75
FIGURE 20. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL32496E, ISL32498E)
15
85
|tPLH - tPHL|
-25
0
50
25
TEMPERATURE (°C)
75
85
FIGURE 21. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL32496E, ISL32498E)
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
VID = ±1V
5
0
5
0
-5
-10
-15
-20
-25
A
25
20
15
10
5
RO
RO
A
B
B
VID = ±1V
RO
0
5
0
-5
-10
-15
-20
-25
RO
A
B
TIME (400ns/DIV)
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
FIGURE 23. RECEIVER PERFORMANCE WITH ±25V CMV
(ISL32493E, ISL32495E)
A
25
20
15
10
5
0
B
VID = ±1V
RO
5
0
-5
-10
-15
-20
-25
DRIVER OUTPUT (V)
VOLTAGE (V)
FIGURE 22. RECEIVER PERFORMANCE WITH ±25V CMV
(ISL32490E, ISL32492E)
RO
A
B
RD = 54Ω, CD = 50pF
DI
0
5
RO
0
3
2
1
0
-1
-2
-3
A/Y - B/Z
TIME (1µs/DIV)
TIME (20ns/DIV)
0
5
0
3
2
1
0
-1
-2
-3
RO
RECEIVER OUTPUT (V)
DI
5
DRIVER INPUT (V)
RD = 54Ω, CD = 50pF
FIGURE 25. DRIVER AND RECEIVER WAVEFORMS (ISL32490E,
ISL32492E)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 24. RECEIVER PERFORMANCE WITH ±25V CMV
(ISL32496E, ISL32498E)
A/Y - B/Z
TIME (400ns/DIV)
FIGURE 26. DRIVER AND RECEIVER WAVEFORMS (ISL32493E,
ISL32495E)
16
5
DRIVER INPUT (V)
VOLTAGE (V)
20
15
10
A
B
VOLTAGE (V)
25
VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
RD = 54Ω, CD = 50pF
DI
5
0
5
RO
0
3
2
1
0
-1
-2
-3
DRIVER INPUT (V)
Typical Performance Curves
A/Y - B/Z
TIME (20ns/DIV)
FIGURE 27. DRIVER AND RECEIVER WAVEFORMS (ISL32496E,
ISL32498E)
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Typical Performance Curves
VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up):
GND
PROCESS:
Si Gate BiCMOS
17
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E,
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
CHANGE
January 18, 2011
FN7786.0
Initial Release
November 11, 2011
FN7786.1
Added 10 to “Pin Count” for ISL32490E, ISL32493E, ISL32496E in the Summary of Features table.
Added 10 Ld MSOP option for ISL32490E, ISL32493E, ISL32496E in the “Ordering Information” table.
Added 10 Ld MSOP pinout to “Pin Configurations” for ISL32490E, ISL32493E, ISL32496E.
Added 10 Ld Pin # column in the “Pin Description” table.
Added “(SOIC pin numbers shown)” in the “Typical Operating Circuits”.
Added 10 Ld MSOP information in the “Thermal Resistance” section.
Added 10 Ld MSOP package outline drawing.
M8.118 on page 19- Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36"
M8.15 on page 22- In Typical Recommended Land Pattern, changed the following:
2.41(0.095) to 2.20(0.087)
0.76 (0.030) to 0.60(0.023)
0.200 to 5.20(0.205)
March 7, 2012
FN7786.2
Updated Figure 15 on page 14 to show Pos breakdown between 60V and 70V.
Updated Theta JA in “Thermal Information” on page 5 for 8 Ld SOIC from 116 to 108.
Updated “Package Outline Drawing” on page 22. Changed Note 1 "1982" to "1994".
Products
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For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
To report errors or suggestions for this data sheet, please go to www.intersil.com/ask our staff
FITs are available from our web site at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
18
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
5
3.0±0.05
A
DETAIL "X"
D
8
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.55 ± 0.15
0.25
3°±3°
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.25 - 0.36
0.08 M C A-B D
0.10 ± 0.05
0.10 C
SIDE VIEW 1
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
19
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Mini Small Outline Plastic Packages (MSOP)
N
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
E
INCHES
SYMBOL
-B-
INDEX
AREA
1 2
0.20 (0.008)
A B C
TOP VIEW
4X θ
0.25
(0.010)
R1
R
GAUGE
PLANE
A
SEATING
PLANE -C-
A2
A1
b
-He
D
0.10 (0.004)
4X θ
L
SEATING
PLANE
C
-A0.20 (0.008)
C
C
a
SIDE VIEW
CL
E1
0.20 (0.008)
C D
-B-
END VIEW
MILLIMETERS
MAX
MIN
MAX
NOTES
A
0.037
0.043
0.94
1.10
-
A1
0.002
0.006
0.05
0.15
-
A2
0.030
0.037
0.75
0.95
-
b
0.007
0.011
0.18
0.27
9
c
0.004
0.008
0.09
0.20
-
D
0.116
0.120
2.95
3.05
3
E1
0.116
0.120
2.95
3.05
4
e
L1
MIN
0.020 BSC
0.50 BSC
-
E
0.187
0.199
4.75
5.05
-
L
0.016
0.028
0.40
0.70
6
L1
0.037 REF
0.95 REF
-
N
10
10
7
R
0.003
-
0.07
-
-
R1
0.003
-
0.07
-
-
θ
5o
15o
5o
15o
-
α
0o
6o
0o
6o
Rev. 0 12/02
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions and
are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b”
dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A -H- .
and - B -
to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions
are for reference only
20
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
8.65
A 3
4
0.10 C A-B 2X
6
14
DETAIL"A"
8
0.22±0.03
D
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
5
0.31-0.51
B 3
(0.35) x 45°
4° ± 4°
6
0.25 M C A-B D
TOP VIEW
0.10 C
1.75 MAX
H
1.25 MIN
0.25
GAUGE PLANE C
SEATING PLANE
0.10 C
0.10-0.25
1.27
SIDE VIEW
(1.27)
DETAIL "A"
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
(1.50)
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
21
FN7786.2
March 16, 2012
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.60 (0.023)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
5.20(0.205)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
22
FN7786.2
March 16, 2012