INTERSIL ACS112K

ACS112MS
Radiation Hardened
Dual J-K Flip-Flop
January 1996
Features
Pinouts
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96704 and Intersil’sIntersil QM Plan
16 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835, DESIGNATOR CDIP2-T16,
LEAD FINISH C
TOP VIEW
• 1.25 Micron Radiation Hardened SOS CMOS
-10
• Single Event Upset (SEU) Immunity: <1 x 10
(Typ)
Errors/Bit/Day
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
K1 2
15 R1
J1 3
14 R2
S1 4
13 CP2
MEV-cm2/mg
Q1 5
12 K2
RAD (Si)/s, 20ns Pulse
Q1 6
11 J2
Q2 7
10 S2
GND 8
9 Q2
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100
11
16 VCC
CP1 1
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current ≤ 1µA at VOL, VOH
• Fast Propagation Delay . . . . . . . . . . . . . . . . 21ns (Max), 14ns (Typ)
Description
The Intersil ACS112MS is a Radiation Hardened Dual J-K Flip-Flop with
Set and Reset. The output change states on the negative transition of
the clock (CP1N or CP2N).
16 PIN CERAMIC FLATPACK
MIL-STD-1835, DESIGNATOR CDFP4-F16,
LEAD FINISH C
TOP VIEW
CP1
1
16
VCC
K1
2
15
R1
J1
3
14
R2
S1
4
13
CP2
Q1
5
12
K2
Q1
6
11
J2
Q2
7
10
S2
GND
8
9
Q2
The ACS112MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family.
The ACS112MS is supplied in a 16 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962F9670401VEC
-55oC to +125oC
MIL-PRF-38535 Class V
16 Lead SBDIP
5962F9670401VXC
-55oC to +125oC
MIL-PRF-38535 Class V
16 Lead Ceramic Flatpack
ACS112D/Sample
25oC
Sample
16 Lead SBDIP
ACS112K/Sample
25oC
Sample
16 Lead Ceramic Flatpack
ACS112HMSR
25oC
Die
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
Spec Number
File Number
518816
3571.1