ISL97635 SMBus LED Driver Programming Instruction ® Application Note 1. Copy the ISL97635-20080614.zip file into hard drive, then unzip it. Once the file is unzipped, run setup.exe under the Package directory for s/w installation. 2. Connect the USB connector to the PC, or use USB extension cable (not included). 3. Refer to “ISL97635EVALZ Evaluation Board Schematic” on page 3. 4. Ensure JP1, JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP23, and JP26 are ON. 5. If the eval board does not have enough LED strings, users can connect external LED strings between VOUT (Anode) and IINx (Cathode) pins for the specific configurations. 6. Apply 0.6V to 21V at VIN and PGND. November 5, 2009 AN1476.0 8. Open the program at Start -> All Programs -> Intersil ISL97635 Eval Kit -> Intersil IS635 Eval Kit. Click ISL97636 instead (This is a programming error that will be corrected in the next revision), the GUI is shown in Figure 1. 9. To program ISL97635 GUI, enter the data in Hex (0x00 to 0xFF) in registers 0x00 and 0x07. Other registers enter binary data. One example for checking the Backlight Control is to change bit 0 in register 0x01 to 1, then click the Write button. The LEDs should be on. Table 1 shows the Register map. For the complete command and data descriptions, see ISL97635 Table 2A and the associated sections. (Note: Sometimes the USB driver needs to be reset; for normal operation, just cycle the VIN power). 7. Apply 0.2V to 5.5V at PWMI/EN and GND. Optional PWM signal can be applied to the same pin for PWM dimming. FIGURE 1. ISL97635 GUI 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1476 TABLE 1. REGISTER MAP ADDRESS REGISTER BIT 7 BIT 6 BRT6 BIT 5 BRT5 BIT 4 0x00 PWM Brightness Control BRT7 0x01 Device Control Reserved Reserved Reserved Reserved 0x02 Fault/Status Reserved Reserved 2_CH_SD 1_CH_SD BL_STAT 0x03 Identification LED Panel MFG3 0x07 DC Brightness Control BRTDC7 BRTDC6 BRTDC5 BIT 2 BIT 1 BIT 0 DEFAULT SMBUS VALUE PROTOCOL BRT3 BRT2 BRT1 BRT0 0XFF Read and Write Reserved PWM_MD PWM_SEL BL_cTL 0X00 Read and Write OV_CURR THRM_SHDN FAULT 0x00 Read Only MFG1 MFG0 REV2 REV1 REV0 0xC8 Read Only BRTDC4 BRTDC3 BRTDC2 BRTDC1 BRTDC0 0xFF Read and Write 0x08 Configuration Reserved Reserved Reserved Reserved Reserved FSW VSC1 VSC0 0xXF Read and Write 0x09 Output Channel CH3 CH2 CH1 CH0 0xFF Read and Write CH 7 CH6 MFG2 BRT4 BIT 3 CH5 CH4 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 2 AN1476.0 November 5, 2009 ISL97635EVALZ Evaluation Board Schematic Notes L1 choices : 1st - IHLP-2525BD-01 Vishay Inductor,8.2uH/3A/2.4mm 2nd- RLF7030TDKInductor 6.8uH/2.8A/3.2mm 3rd- IHLP-2525AH-01 Vishay Inductor, 4.7uH/3A/1.8mm (LowestProfile) TP28 TP27 D1choices: 1st - SS15 - Vishay Schottky Diode, 50V/1A/SMA/2.3mm 2nd- ZHCS500 - Zetex Schottky Diode, 40V/0.5A/SOT-23/1mm J4 JP23 4 3 2 1 (C19 & C20 not populated) J1 J6 3 C15 47uF SGND (D2& C21 not populated) C16 0.1uF C1 4 C21 R1 open 3 open D1 TP9 JP8 L1 1 2 5 6 D2 C2 10u/25V 0.1u/25V PGND TP10 Q1 VIN VIN USBCON C4 C5 8.2uH VOUT C6 C7 C8 C9 4.7u/50V 4.7u/50V 4.7u/50V 4.7u/50V SS15 JP1 JP2 JP3 JP4 JP5 JP6 JP7 FDMA530PZ SGNDC17 10u/25V R12 2.49 R13 2.49 Q2 U2 Q3 10u/25V U3 XT1 33pF C18 TP11 1.5k Vlogic TP25 JP28 SGNDR14 100 R6 C10 R7 500 20n/50V JP26 R5 C11 C12 1u/50V 0.1u/16V 10k TP12 JP27 R3 270k 19L X 10k JP9 R10 20LX SGND TP26 JP29 UMT1N LED1 LED10 JP10 R15 1 SMBCLK PGND SMBDAT PGND C13 27nF/50V C14 220nF/50V ST7263B 3 FPWM 4 LED2 16 ISL97635 PWMO IIN0 GND IIN1 PWMI/EN IIN2 15 5 JP14 LED46 JP15 LED55 JP16 LED64 LED73 JP17 JP18 LED11 LED20 LED29 LED38 LED47 LED56 LED65 LED74 LED3 LED12 LED21 LED30 LED39 LED48 LED57 LED66 LED75 LED4 LED13 LED22 LED31 LED40 LED49 LED58 LED67 LED76 LED5 LED14 LED23 LED32 LED41 LED50 LED59 LED68 LED77 LED6 JP19 LED15 LED24 LED33 LED42 LED51 LED60 LED69 LED78 LED7 JP20 LED16 LED25 LED34 LED43 LED52 LED61 LED70 LED79 LED8 JP21 LED17 LED26 LED35 LED44 LED53 LED62 LED71 LED80 LED18 LED27 LED36 LED45 LED54 LED63 LED72 LED81 R4 10k J3 SGND JP13 LED37 17 OVP TP21 JP12 LED28 18 100 2 TP22 JP11 LED19 14 J2 PWMI/EN 6 13 1 3 5 7 9 IIN312 RSET 11 IIN410 IIN5 9 IIN68 U1 IIN77 SGND J5 HE10_CON_MALE 2 4 6 8 10 JP24 SGND R2 34.8K Connectone point at PCB LED9 JP22 SGND TP1 TP2 TP3 TP4 R11 4 TP5 TP6 TP7 TP8 FIGURE 2. EVALUATION BOARD SCHEMATIC Application Note 1476 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 COM 22 P R9 SGND SGND VDDA USBVCC USBDM USBDP VSSA PA0/MCO PA1/SDA/ICCDATA NC NC NC PA2/SCL/ICCCLK PA3/EXTCLK PA4/ICAP1/IT1 PA5/ICAP2/IT2 PA6/OCMP1/IT3 PA7/OCMP2/IT4 PB0/AIN0 V DC 24 C20 0.1uF 33pF VDD OSCOUT OSCIN VSS PC2/USBOE PC1/TDO PC0/RDI /RESET NC PB7/AIN7/IT8 PB6/AIN6/IT7 VPP/TEST PB5/AIN5/IT6 PB4/AIN4/IT5 PB3/AIN3 PB2/AIN2 PB1/AIN1 V IN 23 SGND R8 4.7k 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 FAULTFAULT 21 OSC C19 0.1uF AN1476.0 November 5, 2009 LED Driver Circuit VIN Q1 4 C2 0.1µ/25V C1 10µ/25V 3 D1 L1 1 2 5 6 8.2µH C4 10µ/25V L1 : IHLP-2525BD-01 Vishay Inductor D1 : SS15 - Vishay Schottky Diode, 5 C6 4.7µ/50V SS15 C7 4.7µ/50V FDMA530PZ SMBDAT 2 SMBDAT 3 FPWM 27n/6.3V 220n/6.3V C13 C14 4 SMBCLK 19 PGND 18 PGND 17 OVP 16 ISL97635 PWMO R3 1M IIN0 15 6 PWMI/EN IIN2 13 OVP IIN3 R4 39k 12 11 10 9 8 RSET PWMI/EN IIN4 14 IIN5 IIN1 NC GND NC 5 7 LED10 LED19 LED28 LED37 LED46 LED2 LED11 LED20 LED29 LED38 LED47 LED3 LED12 LED21 LED30 LED39 LED48 LED4 LED13 LED22 LED31 LED40 LED49 LED5 LED14 LED23 LED32 LED41 LED50 LED6 LED15 LED24 LED33 LED42 LED51 R2 36.6k LED7 LED16 LED25 LED34 LED43 LED52 LED8 LED17 LED26 LED35 LED44 LED53 LED9 LED18 LED27 LED36 LED45 LED54 NOTES: 1. For two layer board, layout PGND (Noisy Ground) Top Layer and AGND (Quiet Ground) on Bottom Layer. 2. Tie PGND and AGND at one point only by doing the following: Bridge U1 PGND (Pins 18 and 19) and AGND (Pin 5) to the package thermal pad. 3. Put multiple vias on the thermal pad that connects to the bottom side AGND. AN1476.0 November 5, 2009 FIGURE 3. LED DRIVER CIRCUIT Application Note 1476 GND U1 LED1 LX FAULT 21 20 LX 1 COMP SMBCLK VIN VDC 4 C11 1µ/10V 23 C12 0.1µ/10V R5 10k 24 R6 10k 22 C10 33n R7 500 JP26 VLOGIC C20