DATASHEET

Low-Voltage, Single Supply, SPST, High Performance
Analog Switches
ISL43110, ISL43111
Features
The Intersil ISL43110 and ISL43111 are precision, high
performance analog switches that are fully specified for 3.3V,
5V, and 12V operation, and feature improved leakage, ICC and
switching time specifications.
• Fully specified at 3.3V, 5V, and 12V supplies
Designed to operate from a single +2.4V to +12V supply, the low
supply current (1µA Max over-temperature and voltage ranges)
and low leakage currents (1nA) make these switches ideal for
battery powered applications.
• Available in SOT-23 packaging
• Single supply operation . . . . . . . . . . . . . . . . . . . . . . +2.4V to +12V
• ON-Resistance (rON max) . . . . . . . . . . . . . . . . . 20 (V+ = 5V)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 (V+ = 12V)
• rON flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5
• Charge injection (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pC
Low rON and fast switching speeds over a wide operating supply
range increase these devices usefulness in industrial
equipment, portable instruments, and as input signal
multiplexers for new generation, low supply voltage data
converters. Some of the smallest packages are available
alleviating board space limitations, and making Intersil’s newest
line of low-voltage switches an ideal solution.
• Low power consumption (PD max) . . . . . . . . . . . . . . . . . . . . .5µW
The ISL43110 and ISL43111 are single-pole/single-throw
(SPST) switches, with the ISL43110 being normally open (NO),
and the ISL43111 being normally closed (NC).
• Minimum 2kV ESD protection per method 3015.7
Table 1 summarizes the performance of this family. For similar
performance ±5V supply versions, see the ISL43112 and
ISL43113 data sheets.
TABLE 1. FEATURES AT A GLANCE
ISL43110
ISL43111
Number of Switches
1
1
Configuration
NO
NC
3.3V rON
15Ω
15Ω
3.3V tON / tOFF
55ns/28ns
55ns/28ns
5V rON
11Ω
11Ω
5V tON/tOFF
45ns/20ns
45ns/20ns
12V rON
7Ω
7Ω
12V tON/tOFF
37ns/21ns
37ns/21ns
Packages
• TTL, CMOS compatible
• Pb-free (RoHS compliant)
Applications
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones, pagers
- Laptops, notebooks, palmtops, PDAs
• Communications systems
- Radios
- PBX, PABX
• Test equipment
- Logic and spectrum analyzers
- Portable meters, DVM, DMM
• Medical equipment
- Ultrasound, MRI, CAT SCAN
- Electrocardiograph, blood analyzer
• Audio and video switching
• Tech Brief TB363 “Guidelines for Handling and Processing
Moisture Sensitive Surface Mount Devices (SMDs)”
1
• Fast switching action
- tON (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80ns
- tOFF (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns
• Heads-up displays
8 Ld SOIC, 5 Ld SOT-23
Related Literature
June 27, 2014
FN6028.4
• Low leakage current (max at +85°C) . . 10nA (Off Leakage)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20nA (On Leakage)
• General purpose circuits
- +3V/+5V DACs and ADCs
- Sample and hold circuits
- Digital filters
- Operational amplifier gain switching networks
- High frequency analog switching
- High speed multiplexing
- Integrator reset circuits
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2002, 2004, 2005, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL43110, ISL43111
Ordering Information
PART NUMBER
(Notes 2, 3, )
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL43110IBZ
ISL431 10IBZ
-40 to +85
8 Ld SOIC
M8.15
ISL43110IBZ-T (Note 1)
ISL431 10IBZ
-40 to +85
8 Ld SOIC
M8.15
ISL43110IHZ-T (Note 1)
110Z (Note 4)
-40 to +85
5 Ld SOT-23
P5.064
ISL43111IBZ
ISL431 11IBZ
-40 to +85
8 Ld SOIC
M8.15
ISL43111IBZ-T (Note 1)
ISL431 11IBZ
-40 to +85
8 Ld SOIC
M8.15
ISL43111IHZ-T (Note 1)
111Z (Note 4)
-40 to +85
5 Ld SOT-23
P5.064
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL43110, ISL43111. For more information on MSL, please see tech
brief TB363
4. The part marking is located on the bottom of the part.
Pin Configurations
(Note 5)
ISL43110
(5 LD SOT-23)
TOP VIEW
ISL43110
(8 LD SOIC)
TOP VIEW
COM 1
N.C.
NO
7 GND
2
N.C.
3
6 IN
V+
4
5 N.C.
2
4 IN
GND 3
ISL43111
(5 LD SOT-23)
TOP VIEW
ISL43111
(8 LD SOIC)
TOP VIEW
8 NC
COM 1
5 V+
COM 1
8 NO
N.C.
2
7 GND
N.C.
3
6 IN
V+
4
5 N.C.
5 V+
COM 1
NC
2
4 IN
GND 3
NOTE:
5. Switches Shown for Logic “0” Input.
Pin Descriptions
PIN#
V+
GND
IN
COM
FUNCTION
Truth Table
LOGIC
ISL43110
ISL43111
System Power Supply Input (+2.4V to +12V)
0
OFF
ON
Ground Connection
1
ON
OFF
NOTE: Logic “0”  0.8V. Logic “1” 2.4V.
Digital Control Input
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
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ISL43110, ISL43111
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V
Input Voltages
IN (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
NO, NC (Note 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max). . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
ESD Rating (Per MIL-STD-883 Method 3015) . . . . . . . . . . . . . . . . . . . . >2kV
Thermal Resistance (Typical, Note 7)
JA °C/W)
5 Ld SOT-23 Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
8 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. Signals on NO, NC, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
7. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications (5V Supply) Test Conditions:
Otherwise Specified.
PARAMETER
V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 9), Unless
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 8, 10)
Full
0
TYP
MAX
(Notes 8, 10)
UNIT
S
V+
V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON-Resistance, rON
V+ = 4.5V, ICOM = 1.0mA, VCOM = 3.5V,
(Figure 4)
rON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 1V, 2V, 3V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
(Note 11)
25
11
20

Full
15
25

25
1.5
3

Full
2.5
5

0.01
1
nA
10
nA
1
nA
10
nA
1
nA
20
nA
25
-1
Full
-10
25
-1
Full
-10
25
-1
Full
-20
Input Voltage High, VINH
Full
2.4
Input Voltage Low, VINL
Full
COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V,
(Note 11)
COM ON Leakage Current, ICOM(ON)
V = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V,
(Note 11)
0.01
0.01
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V
-1
0.8
V
1
µA
V+ = 5.5V, VIN = 0V or V+
Full
VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, (Figure 1)
25
45
80
ns
Full
50
120
ns
25
20
50
ns
Full
28
75
ns
10
pC
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, (Figure 1)
Turn-OFF Time, tOFF
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0, (Figure 2)
25
2
OFF-Isolation
RL = 50, CL = 15pF, f = 100kHz, (Figure 3)
25
>90
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Electrical Specifications (5V Supply) Test Conditions:
Otherwise Specified. (Continued)
PARAMETER
V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 9), Unless
TEMP
(°C)
TEST CONDITIONS
MIN
(Notes 8, 10)
TYP
MAX
(Notes 8, 10)
UNIT
S
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
60
dB
NO or NC OFF Capacitance, COFF
f = 1MHz, VNO or VNC = VCOM = 0V, (Figure 5)
25
15
pF
COM OFF Capacitance, CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, (Figure 5)
25
15
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, (Figure 5)
25
40
pF
V+ = 5.5V, VIN = 0V or V+, Switch On or Off
Full
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
Electrical Specifications (12V Supply) Test Conditions:
Otherwise Specified.
PARAMETER
-1
1
µA
V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 9), Unless
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 8, 10
Full
0
TYP
MAX
(Notes 8, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON-Resistance, rON
V+ = 10.8V, ICOM = 1.0mA, VCOM = 10V
rON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 3V, 6V, 9V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 13V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V,
(Note 11)
V+
V
7
10

Full
8
15

25
1
3

25
5

25
-1
1
nA
Full
-10
10
nA
25
-1
1
nA
Full
-10
10
nA
25
-1
1
nA
Full
-20
20
nA
Input Voltage High, VINH
Full
4
Input Voltage Low, VINL
Full
0.8
V
1
µA
Full
COM OFF Leakage Current, ICOM(OFF) V+ = 13V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V,
(Note 11)
COM ON Leakage Current, ICOM(ON)
V = 13V, VCOM = 1V, 10V, or VNO or VNC = 1V, 10V,
(Note 11)
1.5
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
V+ = 13V, VIN = 0V or V+
Full
V
-1
DYNAMIC CHARACTERISTICS
VNO or VNC = 10V, RL = 300, CL = 35pF
Turn-ON Time, tON
VNO or VNC = 10V, RL = 300, CL = 35pF
Turn-OFF Time, tOFF
25
37
80
ns
Full
42
120
ns
25
21
50
ns
Full
26
75
ns
20
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0
25
8
OFF Isolation
RL = 50, CL = 15pF, f = 100kHz
25
>90
dB
pC
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
67
dB
NO or NC OFF Capacitance, COFF
f = 1MHz, VNO or VNC = VCOM = 0V
25
15
pF
COM OFF Capacitance, CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
15
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V
25
40
pF
V+ = 13V, VIN = 0V or V+, Switch On or Off
Full
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
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1
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ISL43110, ISL43111
Electrical Specifications (3.3V Supply) Test Conditions:
Otherwise Specified.
PARAMETER
V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 9), Unless
TEST CONDITIONS
TEMP
MIN
(°C) (Notes 8, 10)
TYP
MAX
(Notes 8, 10)
UNITS
V+
V
ANALOG SWITCH CHARACTERISTICS
Full
Analog Signal Range, VANALOG
ON-Resistance, rON
V+ = 3V, ICOM = 1.0mA, VCOM = 1.5V
rON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 0.5V, 1V, 1.5V
V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, (Note 11)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, (Note 11)
COM ON Leakage Current, ICOM(ON)
V = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V, or
floating, (Note 11)
0
25
15
30

Full
18
40

25
3
5.5

Full
4
7

25
-1
1
nA
Full
-10
10
nA
25
-1
1
nA
Full
-10
10
nA
25
-1
1
nA
Full
-20
20
nA
Full
2.4
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, VINH
V
Full
0.8
V
1
µA
55
100
ns
Full
70
150
ns
25
28
60
ns
Full
35
85
ns
25
2
10
pC
RL = 50, CL = 15pF, f = 100kHz
25
>90
dB
RL = 50, CL = 5pF, f = 1MHz
25
58
dB
f = 1MHz, VNO or VNC = VCOM = 0V
25
15
pF
f = 1MHz, VNO or VNC = VCOM = 0V
25
15
pF
f = 1MHz, VNO or VNC = VCOM = 0V
25
40
pF
V+ = 3.6V, VIN = 0V or V+, Switch On or Off
Full
Input Voltage Low, VINL
Input Current, IINH, IINL
V+ = 3.6V, VIN = 0V or V+
Full
Turn-ON Time, tON
VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V
25
Turn-OFF Time, tOFF
VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0
OFF Isolation
Power Supply Rejection Ratio
NO or NC OFF Capacitance, COFF
COM OFF Capacitance, CCOM(OFF)
COM ON Capacitance, CCOM(ON)
-1
DYNAMIC CHARACTERISTICS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
-1
1
µA
NOTES:
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. VIN = input voltage to perform proper function.
10. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
11. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25°C.
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Test Circuits and Waveforms
3V or 5V
LOGIC
INPUT
V+
tr < 20ns
tf < 20ns
50%
0V
tOFF
SWITCH
INPUT
SWITCH
INPUT
VOUT
VOUT
NO or NC
COM
IN
90%
SWITCH
OUTPUT
C
90%
0V
LOGIC
INPUT
CL
35pF
RL
300
GND
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
CL includes fixture and stray capacitance.
RL
----------------------V OUT = V
(NO or NC) R + r
L
ON
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
RG
VOUT
C
VOUT
COM
NO or NC
VOUT
LOGIC
INPUT
VG
ON
ON
GND
IN
CL
OFF
LOGIC
INPUT
Q = VOUT x CL
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
V+
C
C
rON = V1/1mA
SIGNAL
GENERATOR
COM
NO or NC
VCOM
IN
0V or V+
1mA
IN
V1
0.8V or VINH
COM
ANALYZER
GND
NO or NC
GND
RL
FIGURE 3. OFF ISOLATION TEST CIRCUIT
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FIGURE 4. rON TEST CIRCUIT
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ISL43110, ISL43111
Test Circuits and Waveforms (Continued)
V+
NO or NC
IN
IMPEDANCE
ANALYZER
0V or V+
COM
GND
FIGURE 5. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL43110 and ISL43111 analog switches offer precise
switching capability from a single 2.4V to 12V supply with low
ON-resistance and high speed operation. The devices are
especially well suited to portable battery powered equipment
thanks to the low operating supply voltage (2.4V), low power
consumption (5µW), low leakage currents (1nA max), and the
tiny SOT-23 packaging. High frequency applications also benefit
from the wide bandwidth, and the very high off-isolation.
Supply Sequencing And Overvoltage
Protection
As with any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain,
ESD protection diodes from the pin to V+ and to GND
(see Figure 6). To prevent forward biasing these diodes, V+
must be applied before any input signals, and input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k resistor
in series with the input (see Figure 6). The resistor limits the
input current below the threshold that produces permanent
damage, and the sub-microamp input current produces an
insignificant voltage drop during normal operation.
Adding a series resistor to the switch input defeats the purpose
of using a low rON switch, so two small signal diodes can be
added in series with the supply pins to provide overvoltage
protection for all pins (see Figure 6). These additional diodes
limit the analog signal from 1V below V+ to 1V above GND. The
low leakage current performance is unaffected by this
approach, but the switch resistance may increase, especially
at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
IN
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 6. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL4311X construction is typical of most CMOS analog
switches, except that there are only two supply pins: V+ and
GND. Unlike switches with a 13V maximum supply voltage, the
ISL4311X 15V maximum supply voltage provides plenty of
room for the 10% tolerance of 12V supplies, as-well-as room
for overshoot and noise spikes.
The minimum recommended supply voltage is 2.4V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer to
the Electrical Specification on page 3 and “Typical
Performance Curves” on page 8 for details.
V+ and GND power the internal CMOS switches and set their
analog voltage limits. These supplies also power the internal
logic and level shifters. The level shifters convert the input
logic levels to switched V+ and GND signals to drive the analog
switch gate terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes negative
in this configuration. For a ±5V single SPST switch, see the
ISL43112 and ISL43113 data sheet.
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Logic-Level Thresholds
This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V, and the full temperature range
(see Figure 10). At 12V the low temperature VIH level is about
2.5V. This is still below the TTL guaranteed high output
minimum level of 2.8V, but noise margin is reduced. For best
results with a 12V supply, use a logic family the provides a VOH
greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving the
digital input signals from GND to V+ with a fast transition time
minimizes power dissipation.
High-Frequency Performance
In 50systems, signal response is reasonably flat to 20MHz,
with a -3dB bandwidth exceeding 200MHz (see Figure 15).
Figure 15 also illustrates that the frequency response is very
consistent over a wide V+ range, and for varying analog signal
levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off-isolation is
the resistance to this feedthrough. Figure 16 details the high
Typical Performance Curves
Off-isolation provided by this family. At 10MHz, off-isolation is
about 50dB in 50 systems, decreasing approximately 20dB
per decade as frequency increases. Higher load impedances
decrease Off-isolation due to the voltage divider action of the
switch OFF impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced, they
are reverse biased differently. Each is biased by either V+ or
GND and the analog signal. This means their leakages will vary
as the signal varies. The difference in the two diode leakages
to the V+ and GND pins constitutes the analog-signal-path
leakage current. All analog leakage current flows between
each pin and one of the supply terminals, not to the other
switch terminal. This is why both sides of a given switch can
show leakage currents of the same or opposite polarity. There
is no connection between the analog-signal paths and V+ or
GND.
TA = +25°C, Unless Otherwise Specified
20
25
VCOM = (V+) - 1V
ICOM = 1mA
20
+85°C
-40°C
8
15
V+ = 5V
13
rON (Ω)
+85°C
10
-40°C
V+ = 3.3V
+25°C
12
15
rON (Ω)
ICOM = 1mA
16
+25°C
11
+85°C
9
+25°C
7
-40°C
5
9
5
+85°C
7
V+ = 12V
+25°C
5
0
3
4
5
6
7
8
V+ (V)
9
10
11
FIGURE 7. ON-RESISTANCE vs SUPPLY VOLTAGE
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8
12
13
3
-40°C
0
2
4
6
VCOM (V)
8
10
12
FIGURE 8. ON-RESISTANCE vs SWITCH VOLTAGE
FN6028.4
June 27, 2014
ISL43110, ISL43111
Typical Performance Curves
TA = +25°C, Unless Otherwise Specified (Continued)
150
3.0
V+ = 12V
2.5
-40°C
VINH
VINH AND VINL (V)
Q (pC)
100
50
V+ = 5V
V+ = 3.3V
0
2.0
+25°C
+85°C
-40°C
VINL
1.5
+25°C
+85°C
1.0
V+ = 12V
-50
0.5
0
2
4
6
8
10
3
2
12
4
6
5
7
8
V+ (V)
VCOM (V)
140
10
12
13
60
VCOM = (V+) - 1V
VCOM = (V+) - 1V
RL = 300
120
11
FIGURE 10. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE
130
9
RL = 300
50
110
tOFF (ns)
tON (ns)
100
90
+85°C
80
70
40
+85°C
30
+25°C
60
+25°C
20
50
30
2
3
4
5
6
7
V+ (V)
8
9
10
11
10
12
FIGURE 11. TURN - ON TIME vs SUPPLY VOLTAGE
2
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 12. TURN - OFF TIME vs SUPPLY VOLTAGE
40
60
RL = 300
V+ = 3.3V
RL = 300
V+ = 3.3V
35
50
30
tOFF (ns)
V+ = 5V
40
tON (ns)
-40°C
-40°C
40
V+ = 12V
30
25
V+ = 5V
20
V+ = 12V
20
10
0
15
1
2
3
4
5
6
7
8
9
10
VCOM (V)
FIGURE 13. TURN - ON TIME vs SWITCH VOLTAGE
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9
11
12
10
0
1
2
3
4
5
6
7
8
9
10
11
12
VCOM (V)
FIGURE 14. TURN - OFF TIME vs SWITCH VOLTAGE
FN6028.4
June 27, 2014
ISL43110, ISL43111
TA = +25°C, Unless Otherwise Specified (Continued)
10
0
V+ = 3V to 13V
20 RL = 50
GAIN
V+ = 3.3V
-3
30
V+ = 12V
-6
OFF-ISOLATION (dB)
NORMALIZED GAIN (dB)
Typical Performance Curves
0
PHASE
V+ = 12V
20
V+ = 3.3V
60
80
RL = 50
VIN = 0.2VP-P TO 2.5VP-P (V+ = 3.3V)
VIN = 0.2VP-P TO 5VP-P (V+ = 12V)
1
PHASE (°)
40
100
50
60
70
80
90
100
100
10
40
110
1k
600
10k
100k
FREQUENCY (MHz)
1M
10M
100M
500M
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE
FIGURE 16. OFF-ISOLATION
RL = 50
0
V+ = 12V, SWITCH OFF
10
PSRR (dB)
20
30
V+ = 3.3V, SWITCH OFF
40
V+ = 12V, SWITCH ON
50
60
V+ = 3.3V, SWITCH ON
70
80
0.3
1
10
100
1k
FREQUENCY (MHz)
FIGURE 17. PSRR vs FREQUENCY
Die Characteristics
TRANSISTOR COUNT:
SUBSTRATE POTENTIAL (POWERED UP):
GND
ISL43110: 40
ISL43111: 40
PROCESS:
Si Gate CMOS
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
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10
FN6028.4
June 27, 2014
ISL43110, ISL43111
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.60 (0.023)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
5.20(0.205)
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
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11
FN6028.4
June 27, 2014
ISL43110, ISL43111
Package Outline Drawing
P5.064
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 3, 4/11
8°
0°
3.00 3
2.80
(1.90)
5
0.22
0.08 5
4
3.00
2.60
1.70
1.50
3
2
(0.95)
SEE DETAIL X
0.50
0.30
0.20 (0.008) M C
TOP VIEW
END VIEW
0.25
0.10
0.10 MIN
1.30
0.90
1.45 SEATING
0.90 PLANE
C
GAUGE PLANE
SEATING
PLANE
4
0.55
0.35
C
0.15
0.00
0.10 (0.004) C
(0.60)
SIDE VIEW
8°
0°
(0.25)
DETAIL "X"
5x (0.60)
5x (1.2)
5
4
(2.4)
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
3
2. Package conforms to EIAJ SC-74 and JEDEC MO178AA.
3. Package length and width are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength measured at reference to gauge plane.
5. Lead thickness applies to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
(2x 0.95)
6. Controlling dimension: MILLIMETER.
Dimensions in ( ) for reference only.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
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12
FN6028.4
June 27, 2014
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