an1297

ISL6255EVAL2Z Evaluation Board
Setup Procedure
®
April 10, 2007
Application Note
AN1297.0
General Description
Features
The ISL6255EVAL2Z REV B EV kit includes all the circuitry
needed to demonstrate the capabilities of the ISL6255
Lithium-Ion battery-charger with integrated AC adapter
current limit. The user can experiment with an extensive
matrix of battery charge parameters, AC adapter current
limit, monitor functions, and load switching.
• ±0.5% Charge Voltage Accuracy (-10°C to +100°C)
The ISL6255, ISL6255A is a highly integrated battery
charger controller for Li-Ion/Li-Ion polymer batteries. High
Efficiency is achieved by a synchronous buck topology and
the use of a MOSFET, instead of a diode, for selecting power
from the adapter or battery. The low side MOSFET emulates
a diode at light loads to improve the light load efficiency and
prevent system bus boosting.
• Programmable Charge Current Limit, Adapter Current
Limit and Charge Voltage
The constant output voltage can be selected for 2, 3 and 4
series Li-Ion cells with 0.5% accuracy over-temperature. It
can also be programmed between 4.2V + 5%/cell and
4.2V - 5%/cell to optimize battery capacity. When supplying
the load and battery charger simultaneously, the input
current limit for the AC adapter is programmable to within
3% accuracy to avoid overloading the AC adapter and to
allow the system to make efficient use of available adapter
power for charging. It also has a wide range of
programmable charging current. The ISL6255, ISL6255A
provides outputs that are used to monitor the current drawn
from the AC adapter, and monitor for the presence of an AC
adapter. The ISL6255, ISL6255A automatically transitions
from regulating current mode to regulating voltage mode.
• Fast Input Current Limit Response
ISL6255, ISL6255A has a feature for automatic power source
selection by switching to the battery when the AC adapter is
removed or switching to the AC adapter when the AC adapter
is available. It also provides a DC adapter monitor to support
aircraft power applications with the option of no battery
charging.
• Support Pulse Charging
• ±3% Accurate Input Current Limit
• ±3% Accurate Battery Charge Current Limit
• ±25% Accurate Battery Trickle Charge Current Limit
(ISL6255A)
• Fixed 300kHz PWM Synchronous Buck Controller with
Diode Emulation at Light Load
• Output for Current Drawn from AC Adapter
• AC Adapter Present Indicator
• Input Voltage Range 7V to 25V
• Support 2, 3 and 4 Cells Battery Pack
• Up to 17.64V Battery-Voltage Set Point
• Control Adapter Power Source Select MOSFET
• Thermal Shutdown
• Aircraft Power Capable
• DC Adapter Present Indicator
• Battery Discharge MOSFET Control
• Less than 10µA Battery Leakage Current
• Charge Any Battery Chemistry: Li-Ion, NiCd, NiMH, etc.
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Notebook, Desknote and Sub-notebook Computers
• Personal Digital Assistant
Ordering Information
PART
NUMBER
(Notes 1, 2)
PART
MARKING
TEMP
RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL6255HRZ
ISL 6255HRZ
-10 to +100
28 Ld 5x5 QFN
ISL6255HAZ
ISL 6255HAZ
-10 to +100
28 Ld QSOP
L28.5×5
M28.15
ISL6255AHRZ
ISL6255 AHRZ
-10 to +100
28 Ld 5x5 QFN
L28.5×5
ISL6255AHAZ
ISL6255 AHAZ
-10 to +100
28 Ld QSOP
M28.15
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-T” for Tape and Reel.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 1297
Pinouts
ISL6255, ISL6255A
(28 LD QSOP)
TOP VIEW
DCIN
1
28
DCPRN
VDD
2
27
ACPRN
ACSET
3
26
CSON
DCSET
4
25
CSOP
EN
5
24
CSIN
CELLS
6
23
CSIP
ICOMP
7
22
SGATE
VCOMP
8
21
BGATE
ICM
9
20
PHASE
VREF
10
19
UGATE
CHLIM
11
18
BOOT
ACLIM
12
17
VDDP
VADJ
13
16
LGATE
GND
14
15
PGND
2
DCSET
ACSET
VDD
DCIN
DCPRN
ACPRN
CSON
ISL6255, ISL6255A
(28 LD QFN)
TOP VIEW
28
27
26
25
24
23
22
2
20
CSIN
ICOMP
3
19
CSIP
VCOMP
4
18
SGATE
ICM
5
17
BGATE
VREF
6
16
PHASE
CHLIM
7
15
UGATE
10
11
PGND
9
GND
8
12
13
14
BOOT
CELLS
VDDP
CSOP
LGATE
21
VADJ
1
ACLIM
EN
AN1297.0
April 10, 2007
Application Note 1297
What’s Inside
This Evaluation Board Kit contains the following materials:
• Qty(1) ISL625xEVAL2Z Evaluation Board
• Qty(1) ISL6255EVAL2Z Setup Procedure
What is Needed
The following materials are recommended to perform
testing:
• One adjustable 25V 6A power supply
Step 3: Select the Battery Charger Current Limit
(Table 3)
The CHLIM pin chooses the desired battery charger current
limit threshold. Preset battery charger current limit
thresholds are selected by placing a shunt jumper across the
appropriate pins of JP4. For other battery charger current
limit thresholds, install a shunt jumper across pins 3 and 4,
which connects the wiper of potentiometer R22 to CHLIM.
Potentiometer R22 may be removed and replaced with
resistors R6 and R7.
TABLE 3. JUMPER JP4 FUNCTIONS
• Two adjustable 6A constant current electronic loads
100% CURRENT
CHLIM PIN
SHUNT
FEEDBACK
JUMPER CONNECTED
CSOP TO CSON
TO:
LOCATION
• Two DVMs
• One 500MHz four channel oscilloscope
• Four passive oscilloscope voltage probes
• Two 10ADC Current Probes
• One Signal generator
Jumper Selection Guide
Step 1: Select the Number of Cells (Table 1)
The CELLS pin chooses the correct output voltage clamp for
a given number of cells series-connected in the battery pack.
Select the output voltage by placing a shunt jumper across
the appropriate pins of JP1.
TABLE 1. JUMPER JP1 FUNCTIONS
SHUNT
JUMPER
LOCATION
NUMBER OF
CELLS
CONNECTED
IN SERIES
CELLS PIN
CONNECTED
TO:
100%
CONSTANT
OUTPUT
VOLTAGE
1 to 2
VDD
4
16.8
2 to 3
GND
3
12.6
Removed
Floating
2
8.4
Step 2: Select the Cell Trim Voltage (Table 2)
The VADJ pin trims the battery charger output voltage limit.
Preset battery charger output voltage limits are selected by
placing a shunt jumper across the appropriate pins of JP6.
For other battery charger output voltage limits, install a shunt
jumper across pins 3 and 4, which connects the wiper of
potentiometer R24 to VADJ. Potentiometer R24 may be
removed and replaced with resistors R19 and R21. Resistor
R20 limits the trim increase to 1%. Shorting R20 allows the
trim to increase 5%. Decreasing trim range is unaffected.
1 to 3
VREF
120mV
4.80A
Removed
Floating
0V
0A
3 to 5
GND
0V
0A
3 to 4
R22 or R6/R7
0mV to 120mV
0A to 4.8A
Step 4: Select the AC Adapter Current Limit (Table 4)
The ACLIM pin chooses the desired AC adapter current limit
threshold. Preset AC adapter current limit thresholds are
selected by placing a shunt jumper across the appropriate
pins of JP5. For other AC adapter current limit thresholds,
install a shunt jumper across pins 3 and 4, which connects the
wiper of potentiometer R23 to ACLIM. Potentiometer R23 may
be removed and replaced with resistors R17 and R18.
TABLE 4. JUMPER JP5 FUNCTIONS
SHUNT
LOCATION
VADJ
PIN
1 to 3
Through R20 to VREF
+5%
3 to 5
To GND
-5%
5 to 6
Floating
None
3 to 4
R24 Wiper or R19/R21
3
Adjustable between
-5% to +5%
100%
ADAPTER
CURRENT
ACLIM PIN
CONNECTED
TO:
100% CURRENT
FEEDBACK
CSIP TO CSIN
1 to 3
VREF
100mV
5.15A
Removed
Floating
75mV
3.90A
SHUNT
JUMPER
LOCATION
3 to 5
GND
50mV
2.65A
3 to 4
R23 or R17/R18
50mV to 100mV
2.65A to
5.15A
Interface Connections
TABLE 5.
HEADER
PIN#
H1
INPUT POWER
1
TABLE 2. JUMPER JP6 FUNCTIONS
BATTERY
VOLTAGE CHANGE
PER CELL
100%
CONSTANT
CURRENT
H2
SYSTEM LOAD
OUTPUT
H3
BATTERY
CHARGER
OUTPUT
CONNECT TO
“+” INPUT POWER
2
“+” SENSE (if used)
3
“-” SENSE (if used)
4
“-” INPUT POWER
1
“+” SYSTEM LOAD OUTPUT
2
“+” SENSE (if used)
3
“-” SENSE (if used)
4
“-” SYSTEM LOAD OUTPUT
1
“+” BATTERY CHARGER OUTPUT
2
“+” SENSE (if used)
3
“-” SENSE (if used)
4
“-” BATTERY CHARGER OUTPUT
AN1297.0
April 10, 2007
ISL6255EVAL2Z Schematic
4
Application Note 1297
AN1297.0
April 10, 2007
Application Note 1297
TABLE 6. BILL OF MATERIALS
QTY
REF DES
1
C6
1
DESCRIPTION
MFG NAME
PART NUMBER
Capacitor, SMD, 0603, 100pF, 50V, 5%, COG
TDK
C1608COG1H101J
C7
Capacitor, SMD, 0805, 0.01µF, 50V, 5%, COG
TDK
C2012COG1H103J
1
C5
Capacitor, SMD, 0805, 6800pF, 50V, 5%, COG
TDK
C2012COG1H682J
3
C2, C4, C8
Capacitor, SMD, 0805, 1.0µF, 16V, 20%, X7R
TDK
C2012X7R1C105M
3
C3, C9, C10
Capacitor, SMD, 0805, 0.1µF, 50V, 10%, X7R
TDK
C2012X7R1H104K
2
C14, C15
Capacitor, SMD, 1812, 22µF, 25V, 20%, X5R
TDK
C4532X5R1E226M
1
L1
Choke, SMD, 8mm, 15µH, 20%, 5.65A, Shielded
Sumida
CDRH127/LD-150NC
1
U1
IC, Battery Charger, 24 Ld QSOP, -10°C to +100°C
Intersil
ISL6251HAZ
1
Q2
MOSFET, N-CH, 8P, SOIC, 30V, 8.4A, 0.022Ω
Fairchild
FDS6612A
1
Q1
MOSFET, N-CH, 8P, SOIC, 30V, 10.8A, 0.011Ω
IR
IRF7811AV
1
Q3
MOSFET, P-CH, SOIC, 30V, 13A, 0.014Ω
Siliconix
SI4413DY
1
Q4
MOSFET, P-CH, SOIC, 30V, 6A, 0.033Ω
Siliconix
SI4835BDY
1
Q5
MOSFET, P-CH, 3P, SOT23, -30V, -0.9A, 0.5Ω
Fairchild
NDS352AP
1
D1
DIODE SCHOTTKY 40V 10A POWERDI5
Diodes Inc.
PDS1040-13
1
D2
SURFACE MOUNT SCHOTTKY BARRIER DIODE
Diodes Inc
BAT54WT1
1
R2
Resistor, Shunt, SMD, 2010, 0.020Ω, 1W, 1%
IRC
LRC-LRF2010-01-R020-F
1
R1
Resistor, Shunt, SMD, 2010, 0.025Ω, 1W, 1%
IRC
LRC-LRF2010-01-R025-F
1
R13
Resistor, SMD, 0805, 18Ω, 0.125W, 5%
KOA
RK73B2AT180J
1
R12
Resistor, SMD, 0805, 2.2Ω, 0.125W, 5%
KOA
RK73B2AT2R2J
1
R15
Resistor, SMD, 0805, 4.7Ω, 0.125W, 5%
KOA
RK73B2AT4R7J
1
R14
Resistor, SMD, 0805, 10kΩ, 0.125W, 1%
KOA
RK73H2AT1002F
1
R11
Resistor, SMD, 0805, 7.87kΩ, 0.125W, 1%
KOA
RK73H2AT7871F
3
R3, R4, R8
Resistor, SMD, 0805, 100kΩ, 0.125W, 1%
KOA
RK73H2AT1003F
1
R20
Resistor, SMD, 0805, 33.2kΩ, 0.125W, 1%
KOA
RK73H2AT3322F
1
R16
Resistor, SMD, 0805, 0Ω, 2A, 50mΩ Max
KOA
RK73Z2AT
5
AN1297.0
April 10, 2007
Application Note 1297
FIGURE 1. TOP SILK
6
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Application Note 1297
FIGURE 2. TOP LAYER
7
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Application Note 1297
FIGURE 3. LAYER 2 GROUND
8
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Application Note 1297
FIGURE 4. LAYER 3 SIGNAL
9
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Application Note 1297
FIGURE 5. LAYER 4 GROUND
10
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Application Note 1297
FIGURE 6. LAYER 5 GROUND
11
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Application Note 1297
FIGURE 7. BOTTOM COPPER
12
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Application Note 1297
FIGURE 8. BOTTOM SILK
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
AN1297.0
April 10, 2007
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