an1279

Dual Switching Regulator Solution
Using the ISL6539
®
Application Note
October 30, 2006
AN1279.0
Author: Douglas Mattingly
Introduction
JUMPER SETTINGS
The ISL6539 is capable of providing a complete solution for
two independent switching regulators. The ISL6539 can be
configured to operate as a dual switching regulator or as a
DDR regulator. This application note will focus on the
ISL6539 configured as a dual switching regulator. For
information on the ISL6539 configured as a DDR regulator,
refer to either the datasheet[1] or to application note
AN1279.
There are four jumpers on the board. Jumper JP1 is used to
either enable or disable input voltage feed forward
compensation. Jumper JP2 can be used to monitor the
ISL6539 bias current by connecting an ammeter to the two
jumper pins. If the bias current is not being monitored, this
jumper must be shunted. Shunting jumper JP5 pulls the EN1
pin to VCC and is used to enable Channel 1. Shunting
jumper JP6 enables Channel 2. Jumper J7 can be used to
short the input rails of the two switching regulator channels.
Table 1 provides a detailed description of the jumper
descriptions and positions.
As a dual regulator, the ISL6539 provides control and
protection for two independent rails. The switching
frequency is fixed at 300kHz for both regulators. The two
channels can be phase shifted 180° in order to minimize
interaction. The ISL6539 incorporates voltage-feed-forward
ramp modulation, current mode control, and internal
feedback compensation which provides fast response to
input voltage and output load transients. A PGOOD signal
also is provided for both channels.
JUMPER
JP1
POSITION
FUNCTION
Toward
VINPRG*
This will tie VIN pin to the input voltage for
feed forward compensation.
Away from
VINPRG
This will tie VIN pin to GND, disabling
input voltage feed forward compensation.
Shunted*
An ammeter may be connected across
these pins to measure IC and GATE Drive
current
JP2
Protection features include under-voltage and over-voltage
protection as well as a programmable over-current
protection feature that utilizes the rDS(ON) of the lower
MOSFET. A more complete description of the ISL6539 can
be found in the datasheet.
JP5
JP6
Quick Start Evaluation
The ISL6539EVAL2 board is shipped ‘ready to use’ right
from the box. The box includes this application note, the
ISL6539 datasheet, and the evaluation board.
The evaluation board supports testing with laboratory power
supplies. Both regulated outputs can be exercised through
external loads. There are posts available on the two
regulated output rails for drawing a load and/or monitoring
the voltages. Two LEDs indicates the status of the individual
channel PGOOD signals. There are also four scope probe
points that allow for in depth analysis. Four jumpers have
also been provided for control and monitoring purposes.
Recommended Test Equipment
To test the full functionality of the ISL6539, the following
equipment is recommended:
• Two laboratory power supplies
JP7
Shunted*
CH1 enabled
Removed
CH1 disabled
Shunted*
CH2 enabled
Removed
CH2 disabled
Shunted*
The input rails for Channel 1 and Channel
2 are unified
Removed
The input rails for Channel 1 and Channel
2 are independent
* Denotes default configuration
TABLE 1. DETAILED DESCRIPTION OF THE JUMPER
SETTINGS
CONNECTING LOADS
Both regulated output rails are capable of both sourcing load
current and sinking load current. Follow the directions below
for the proper method of loading each rail.
Loading VOUT1 - Sourcing Current: This is the output rail of
the Channel 1 regulator. Connect the positive terminal of an
electronic load to the VOUT1 post (J5). Connect the return
terminal of the same load to the adjacent GND post (J8).
Loading VOUT1 - Sinking Current: To test this channel while
the regulator sinks current, connect the positive terminal of
an electronic load to the VIN1 post (J3). Connect the return
terminal of the same load to the VOUT1 post (J5).
• Two Electronic Loads
• Four-channel Oscilloscope with probes
• Precision Digital Multimeters
CAUTION: The return terminal of the load must float for this
to work properly.
CIRCUIT SET UP
Refer to Figure 1 for locations of the jumpers, connectors
and components described in the following sections.
1
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All other trademarks mentioned are the property of their respective owners.
Application Note 1279
Shorting these two pins enables
input voltage feed forward
compensation.
Phase Angle
and
Voltage Feed forward
Jumper Positions
Shorting these two pins disables
input voltage feed forward
compensation.
This jumper is
used to create a
unified input rail
for Ch1 and Ch2
Posts for connecting
Power, Ground, Load,
and Probes.
This jumper can be
used to monitor bias
current to the ISL6539
PGOOD1 status LED
Shorting this jumper
enables Channel 1
PGOOD2 status LED
Shorting this jumper
enables Channel 2
Four Probe points
available for
monitoring VOUT1,
VOUT2, and both
Phase nodes
Total Solution Area
ISL6539 IC
FIGURE 1. ISL6539EVAL1 BOARD
Loading VOUT2 - Sourcing Current: This is the output rail of
the Channel 1 regulator. Connect the positive terminal of an
electronic load to the VOUT2 post (J6). Connect the return
terminal of the same load to the adjacent GND post (J7).
TYPE
VOLTAGE
LOCATION
POST
VOUT1
J5
VOUT2
J6
VPGOOD1
J10
VPGOOD2
J13
VCC
J4
VEN1
J11
VEN2
J12
VIN1
J3
VIN2
J2
GND
J1, J7, J8, J9, J14
VOUT1
TP2
VOUT2
TP1
VPHASE1
TP4
VPHASE2
TP3
Loading VOUT2 - Sinking Current: To test this channel while
the regulator sinks current, connect the positive terminal of
an electronic load to the VIN2 post (J2). Connect the return
terminal of the same load to the VOUT2 post (J6).
CAUTION: The return terminal of the load must float for this
to work properly.
CONNECTING PROBES
Table 2 lists all the locations available for monitoring. The
scope probe test points provide a low impedance ground
connection and all GND posts can be utilized as a ground
connection for probes.
SCOPE PROBE TEST
POINT
TABLE 2. PROBE TYPES AND LOCATIONS
2
Application Note 1279
CONNECTING POWER
EXAMINE WAVEFORMS
Prior to connecting the power supplies to the evaluation
board, the power supplies should either be turned off or the
outputs should be disabled.
Start up is immediate following Power On Reset (POR).
Using an oscilloscope or other laboratory equipment, the
ramp-up and/or regulation of the outputs and other aspects
of the regulator operations can be studied. Loading of the
outputs can be accomplished through the use of electronic
loads. Any other method, however, will work as well.
VCC Power Connection: Connect the positive terminal of a
laboratory power supply to the VCC post (J4). Connect the
return terminal of the same load to the adjacent GND post
(J14). The VCC voltage should be 5V.
VIN1 Power Connection: Connect the positive terminal of a
laboratory power supply to the VIN1 post (J3). Connect the
return terminal of the same load to the adjacent GND post
(J1). This supply can be set from a minimum of 1.2*VOUT1
to a maximum of 18V.
VIN2 Power Connection: Connect the positive terminal of a
laboratory power supply to the VIN2 post (J2). Connect the
return terminal of the same load to the adjacent GND post
(J14). This supply can be set from a minimum of 1.2*VOUT2
to a maximum of 18V.
If Jumper JP7 is shorted, then only apply voltage at one of
the input voltage posts. It should be noted that a single 5V
supply can be used to apply power to all three of these rails
simultaneously.
Operation
Evaluation Board Design
General
The evaluation board is built on a 2-ounce, four layer printed
circuit board. The board is designed to support a continuous
load of 5A on both regulated output rails while operating at
room temperature and under natural convection cooling.
The schematic, bill of material, and the layout plots for the
ISL6539EVAL1 evaluation board on provided at the end of
this application note.
Eval Board Performance
Power Up
When the VCC voltage exceeds the POR level, the ISL6539
will begin the soft-start procedure. Figure 2 shows the
startup of both regulated rails from POR.
ENABLING REGULATORS
The two switching regulators can be enabled by simply
shorting jumpers J5 and J6 to enable Channels 1 and 2,
respectively. Alternatively, with the jumpers left open, an
external signal generator can be used to enable either
channel through the EN1 post (J11) or the EN2 post (J12).
VIN
1V/DIV
VOUT1
1V/DIV
APPLY POWER
The VIN power supplies must be turned on or enabled prior
to turning on or enabling the VCC power supply. Likewise,
they must always be disabled or turned off after disabling or
turning of the VCC power supply. This rule does not apply if
the VIN rails are to be supplied via the same power supply
that is providing VCC.
The PGOOD status LEDs will give a visual indication of the
VOUT1 and VOUT2 regulator levels. Table 3 describes the
two states of the LEDs.
LED
CONDITION
Green
CR1
Red
Green
CR1
Red
RESULT
VOUT1 WITHIN PGOOD RANGE
VOUT1 OUTSIDE PGOOD
RANGE
VOUT2 WITHIN PGOOD RANGE
VOUT1 OUTSIDE PGOOD
RANGE
TABLE 3. PGOOD STATUS LED CONDITION INDICATOR
3
VOUT2
1V/DIV
TIMEBASE: 2µs/DIV
FIGURE 2. POR SOFT-START, VIN1 = VIN2 = VCC
Application Note 1279
Figure 3 shows the start up of both regulators via their
respective enable inputs. Figure 3 also shows how the
ISL6539 is capable of starting into a prebiased output rail.
The VOUT1 rail has a 1V prebias prior to the enable being
pulled high.
Transient Performance
Figure 5 shows the response of the regulators while each is
being stressed by a separate transient load. This instance is
shown with a unified input rail.
VOUT1
VIN
1V/DIV
1V/DIV
ILOAD1
VEN
5V/DIV
2A/DIV
VOUT1
1V/DIV
VOUT2
VOUT2
1V/DIV
1V/DIV
ILOAD2
2A/DIV
TIMEBASE: 200µs/DIV
TIMEBASE: 500µs/DIV
FIGURE 3. ENABLED SOFT-START, VIN1 = VIN2 = VCC
FIGURE 5. TRANSIENT LOAD ON VOUT1 AND VOUT2,
VIN1 = VIN2
Output Ripple
Efficiency
Figure 4 shows the ripple on both the regulator outputs. This
capture illustrates the 180° phase shift between the two
regulators.
Figure 6 shows the efficiency of the individual regulators.
These efficiencies were measured while the complementary
regulator was disabled. The power dissipation of the
ISL6539 is not included in the efficiency curves.
98%
VOUT1
10mV/DIV
VPHASE1
5V/DIV
96%
94%
92%
90%
VOUT1 w/VIN=5V
VOUT1 w/VIN=15V
VOUT2 w/VIN=5V
VOUT2 w/VIN=15V
88%
VPHASE2
VOUT2
5V/DIV
10mV/DIV
86%
84%
0
1
2
3
Load Current [A]
TIMEBASE: 2µs/DIV
FIGURE 4. OUTPUT RIPPLE - 90° PHASE SHIFT, VIN1 = VIN2
4
FIGURE 6. EFFICIENCY
4
5
Application Note 1279
ISL6539EVAL2 Customization
Conclusion
There are numerous ways in which a designer might modify
the ISL6539EVAL2 evaluation board for differing
requirements. Some of the changes which are possible
include:
The ISL6539EVAL2 is a versatile platform that allows
designers to gain a full understanding of the functionality of
the ISL6539 when serving as a dual voltage regulator. The
board is also flexible enough to allow the designer to modify
the board for differing requirements. The following pages
provide a schematic, bill of materials, and layout drawings to
support implementation of this solution.
• The output inductors, L1 and L2, for the VOUT1 and
VOUT2 regulators, respectively.
• The input capacitance may be changed. The evaluation
board is shipped with two 10µF ceramic capacitors, C2
and C3, as the input capacitance. A spot has been set
aside for the installation of a 10mm diameter through hole
aluminum electrolytic capacitor in location C1.
• The output capacitance of either regulator may be
modified. The evaluation board is shipped with one 220µF
capacitor on the output of each regulator. There are two
empty locations, C12 and C13, available for the VOUT1
regulator and two empty locations, C14 and C15, available
for the VOUT2 regulator.
• The overcurrent trip point of both the VOUT1 and VOUT2
regulators, programmed through the OCSET resistors,
R10 and R11, respectively. Refer to the ISL6539
datasheet for details on this.
• Changing the value of C18 and C19 will alter the rise time
of the outputs during soft-start. Refer to the ISL6539
datasheet for details on this.
• The load capacity for either rail can be increased by
exchanging the MOSFETs, U2 and U3, for ones with
higher current handling capabilities. The ISEN resistor
values, R4 and R5, may need to be modified if this is
done. The overcurrent resistor values, R10 and R11,
would also have to be reviewed. Refer to the ISL6539
datasheet for details on calculating the values of these
resistors.
• The output voltage of the VOUT1 regulator may be
modified by changing resistor R12 and the output voltage
of VOUT2 may be modified by changing resistor R13.
Refer to the ISL6539 datasheet for details on this.
5
References
For Intersil documents available on the web, see
http://www.intersil.com/
[1] ISL6539 Data Sheet, Intersil Corporation, File No.
FN9144.
Application Note 1279
ISL6539EVAL2 Schematic
JP7
VIN2
JP1
VIN1
R1
JP2
VCC
U1
R2
C8
C2
C1
6
5
4
L1
VOUT1
C7
C23
R4
7
2
R7
C12,13,22
U2
3
C17
R8
10
28
BOOT1
VCC
14
D1
VIN
C4
BOOT2
ISL6539
UGATE1 UGATE2
PHASE1 PHASE2
ISEN1
ISEN2
LGATE1 LGATE2
PGND1
PGND2
VSEN1
VSEN2
C10
28
C9
R10
25
22
L2
R5
27
R6
JP5
R18
VOUT2
C6
C21
C16
R9
19
R13
SOFT1
SOFT2
C11
17
R11
C21
8
VCC
C14,15,20
U3
26
C20
R15
C3
24
OCSET1 OCSET2
12
R14
R3
18
11
R12
D2
C5
EN2
EN2
JP6
21
R20
VCC
R21
R19
CR1
R16
R17
CR2
J12
J11
PG1
GND
15
1,9,20
6
PG2/REF
DDR
Q1
13
16
Q2
Application Note 1279
ISL6539EVAL2 Bill of Materials (BOM)
QTY
REFERENCE
2
C2, C3
1
C4
3
DESCRIPTION
VENDOR
MFG. PART NO.
CAPACITOR, SMD, 1812, 10µF, 25V, 20%, X5R
TAIYO YUDEN
TMK432BJ106MM
CAPACITOR TANT, LOW ESR, SMD, D, 68µF, 16V, 10%
KEMET
T494D686K016AS
C5, C21, C23
CAPACITOR, SMD,1206, 4.7µF, 10V, 10%, X7R
VENKEL
C1206X7R100475KNE
2
C6, C7
CAPACITOR, SMD, 1206, 1µF, 10V, 10%, X7R
KEMET
C1206C105K8RAC
2
C8, C9
CAPACITOR, SMD, 0805, 0.15µF, 25V, 10%, X7R
PANASONIC
ECJ-2YB1E154K
4
C10, C11, C18, C19
CAPACITOR, SMD, 0805, 0.01µF, 50V, 10%, X7R
PANASONIC
ECJ-2VB1H103K
2
C20, C22
CAPACITOR TANT, LOW ESR, SMD, D2, 220µF, 4V, 20% SANYO
4TPC220M
2
CR1, CR2
LED, SMD, 3x2.5mm, 4P, RED/GRN,12/20MCD, 2V
LUMEX
SSL-LXA3025IGC-TR
2
D1, D2
DIODE-SCHOTTKY, SMD, SOT323, 3P, 30V, 0.2A
ON-SEMICONDUCTOR BAT54WT1-T
2
L1, L2
COIL-PWR INDUCTOR, SMD, 12mm, 4.7µH,20%, 5.7
SUMIDA
2
Q1, Q2
TRANSISTOR, N-CHANNEL, 3P, SOT23,100V, 0.17A
ON-SEMICONDUCTOR BSS123LT1-T
3
R1, R10, R11
RESISTOR, SMD, 0805, 100k, 1/10W, 1%, TF
PANASONIC
ERJ-6ENF1003V
2
R2, R3
RESISTOR, SMD, 0805, 0Ω, 1/10W, TF
PANASONIC
ERJ-6GEY0R00V
2
R4, R5
RESISTOR, SMD, 0805, 2k, 1/10W, 1%, TF
PANASONIC
ERJ-6ENF2001V
1
R8
RESISTOR, SMD, 0805, 17.8k, 1/10W, 1%, TF
PANASONIC
ERJ-6ENF1782V
PANASONIC
ERJ-6ENF1002V
PANASONIC
ERJ-6GEYJ681V
5
R9, R12, R13, R20, R21 RESISTOR, SMD, 0805, 10k, 1/10W, 1%, TF
6
R14 - R19
1
U1
2
U2, U3
RESISTOR, SMD, 0805, 680Ω, 1/10W, 5%, TF
7
CDRH124-4R7MC
IC, DUAL SWITCHER, 30V, 28PIN, QSOP, DDR OPTION INTERSIL
ISL6539CA
MOSFET, DUAL, N-CHANNEL, LOGIC, 8P, SOIC, 30V, 6A FAIRCHILD
FDS6912A
Application Note 1279
ISL6539EVAL2 Printed Circuit Board Layers
ISL6539EVAL2 - TOP SILK SCREEN AND SOLDERMASK
VIN1
VIN2
VCC
VCC
PHASE1
PHASE2
VOUT1
VOUT2
GND
ISL6539EVAL2 - TOP COPPER LAYER
8
Application Note 1279
ISL6539EVAL2 Printed Circuit Board Layers (Continued)
ISL6539EVAL2 - LAYER 2 - GROUND
VCC
GND
VOUT2
VOUT1
ISL6539EVAL2 - LAYER 3 - POWER
9
Application Note 1279
ISL6539EVAL2 Printed Circuit Board Layers (Continued)
VIN1
VIN2
GND
GND
PHASE1
PHASE2
VOUT1
VOUT2
ISL6539EVAL2 - BOTTOM LAYER
ISL6539EVAL2 - BOTTOM SILK SCREEN AND SOLDER MASK
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
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