Application Note 1260 ISL9214AEVAL1Z Evaluation Board Application Manual Description Features The ISL9214AEVAL1Z is an evaluation tool for the ISL9214A single-cell Li-ion battery charger. The evaluation tool provides a complete evaluation platform addressing all data sheet specifications and functionality. The jumpers on the board facilitate the programming of the charge current and the different charging conditions and can be used to make other necessary connections, such as current measurement. • A Complete Evaluation Platform for the ISL9214A Charger The ISL9214A is a dual input, fully integrated single-cell Li-ion battery charger. The ISL9214A charger accepts two input sources: one from a USB port and the other from a desktop cradle. Both inputs accept input voltages ranging from 4.5V up to 28V. Due to the high voltage capability, the components associated with the cradle input circuit on the evaluation board are good for a 28V supply. • USB Port On Board Accepts Power Directly From USB Cable The components assembled in the center square constitute a complete charger, indicating the space saving advantage of the typical ISL9214A installation in space-limited applications. • The Center Square Suggesting the Space Saving Advantage of the Typical Components Assembly • Both Inputs Accept Voltage up to 28V • Flexible Power Connectors Each with a Hook and a Solder Pad Providing Variety to Users • Convenient Jumpers for Programming the Charge Current, Charge Mode and for Current Measurement • 3.5x2.5 Square Inches Board Size Handy for Evaluation • Thermal Vias in the Thermal Pad Similar To Customers’ Thermally Enhanced Environment • On-Board LEDs for Input PPR and CHG State Indication • Pb-Free (RoHS Compliant) What is Needed Ordering Information PART # DESCRIPTION ISL9214AEVAL1Z Evaluation Board for ISL9214A Pin Configuration ISL9214A 10 LD DFN TOP VIEW The following instruments will be needed to perform testing: • Power supplies: 1) PS1: DC 30V/2A 2) PS2: DC 10V/2A 3) PS3: DC 10V/2A • DC Electronic load: 20V/2A • Multimeters • Function generator CRDL 1 10 BAT USB 2 9 ICDL PPR 3 8 GND CHG 4 7 USBON EN 5 6 IMIN January 26, 2010 AN1260.1 1 • Oscilloscope • Cables and wires CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1260 Quick Setup Guide (Refer to Figure 1) DO NOT APPLY POWER UNTIL STEP 6 For Cradle Input: For USB Input: Step 1: Connect a 5V supply PS1 to CRDL input (J1, upper +) with the current limit set at 1.3A Step 1: Connect a 5V supply PS2 to USB with the current limit set at 0.7A Step 2: Step 2: Connect a 3.7V supply PS3 to BAT output (J3, upper +) with the current limit set at 1.3A Connect a 3.7V supply PS3 to BAT (J3 upper +) with the current limit set at 0.7A Step 3: Connect the DC electronic load of 0.6A to BAT (upper +) Step 3: Connect a current meter to JP6, as shown in Figure 1 Step 4: Connect a current meter to JP6 as shown in Figure 1 Step 4: Connect the DC electronic load of 1.2A to BAT (J3, upper +) Step 5: Step 5: Insert a jumper shunt on JP1, all other jumper shunts are not installed Install a jumper shunt on JP2 and a jumper shunt on JP4 to the USBON position, all other jumpers shunts are not installed Step 6: Turn on Power Supplies and DC electronic load, adjust the power supply PS3 such that the voltmeter V2 reads 3.7V Step 6: Turn on Power Supplies and DC electronic load, adjust the power supply PS3 such that the voltmeter V2 reads 3.7V Step 7: Both the red and the green LEDs should be on, indicating power on and charging condition Step 7: Both the red and the green LEDs should be on, indicating power on and charging condition Step 8: The current meter I2 should read about 0.28A as the charging current Step 8: The current meter I2 should read about 0.38A charging current Step 9: Insert a jumper shunt on JP7 and the current meter I2 should read about 0.575A charging current Step 9: Reduce the voltage at PS3 to 2.0V for trickle charge current. Repeat Step 8. The reading should be around 80mA Step 10: Insert a jumper shunt on both JP7 and JP8, the current meter I2 should read about 1.04A charging current Step 11: Reduce the voltage at PS3 to 2.0V for trickle charge currents. Repeat Steps 8, 9 and 10. The current reading should be 52mA,103mA and 187mA for steps 8, 9 and 10, respectively Step 10: Slowly reduce the electronic load current until the green LED turns off, the current meter I2 should read about 55mA EOC current Step 11: Insert a jumper shunt on JP5 and repeat Step 10. The current meter I2 should read 75mA EOC current Step 12: Slowly reduce the DC electronic load current until the green LED turns off. The current meter I2 should read about 47mA EOC current Step 13: Insert a jumper shunt on JP5 and repeat Step 12, the current meter I2 should read 93mA EOC current 2 AN1260.1 January 26, 2010 Application Note 1260 I1 I2 PS3 PS1 - + + + - - E-LOAD PS2 - + FIGURE 1. CONNECTION OF INSTRUMENTS Description of Jumper Settings JP1 - A shunt installed on JP1 connects the input source from connector J1 to the circuit if input current measurement is not needed. The shunt can be replaced by a current meter if input current measurement is needed, as shown in Figure 1. JP2 - A shunt installed on JP2 connects the input source from the USB port connector to the USB pin if a USB port is used for the evaluation. JP3 - Connects the EN pin to a pull-up voltage or GND. The pull-up voltage is regulated 3.3V from the input source (either Cradle or USB). If there is no shunt installed on JP3, the EN pin is internally pulled down to logic LOW, which enables the charger. If a shunt is installed across the two jumper pins labeled as “Enable”, the EN pin is driven to logic LOW, the charger is enabled, same as floating. If the shunt is installed across the two jumper pins labeled as “Disable”, the EN pin is driven to logic HIGH, which disables the charger. Current will be increased to 93mA (RIMIN is 11.8k and the EOC current is 46.5mA without the shunt). JP6 - A shunt installed on JP6 connects the BAT pin to the output connector J3 if output current measurement is not needed. The shunt can be replaced by a current meter if output current measurement is needed as shown in Figure 1. JP7 - Parallels an additional 23.7k resistor to the ICDL pin (total RICDL = 11.85k), such that the cradle charge current will be increased to 0.575A (RIREF is 23.7k and the charge current is 0.28A if the shunts on both JP7 and JP8 are removed). JP8 - Parallels an additional 14.7k resistor to the ICDL pin (when JP7 is installed, total RICDL = 6.56k), such that the cradle charge current will be increased to 1.04A. JP4 - ON/OFF control for USB input. Install a jumper shunt on USB OFF position to turn off the USB charge but has no impact on the cradle input charge. JP5 - Parallels an additional 11.8k resistor to the IMIN pin (total RIMIN = 5.9k), such that the End-of-Charge 3 AN1260.1 January 26, 2010 Application Note 1260 TABLE 1. JUMPER SETTING SUMMARY JUMPER POSITION FUNCTION JP1 Shunt installed Connects input source at J1 to CRDL pin JP2 Shunt installed Connects input source from USB port connector to USB pin Shunt on Disable Charger disabled Shunt on Enable Charger enabled Shunt not installed Charger enabled Shunt on USB OFF Turns off USB charge Shunt on USB ON Turns on USB charge Shunt not installed Turns off USB charge JP5 Shunt installed Sets CRDL and USB EOC current to 93mA JP6 Shunt installed Connects BAT to J3 Shunt installed Sets CRDL charging current to 0.575A, if shunt on JP7 is not installed Shunt installed Sets CRDL charging current to 1.04A, if shunt on JP7 is also installed JP3 JP4 JP7 JP8 Board Design 1 2 CRDL C1 4.7µF, 35V JP1 J2 1 2 D1 USB JP2 R9 1 D2 C2 4.7µF, 35V R1 3.3k C10 0.1µF C4 0.1µF C6 0.1µF Q1 C5 D3 4.1V D4 C3 1µF C9 0.1µF R3 470 R2 470 0.1µF D5 JP6 VBAT PPR 1 2 3 4 5 JP3 J3 U1 CRDL BAT 10 USB ICDL 9 GND 8 PPR CHG USBON 7 EN IMIN 6 ICDL JP5 ISL9214 EN USBON 1 2 IMIN JP7 JP8 C7 C8 10µF 47µF JP4 R7 R4 11.8k 11.8k CHG R5 23.7k R6 23.7k R8 14.7k GND FIGURE 2. SCHEMATIC 4 AN1260.1 January 26, 2010 Application Note 1260 ISL9214AEVAL1Z Bill of Materials ITEM QTY REFERENCE PART DESCRIPTION 1 1 U1 ISL9214A Charger 2 1 R1 3.3k, 5%, SMD Resistor 3 2 R2, R3 4 1 5 PCB FOOTPRINT 3x3 DFN PART NUMBER VENDOR ISL9214A Intersil 0805 ERJ-6GEYJ332V Panasonic 470Ω, 5%, SMD Resistor 0805 ERJ-6GEYJ471V Panasonic R4 11.8k, 1%, SMD Resistor 0805 ERJ-6ENF1182V Panasonic 1 R7 11.8k,1%, SMD Resistor 0402 ERJ-2RKF1182X Panasonic 6 1 R5 23.7k, 1%, SMD Resistor 0402 ERJ-2RKF2372X Panasonic 7 1 R6 23.7k, 1%, SMD Resistor 8085 ERJ-6ENF2372V Panasonic 8 1 R8 14.7k, 1%, SMD Resistor 0805 ERJ-6ENF1472V Panasonic 9 1 R9 0Ω 5%, SMD Resistor 0805 9C08052A0R00JLHFT Yageo 10 2 C1, C2 4.7µF, 35V, Tantalum 0805 ECS-T1VC475R Panasonic 11 2 C9, C10 0.1µF, 50V, X7R Ceramic 0805 C2012X7R1H104K TDK 12 1 C7 10µF, 6.3V Tantalum 1206 ECS-T0JY106R Panasonic 13 1 C8 47µF, 6.3V, X5R Ceramic 1210 ECJ-4YB0J476M Panasonic 14 1 C3 1µF, 25V, X5R Ceramic 0805 ECJ-2FB1E105K Panasonic 15 3 C4, C5, C6 0.01µF, 50V, X7R Ceramic 0402 C0402C103K5RACTU Kemet 16 2 J1, J3 2.54mm Center Header, 2 CKT 22-11-2022 Molex 17 3 CRDL, USB, VBAT Test point, Red 5010 Keystone 18 6 5014 Keystone Test point, Black 5011 Keystone PPR, CHG, EN, IMIN, USBON Test point, Yellow ICDL 19 3 GND1, GND2, GND3 20 6 JP1, JP2, JP5, JP6, JP7, JP8 2.54mm header, 2 CKT 22-28-4020 Molex 21 2 JP3, JP4 2.54mm header, 3 CKT 22-28-4030 Molex 22 1 D4 Green LED 0805 SML-LXT0805GW-TR Lumex 23 1 D5 Red LED 0805 SML-LXT0805IW-TR Lumex 24 2 D1, D2 25 1 26 Switching Diode 100V, 250mA SOD-523 CMOD4448 Central Diodes D3 Zener diode 4.3V, 200mW SOD-323 MMSZ5229BS Diodes 1 Q1 60V, 1A, NPN Transistor SOT-23 FMMT491TA Zetex 27 1 J2 Type B, Female USB Type B 787780-1 Amp/Tyco 28 4 SJ-5303 3M/ESM Pumpon, 0.44x0.2, black 5 AN1260.1 January 26, 2010 Application Note 1260 PCB Layout FIGURE 3. SILK LAYER FIGURE 4. TOP LAYER 6 AN1260.1 January 26, 2010 Application Note 1260 PCB Layout (Continued) FIGURE 5. BOTTOM LAYER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 7 AN1260.1 January 26, 2010