LT1027LS8 - Precision, Low Noise, High Stability Hermetic Voltage Reference

LT1027LS8
Precision, Low Noise,
High Stability Hermetic
Voltage Reference
Description
Features
Hermetic 5mm × 5mm LCC Leadless Chip Carrier
Package:
nn Insensitive to Humidity
nn Thermal Hysteresis: 8ppm (0°C to 70°C)
nn Thermal Hysteresis: 12ppm (–40°C to 85°C)
nn Low Drift: 5ppm/°C Max
nn High Accuracy: ±0.10% Max
nn Low Noise: <1ppm Peak-to-Peak (0.1Hz to 10Hz)
nn Low Long Term Drift
nn 12ppm at 1000Hr
nn 18ppm at 3000Hr
nn Sinks 10mA, Sources 15mA
nn Wide Supply Range to 40V
nn 8-Pin (5mm × 5mm) LS8 Package
The LT®1027LS8 is a precision reference that combines
low drift and noise with excellent long-term stability and
high output accuracy. The reference output will source up
to 15mA and sink up to 10mA, and remain constant with
input voltage variations.
nn
The hermetic package provides outstanding humidity and
thermal hysteresis performance. The LT1027LS8 is only
5mm × 5mm × 1.5mm, offering an alternative to large
through-hole metal can voltage references, such as the
industry standard LT1021. The LT1027LS8 offers similar
performance to the LT1027, with additional stability from
the hermetic package.
LT1027LS8 is based on a buried Zener diode structure,
which enables temperature and time stability, and extremely low noise performance of < 1ppm peak-to-peak.
The LT1027LS8 operates on a supply voltage from 8V up
to 40V. The subsurface Zener exhibits better time stability
than even the best bandgap reference, and the hermetic
package maintains that stability over a wide range of
environmental conditions.
Applications
Instrumentation and Test Equipment
High Resolution Data Acquisition Systems
nn A/D and D/A Converters
nn Precision Regulators
nn Precision Scales
nn Digital Voltmeters
nn
nn
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
Supplying VREF and VCC to the LTC1290 12-Bit ADC
Output Voltage Temperature Drift
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
ANALOG
INPUTS
8V TO 40V
VIN
+
2.2µF
LT1027LS8
GND
SCLK
ACLK
DOUT
DIN
CS
TO µC
LTC1290
REF +
VOUT
VTRIM
VCC
10k
+
REF –
22µF
AGND
V–
DGND
OUTPUT VOLTAGE (V)
5.010
5.005
5.000
4.995
4.990
–40 –25
0
25
50
TEMPERATURE (°C)
75 85
1027LS8 TA01b
1027LS8 TA01a
1027ls8f
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1
LT1027LS8
Absolute Maximum Ratings
Pin Configuration
(Note 1)
Input Voltage..............................................................40V
Input/Output Voltage Differential...............................35V
Output to Ground Voltage............................................7V
V TRIM to Ground Voltage
Positive....................................................................5V
Negative..............................................................–0.3V
Output Short-Circuit Duration
VIN > 20V...........................................................10 sec
VIN ≤ 20V...................................................... Indefinite
Operating Temperature Range
LT1027C.................................................... 0°C to 70°C
LT1027I.................................................– 40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
TOP VIEW
VIN
NR
1
VOUT
2
VTRIM
3
8
4
7
NC*
6
NC*
5
NC*
GND
LS8 PACKAGE
8-PIN LEADLESS CHIP CARRIER (5mm × 5mm)
*CONNECTED INTERNALLY.
D0 NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
**SEE APPLICATIONS
INFORMATION SECTION
TJMAX = 125°C, θJA = 120°C/W
PACKAGE LID IS GND
Order Information
(http://www.linear.com/product/LT1027LS8#orderinfo)
LEAD FREE FINISH
PART MARKING
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LT1027DCLS8-5#PBF
10275
8-Lead Ceramic LCC 5mm × 5mm
0°C to 70°C
LT1027DILS8-5#PBF
10275
8-Lead Ceramic LCC 5mm × 5mm
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
2
1027ls8f
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LT1027LS8
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, ILOAD = 0A unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
VOUT
Output Voltage (Note 2)
TCVOUT
Output Voltage Temperature Coefficient (Note 3)
MIN
TYP
MAX
UNITS
4.995
5.000
5.005
V
2
5
ppm/°C
6
12
25
ppm/V
ppm/V
3
6
8
ppm/V
ppm/V
8
12
15
15
ppm/mA
ppm/mA
ppm/mA
30
120
160
ppm/mA
ppm/mA
2.2
3.1
3.5
mA
mA
l
8V ≤ VIN ≤ 10V
Line Regulation (Note 4)
l
10V ≤ VIN ≤ 40V
l
Load Regulation (Notes 4, 6)
Sourcing Current
0 ≤ IOUT ≤ 15mA, 0°C to 85°C
0 ≤ IOUT ≤ 5mA, –40°C
l
Sinking Current 0 ≤ IOUT ≤ 10mA
0°C to 85°C
–40°C
l
–8
–10
–10
Supply Current
l
VTRIM Adjust Range
en
l
±30
±50
mV
Output Noise (Note 5)
0.1Hz ≤ f ≤ 10Hz
3
10Hz ≤ f ≤ 1kHz
2.0
Long-Term Stability of Output Voltage (Note 7)
∆t = First 1000Hrs
∆t = First 3000Hrs
12
18
ppm
ppm
Temperature Hysteresis of Output (Note 8)
∆T = ±25°C
∆T = 0°C to 70°C
∆T = –40°C to 85°C
6
8
12
ppm
ppm
ppm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Output voltage is measured immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 3: Temperature coefficient is measured by dividing the change in
output voltage over the temperature range by the change in temperature.
Note 4: Line and load regulation are measured on a pulse basis. Output
changes due to die temperature change must be taken into account
separately.
Note 5: RMS noise is measured with an 8-pole bandpass filter with a
center frequency of 30Hz and a Q of 1.5. The filter output is then rectified
and integrated for a fixed time period, resulting in an average, as opposed
to RMS voltage. A correction factor is used to convert average to RMS.
This value is then used to obtain RMS noise voltage in the 10Hz to 1000Hz
frequency band. This test also screens for low frequency “popcorn” noise
within the bandwidth of the filter.
Note 6: Devices typically exhibit a slight negative DC output impedance of
–0.015Ω. This compensates for PC trace resistance, improving regulation
at the load.
µVP-P
6.0
µVRMS
Note 7: Long-term stability typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the first thousand hours, with a continuing trend toward
reduced drift with time. Significant improvement in long-term drift can be
realized by preconditioning the IC with a 100-200 hour, 125°C burn in.
Long term stability will also be affected by differential stresses between
the IC and the board material created during board assembly. Temperature
cycling and baking of completed boards is often used to reduce these
stresses in critical applications.
Note 8: Hysteresis in output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to high or low temperature before successive measurements.
Hysteresis is roughly proportional to the square of temperature change.
Hysteresis is not normally a problem for operational temperature
excursions, but can be significant in critical narrow temperature range
applications where the instrument might be stored at high or low
temperatures. Hysteresis measurements are preconditioned by one
temperature cycle.
1027ls8f
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3
LT1027LS8
Typical Performance Characteristics
Ripple Rejection
Output Impedance vs Frequency
100
100
OUTPUT IMPEDANCE (Ω)
REJECTION (dB)
110
100
90
80
70
60
50
∆I = 3mA AC
ISOURCE = 5mA
10
OUTPUT VOLTAGE (V)
VIN = 10V
120
Output Voltage Temperature Drift
5.010
1
0.1
5.005
5.000
4.995
0.01
10
100
1k
FREQUENCY (Hz)
10k
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
4.990
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
1027LS8 G03
1027LS8 G01
1027LS8 G02
Start-Up and Turn-Off (No Load)
Start-Up and Turn-Off
Quiescent Current
2.5
VOUT
1V/DIV
VIN
10V
VIN
RL = 1k, CL = 4.7µF
10V
1µs/DIV
1027LS8 G04
1027LS8 G05
500µs/DIV
SUPPLY CURRENT (mA)
2.0
VOUT
1V/DIV
1.5
1.0
0.5
0
0
5
10
15 20
25 30
INPUT VOLTAGE (V)
35
40
1027LS8 G06
Output Short-Circuit Current
vs Temperature
Load Regulation
500
20
0
–400
–800
–1200
SOURCING
15
10
CHANGE IN OUTPUT VOLTAGE (µV)
400
SHORT–CIRCUIT CURRENT (mA)
CHANGE IN OUTPUT VOLTAGE (µV)
Line Regulation
25
800
VIN = 10V
VOUT = 5V
5
0
–5
–10
–15
SINKING
1027LS8 G07
4
–25
–50
200
100
0
–100
–200
–300
–400
–20
–1600
–10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 16
Sink Source
IOUT (mA)
400
300
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
1027LS8 G08
–500
8
12
16
20 24
28 32
INPUT VOLTAGE (V)
36
40
1027LS8 G09
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LT1027LS8
Typical Performance Characteristics
Output Noise Voltage Density
Output Settling Time (Sourcing)
OUTPUT NOISE DENSITY (nV/√Hz)
200
180
VOUT
400µV/DIV
AC-COUPLED
160
140
120
100
10mA
LOAD STEP
80
CNR = 0
60
2µs/DIV
1027LS8 G11
CNR = 1µF
40
20
0
10
100
1k
FREQUENCY (Hz)
10k
1027LS8 G10
0.1Hz to 10Hz Output Noise
Filtering =1 Zero at 0.1Hz
2 Poles at 10Hz
Output Settling Time (Sinking)
VOUT
400µV/DIV
AC-COUPLED
5µV/DIV
–10mA
LOAD STEP
2µs/DIV
1027LS8 G12
1sec/DIV
1027LS8 G13
1027ls8f
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5
LT1027LS8
Pin Functions
NR (Pin 1): Noise Reduction Pin. Add a capacitor to reduce wideband noise. See the Applications Information
section for details.
VOUT (Pin 2): Output Voltage. See the Applications Information section for details regarding DC and capacitive
loading and stability.
VTRIM (Pin 3): Allows adjustment of output voltage. See
the Applications Information section for details.
GND (Pin 4): Device Ground. See the Applications Information section for recommended connection methods.
NC (Pins 5, 6, 7): Connected internally, do not connect.
VIN (Pin 8): Power Supply. Bypass with 0.1µF (or larger)
capacitor to ground.
Block Diagram
VIN
VOUT
NR
VTRIM
1027LS8 BD
GND
6
OUTPUT CURRENT LIMIT AND
BIAS CIRCUITS NOT SHOWN
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LT1027LS8
Applications Information
Noise Reduction
A large portion of the temperature drift error budget in
many systems is the system reference voltage. Figure 1
indicates the maximum temperature coefficient allowable
if the reference is to contribute no more than 0.5LSB error
to the overall system performance. The example shown is
a 12-bit system designed to operate over a temperature
range from 25°C to 65°C. Assuming the system calibration
is performed at 25°C, the temperature span is 40°C. It can
be seen from the graph that the temperature coefficient
of the reference must be no worse than 6ppm/°C if it is
to contribute less than 1LSB error. For this reason, the
LT1027LS8 has been optimized for low drift.
The positive input of the internal scaling amplifier is brought
out as the Noise Reduction (NR) pin. Connecting a 1µF
Mylar capacitor between this pin and ground will reduce
the wideband noise of the LT1027LS8 from 2.0µVRMS to
approximately 1.2µVRMS in a 10Hz to 1kHz bandwidth.
Transient response is not affected by this capacitor. Start-up
settling time will increase to several milliseconds due to
the 7kΩ impedance looking into the NR pin. The capacitor
must be a low leakage type. Electrolytics are not suitable
for this application. Just 100nA leakage current will result
in a 150ppm error in output voltage. This pin is the most
sensitive pin on the device. For maximum protection a
guard ring is recommended. The ring should be driven
from a resistive divider from VOUT set to 4.4V (the opencircuit voltage on the NR pin).
MAXIMUM TEMPERATURE COEFFICIENT FOR
0.5LSB ERROR (ppm/°C)
Effect of Reference Drift on System Accuracy
100
8-BIT
Transient Response
10-BIT
10
12-BIT
14-BIT
1.0
0
10 20 30 40 50 60 70 80 90 100
TEMPERATURE SPAN (°C)
1027LS8 F01
Figure 1. Maximum Allowable Reference Drift
The LT1027LS8 has been optimized for transient response.
Settling time is under 2µs when an AC-coupled 10mA load
transient is applied to the output. The LT1027LS8 achieves
fast settling by using a class B NPN/PNP output stage. When
sinking current, the device may oscillate with capacitive
loads greater than 100pF. The LT1027LS8 is stable with
all capacitive loads when at no DC load or when sourcing
current, although for best settling time either no output
bypass capactor or a 4.7µF tantalum unit is recommended.
An 0.1µF ceramic output capacitor will maximize output
ringing and is not recommended.
Trimming Output Voltage
Kelvin Connections
The LT1027LS8 has an adjustment pin for trimming output
voltage. The impedance of the VTRIM pin is approximately
20kΩ with an open-circuit voltage of 2.5V. A ± 30mV
guaranteed trim range is achievable by tying the VTRIM pin
to the wiper of a 10k potentiometer connecting between
the output and ground. Trimming output voltage does not
affect the TC of the device.
Although the LT1027LS8 does not have true force-sense
capability, proper hook-up can improve line loss and ground
loop problems significantly. Since the ground pin of the
LT1027LS8 carries only 2mA, it can be used as a low-side
sense line, greatly reducing ground loop problems on the
low side of the reference. The VOUT pin should be close to
the load or connected via a heavy trace as the resistance
of this trace directly affects load regulation. It is important
to remember that a 1.22mV drop due to trace resistance
is equivalent to a 1LSB error in a 5VFS, 12-bit system.
1027ls8f
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7
LT1027LS8
Applications Information
INPUT
R1
91Ω
2N4403
IN
LT1027LS8
INPUT
IN
OUT
KEEP THIS LINE RESISTANCE LOW
LT1027LS8
+
OUT
LOAD
GND
R2*
2.4k
GND
GROUND
RETURN
1027LS8 F02
+
LOAD
4.7µF
GROUND
RETURN
1027LS8 F03
*OPTIONAL–REDUCES CURRENT IN OUTPUT SENSE LEAD
Figure 2. Standard Connection
Long-Term Drift
Long-term drift cannot be extrapolated from accelerated
high temperature testing. This erroneous technique gives
drift numbers that are wildly optimistic. The only way
long-term drift can be determined is to measure it over
the time interval of interest.
100
80
60
40
∆VOUT (ppm)
The circuits in Figure 2 and Figure 3 illustrate proper connections to minimize errors due to ground loops and line
losses. Losses in the output lead can be further reduced
by adding a PNP boost transistor if load current is 5mA
or higher. R2 can be added to further reduce current in
the output sense load.
Figure 3. Driving Higher Load Currents
20
0
–20
–40
–60
–80
–100
0
The LT1027LS8 long-term drift data was collected on 80
parts that were soldered into printed circuit boards similar
to a real world application. The boards were then placed
into a constant temperature oven with a TA = 35°C, their
outputs were scanned regularly and measured with an 8.5
digit DVM. Typical long-term drift is illustrated in Figure 4.
8
500
1000
1500 2000
HOURS
2500
3000
1027LS8 F04
Figure 4. Long-Term Drift
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LT1027LS8
Applications Information
Hysteresis
26
24
25°C to 50°C to 25°C
25°C to 0°C to 25°C
22
20
18
16
14
12
10
8
6
4
2
0
–15 –12 –9 –6 –3 0 3 6 9 12 15
DISTRIBUTION (ppm)
NUMBER OF UNITS
NUMBER OF UNITS
Thermal hysteresis is a measure of change of output voltage as a result of temperature cycling. Figure 5, Figure 6
and Figure 7 illustrate the typical hysteresis based on data
taken from the LT1027LS8. A proprietary design technique
minimizes thermal hysteresis.
26
24
25°C TO 0°C TO 25°C
22
25°C TO 70°C TO 25°C
20
18
16
14
12
10
8
6
4
2
0
–15 –12 –9 –6 –3 0 3 6 9 12 15
DISTRIBUTION (ppm)
1027LS8 F05
NUMBER OF UNITS
Figure 5. Thermal Hysteresis Plot, 0°C to 50°C
1027LS8 F06
Figure 6. Thermal Hysteresis Plot, 0°C to 70°C
26
24
22
25°C TO 85°C TO 25°C
20
18
16 25°C TO –40°C TO 25°C
14
12
10
8
6
4
2
0
–15 –12 –9 –6 –3 0 3 6 9 12 15
DISTRIBUTION (ppm)
1027LS8 F07
Figure 7. Thermal Hysteresis Plot, –40°C to 85°C
1027ls8f
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9
LT1027LS8
Typical Applications
Humidity Sensitivity
Plastic mold compounds absorb water. With changes in
relative humidity, plastic packaging materials change the
amount of pressure they apply to the die inside. These
pressure changes can cause slight changes in the output
of a voltage reference, usually on the order of 100ppm.
The LS8 package is hermetic, so it is not affected by
humidity, and is therefore more stable in environments
where humidity may be a concern. However, PC board
material may absorb water and apply mechanical stress
to the LT1027LS8. Proper board materials and layout are
essential.
LS8
1027LS8 F08a
(a)
For best stability, the PC board layout is critical. Change
in temperature and position of the PC board, as well as
aging, can alter the mechanical stress applied to components soldered to the board. FR4 and similar materials also
absorb water, causing the board to swell. Even conformal
coating or potting of the board does not always eliminate
this effect, though it may delay the symptoms by reducing
the rate of absorption.
(b)
Figure 8. (a) 3-Sided PCB Tab Cutout, (b) 4-Sided PCB Cutout.
Lines Represent Cuts All the Way Through the PCB
80
VOUT (PPM) AND TEMPERATURE (°C)
An additional advantage of slotting the PC board is that
the LT1027LS8 is thermally isolated from surrounding
circuitry. This separation can help reduce thermocouple
effects and improve accuracy.
1027LS8 F08b
90
VIN = 10V
70
80
60
70
HUMIDITY
50
60
40
50
30
40
20
30
TEMPERATURE
10
20
0
10
–10
–20
HUMIDITY (%)
Power and ground planes should be omitted under the
voltage reference IC for best stability. Figure 8a shows a tab
cut through the PC board on three sides of an LT1027LS8,
which significantly reduces stress on the IC, as described
in Application Note 82. For even better performance,
Figure 8b shows slots cut through the PC board on all
four sides. The slots should be as long as possible, and
the corners just large enough to accommodate routing of
traces. It has been shown that for PC boards designed in
this way, humidity sensitivity can be reduced to less than
35ppm for a change in relative humidity of approximately
60%. Mounting the reference near the center of the board,
with slots on four sides, can further reduce the sensitivity
to less than 10ppm.
LS8
0
0
20
40
60
–10
80 100 120 140 160 180 200 220
TIME (HRS)
1027LS8 F09
Figure 9. Illustrates Drift of LT1027LS8 with Large Changes in
Humidity. Using Proper PCB Layout Techniques Limits This Drift
to a Few ppm
10
1027ls8f
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LT1027LS8
Typical Applications
10V Reference
VIN
IN
+
OUT
GND
10.00V
OUTPUT
LT1097
LT1027LS8
–
VTRIM
5k
5k*
5k*
* 0.1% METAL FILM
1027LS8 TA02
10V Reference
VIN
VOUT
VIN
LT1027LS8
OUT
1F
1F
GND
8
7
11
12
LTC1043
13
14
16
17
0.01µF
1027LS8 TA03
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11
LT1027LS8
Typical Applications
Operating 5V Reference from 5V Supply
5V
LOGIC SUPPLY
CMOS LOGIC GATE**
1N914
+
fIN ≥ 2kHz*
C1
5µF*
LT1027LS8
1N914
≈8.5V
+
C2
5µF*
IN
OUT
5V
REFERENCE
GND
1027LS 8 TA04
*FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED
**PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING
12
1027ls8f
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LT1027LS8
Package Description
Please refer to http://www.linear.com/product/LT1027LS8#packaging/ for the most recent package drawings.
LS8 Package
LS8 Package
8-Pin Leadless Chip Carrier (5mm × 5mm)
8-Pin Leadless Chip Carrier (5mm × 5mm)
(Reference LTC DWG # 05-08-1852 Rev B)
(Reference LTC DWG # 05-08-1852 Rev B)
8
2.50 ±0.15
PACKAGE OUTLINE
7
1
0.5
2
6
2.54 ±0.15
1.4
3
1.50 ±0.15
4
0.70 ±0.05 × 8
e4
XYY ZZ
ABCDEF
Q12345
COMPONENT
PIN “A1”
5.00 SQ ±0.15
5.80 SQ ±0.15
TRAY PIN 1
BEVEL
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
5.00 SQ ±0.15
1.45 ±0.10
0.95 ±0.10
4.20 SQ ±0.10
8
1
PIN 1
TOP MARK
(SEE NOTE 5)
2
PACKAGE IN TRAY LOADING ORIENTATION
5.00 SQ ±0.15
8
R0.20 REF
2.00 REF
7
6
1
7
2
2.54 ±0.15
0.5
6
4.20 ±0.10
1.4
3
5
R0.20 REF
5
3
1.00 × 7 TYP
4
LS8 0113 REV B
4
0.70 TYP
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS
PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE
4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.10 TYP
0.64 × 8 TYP
1027ls8f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of itsinformation
circuits as described
herein will not infringe on existing patent rights.
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13
LT1027LS8
Typical Application
Precision Temperature Sensor
VREF
5V
RREF
400Ω
VDD
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
COM
5k
RTD
THERMOCOUPLE
OUT
LT1027LS8
VREF
MUXOUTN
–
+
50Ω
ADCINN
7.5V
–2.5V
MUXOUTP
2.5k
ADCINP
0.1µF
LTC2449
1nF
0.01µF
50Ω
SDI
SCK
SDO
CS
SPI INTERFACE
LTC6241
7.5V
–
+
–2.5V
BUSY
EXT
FO
REF+
REF–
4.7µF
GND
GND
GND
IN
1nF
GND
GND
GND
GND
GND
7.5V
2.5k
1027LS8 TA05
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
LT1021
Precision References for Series or Shunt Operation in
Hermetic TO-5, SOP-8, DIP-8 Package
0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise
(0.1Hz to 10Hz), –55°C to 125°C (TO-5)
LT1236
Low Drift, Low Noise, 5V and 10V Voltage Reference in
SO8, DIP8 and LS8 Packages
0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise
(0.1Hz to 10Hz), –40°C to 85°C
LT1236LS8
Precision Series Reference, 0.05%, 5ppm/°C Drift
Low Profile Hermetic LS8 Package
LTC®6652
High Precision, Buffered Voltage Reference Family in
MSOP8 and LS8 Package
0.05% Max Initial Error, 5ppm/°C Max Drift, Shutdown Current <2µA,
–40°C to 125°C Operation
LT6654
Precision, Low Noise, High Output Drive Voltage Reference 1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz) Sink/Source ±10mA, 5ppm/°C
Family in MSOP8 and LS8 Package
Max Drift, –40°C to 125°C Operation
LTC6655
Exceptional Low Noise, High Precision Reference in
MSOP8 and LS8 Package
14 Linear Technology Corporation
0.25ppm Peak-to-Peak Noise (0.1Hz to 10Hz), 2ppm/°C Maximum Drift,
0.025% Maximum Initial Error, –40°C to 125°C Operation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT1027LS8
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT1027LS8
1027ls8f
LT 0216 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2016