DATASHEET

HA-2542
®
DUCT
E PRO PRODUCT
T
E
L
O
OBS
ITUTE 1
SUBST A-2
Data
54 Sheet
E
L
IB
42, H
POSS
HA-28
August 2002
70MHz, High Slew Rate, High Output
Current Operational Amplifier
FN2899.5
Features
• Stable at Gains of 2 or Greater
The HA-2542 is a wideband, high slew rate, monolithic
operational amplifier featuring an outstanding combination of
speed, bandwidth, and output drive capability.
• Gain Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 70MHz
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . .300V/µs (Min)
Utilizing the advantages of the Intersil D.I. technology this
amplifier offers 350V/µs slew rate, 70MHz gain bandwidth,
and ±100mA output current. Application of this device is
further enhanced through stable operation down to closed
loop gains of 2.
• High Output Current . . . . . . . . . . . . . . . . . . . .100mA (Min)
For additional flexibility, offset null and frequency
compensation controls are included in the HA-2542 pinout.
Applications
The capabilities of the HA-2542 are ideally suited for high
speed coaxial cable driver circuits where low gain and high
output drive requirements are necessary. With 5.5MHz full
power bandwidth, this amplifier is most suitable for high
frequency signal conditioning circuits and pulse video
amplifiers. Other applications utilizing the HA-2542
advantages include wideband amplifiers and fast samplehold circuits.
For more information on the HA-2542, please refer to
Application Note AN552 (Using the HA-2542), or Application
Note AN556 (Thermal Safe-Operating-Areas for High
Current Op Amps).
For a lower power version of this product, please see
the HA-2842 data sheet.
• Power Bandwidth . . . . . . . . . . . . . . . . . . . . . 5.5MHz (Typ)
• Output Voltage Swing. . . . . . . . . . . . . . . . . . . . ±10V (Min)
• Monolithic Bipolar Dielectric Isolation Construction
• Pulse and Video Amplifiers
• Wideband Amplifiers
• Coaxial Cable Drivers
• Fast Sample-Hold Circuits
• High Frequency Signal Conditioning Circuits
Pinout
HA-2542 (PDIP)
TOP VIEW
NC 1
14 NC
NC 2
13 BAL
-IN 4
Part Number Information
PART NUMBER
HA3-2542-5
TEMP.
RANGE (oC)
0 to 75
+IN 5
PACKAGE
14 Ld PDIP
1
PKG.
NO.
12 COMP
BAL 3
+
11 V+
10 OUT
V- 6
9 NC
NC 7
8 NC
E14.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
HA-2542
Absolute Maximum Ratings
Thermal Information
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . .35V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V
Output Current . . . . . . . . . . . . . . . . 50mA Continuous, 125mAPEAK
Thermal Resistance (Typical, Note 2)
Operating Conditions
θJA (oC/W)
θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
95
N/A
Maximum Junction Temperature (Plastic Package, Note 1) . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
Temperature Range
HA-2542-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation with load conditions must be designed to maintain the maximum junction temperature below 150oC for plastic
packages. By using Application Note AN556 on Safe Operating Area equations, along with the thermal resistances, proper load conditions can
be determined. Heatsinking will be required in many applications. See the “Application Information” section to determine if heat sinking is
required for your application.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VSUPPLY = ±15V, RL = 1kΩ, CL ≤ 10pF, Unless Otherwise Specified
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
-
5
10
mV
Full
-
8
20
mV
Average Offset Voltage Drift
Full
-
14
-
µV/oC
Bias Current
25
-
15
35
µA
Full
-
26
50
µA
Average Bias Current Drift
Full
-
45
-
nA/oC
Offset Current
25
-
1
7
µA
Full
-
-
9
µA
Input Resistance
25
-
100
-
kΩ
Input Capacitance
25
-
1
-
pF
Common Mode Range
Full
±10
-
-
V
PARAMETER
TEST
CONDITIONS
HA-2542-5
0oC TO 75oC
INPUT CHARACTERISTICS
Offset Voltage
Input Noise Voltage
0.1Hz to 100Hz
25
-
2.2
-
µVP-P
Input Noise Density
f = 1kHz, RG = 0Ω
25
-
10
-
nV/√Hz
Input Noise Current Density
f = 1kHz, RG = 0Ω
25
-
3
-
pA/√Hz
VO = ±10V
25
10
30
-
kV/V
Full
5
20
-
kV/V
Full
70
100
-
dB
25
2
-
-
V/V
25
-
70
-
MHz
Output Voltage Swing
Full
±10
±11
-
V
Output Current (Note 3)
25
100
-
-
mA
Output Resistance
25
-
5
-
Ω
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
VCM = ±10V
Common Mode Rejection Ratio
Minimum Stable Gain
Gain Bandwidth Product
AV = 100
OUTPUT CHARACTERISTICS
2
HA-2542
Electrical Specifications
VSUPPLY = ±15V, RL = 1kΩ, CL ≤ 10pF, Unless Otherwise Specified (Continued)
TEST
CONDITIONS
HA-2542-5
0oC TO 75oC
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
4.7
5.5
-
MHz
Differential Gain (Note 5)
25
-
0.1
-
%
Differential Phase (Note 5)
25
-
0.2
-
Degree
Harmonic Distortion (Note 7)
25
-
<0.04
-
%
Rise Time
25
-
4
-
ns
Overshoot
25
-
25
-
%
Slew Rate
25
300
350
-
V/µs
10V Step to 0.1%
25
-
100
-
ns
10V Step to 0.01%
25
-
200
-
ns
25
-
30
-
mA
Full
-
31
40
mA
Full
70
79
-
dB
PARAMETER
Full Power Bandwidth (Note 4)
VPEAK = 10V
TRANSIENT RESPONSE (Note 6)
Settling Time
POWER SUPPLY CHARACTERISTICS
Supply Current
VS = ±5V to ±15V
Power Supply Rejection Ratio
NOTES:
3. RL = 50Ω, VO = ±5V, Output duty cycle must be reduced for IOUT > 50mA (e.g. ≤50% duty cycle for 100mA).
Slew Rate
4. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW = ----------------------------- .
2πV PEAK
5. Differential gain and phase are measured at 5MHz with a 1V differential input voltage.
6. Refer to Test Circuits section of this data sheet.
7. VIN = 1VRMS; f = 10kHz; AV = 10.
Test Circuits and Waveforms
IN
+
OUT
-
500Ω
VIN
500Ω
NOTES:
8. VS = ±15V.
VOUT
9. AV = +2.
10. CL ≤ 10pF.
TEST CIRCUIT
3
Vertical Scale: VIN = 2.0V/Div., VOUT = 5.0V/Div.
Horizontal Scale: 200ns/Div.
LARGE SIGNAL RESPONSE
HA-2542
Test Circuits and Waveforms
(Continued)
VIN
VOUT
Vertical Scale: 100mV/Div.
Horizontal Scale: 50ns/Div.
Vertical Scale: 100mV/Div.
Horizontal Scale: 10ns/Div.
VS = ±15V, RL = 1kΩ. Propagation delay variance
is negligible over full temperature range.
SMALL SIGNAL RESPONSE
PROPAGATION DELAY
NOTES:
SETTLING
POINT
2.5kΩ
500Ω
14. Tektronix P6201 FET probe used at settling point.
15. For 0.01% settling time, heat sinking is suggested to reduce
thermal effects and an analog ground plane with supply
decoupling is suggested to minimize ground loop errors.
V+
-
VOUT
+
V-
SETTLING TIME TEST CIRCUIT (SEE NOTES 11 - 15.)
4
12. Feedback and summing resistors must be matched (0.1%).
13. HP5082-2810 clipping diodes recommended.
5kΩ
1kΩ
VIN
11. AV = -2.
HA-2542
Schematic Diagram
BAL
R11
R7
R8
R10
75Ω
R9
QP15 QP13
QP14
BAL
R25
5kΩ
R12
75Ω
QP16
QP34
V+
R26
5kΩ
R15
QP35
QP33
R14
QN12
QP32
QP5
QP31
QP7
QN24
QP11
QN23
QN42
QN44
C1
QN2
QN1
+IN
QP36
-IN
OUTPUT
QN38
R6
R18
COMP
DZ45
QP25
QN18
QN9
QN8
QP43
QN40
QN4
QN19
R22
QN10
QN3
QN29
QN38
QN20
QN17
C2
QN37
R2A
QN22
QN26
QN21
R1
R2
R27
R3
R28
R4
R16
R17
R5
R13
QN41
R21
V-
Application Information
(Refer to Application Note AN552 for Further Information)
The Intersil HA-2542 is a state of the art monolithic device
which also approaches the “ALL-IN-ONE” amplifier concept.
This device features an outstanding set of AC parameters
augmented by excellent output drive capability providing for
suitable application in both high speed and high output drive
circuits.
Primarily intended to be used in balanced 50Ω and 75Ω
coaxial cable systems as a driver, the HA-2542 could also be
used as a power booster in audio systems as well as a
power amp in power supply circuits. This device would also
be suitable as a small DC motor driver.
The applications shown in Figures 2 through Figure 4
demonstrate the HA-2542 at gains of +100 and +2 and as a
video cable driver for small signals.
Power Dissipation Considerations
5
At high output currents, especially with the PDIP package,
care must be taken to ensure that the Maximum Junction
Temperature (TJ, see “Absolute Maximum Ratings” table) is
not exceeded. As an example consider the HA-2542 in the
PDIP package, with a required output current of 20mA at
VOUT = 5V. The power dissipation is the quiescent power
(1.2W = 30V x 40mA) plus the power dissipated in the
output stage (POUT = 200mW = 20mA x (15V - 5V)), or a
total of 1.4W. The thermal resistance (θJA) of the PDIP
package is 100oC/W, which increases the junction
temperature by 140oC over the ambient temperature (TA).
Remaining below TJMAX requires that TA be restricted to ≤
10oC (150oC - 140oC). Heatsinking would be required for
operation at ambient temperatures greater than 10oC.
MAXIMUM TA WITHOUT HEATSINK (oC)
HA-2542
120
possible: 4) placing power supply decoupling capacitors
from device supply pins to ground.
VOUT = ±5V
VS = ±15V
100
Frequency Compensation
The HA-2542 may be externally compensated with a single
capacitor to ground. This provides the user the additional
flexibility in tailoring the frequency response of the amplifier.
A guideline to the response is demonstrated on the typical
performance curve showing the normalized AC parameters
versus compensation capacitance. It is suggested that the
user check and tailor the accurate compensation value for
each application. As shown additional phase margin is
achieved at the loss of slew rate and bandwidth.
80
60
40
20
0
PDIP
0
5
10
15
20
25
30
35
40
45
OUTPUT CURRENT (100% DUTY CYCLE, mA)
50
FIGURE 1. MAXIMUM OPERATING TEMPERATURE vs
OUTPUT CURRENT
Allowable output power can be increased by decreasing the
quiescent dissipation via lower supply voltages.
For more information please refer to Application Note
AN556, “Thermal Safe Operating Areas for High Current Op
Amps”.
Prototyping Guidelines
For best overall performance in any application, it is
recommended that high frequency layout techniques be
used. This should include: 1) mounting the device through a
ground plane: 2) connecting unused pins (NC) to the ground:
3) mounting feedback components on Teflon standoffs and
or locating these components as close to the device as
For example, for a voltage gain of +2 (or -1) and a load of
500pF/2kΩ, 20pF is needed for compensation to give a small
signal bandwidth of 30MHz with 40o of phase margin. If a full
power output voltage of ±10V is needed, this same
configuration will provide a bandwidth of 5MHz and a slew
rate of 200V/µs.
If maximum bandwidth is desired and no compensation is
needed, care must be given to minimize parasitic
capacitance at the compensation pin. In some cases where
minimum gain applications are desired, bending up or totally
removing this pin may be the solution. In this case, care
must also be given to minimize load capacitance.
For wideband positive unity gain applications, the HA-2542
can also be over-compensated with capacitance greater
than 30pF to achieve bandwidths of around 25MHz. This
over-compensation will also improve capacitive load
handling or lower the noise bandwidth. This versatility along
with the ±100mA output current makes the HA-2542 an
excellent high speed driver for many power applications.
Typical Applications
IN
+
OUT
-
30
20
10
0
0
-45
990Ω
-90
10Ω
-135
-180
Frequency (0dB) = 44.9MHz,
Phase Margin (0dB) = 40o
FREQUENCY RESPONSE
FIGURE 2. NONINVERTING CIRCUIT (AVCL = 100)
6
PHASE (DEGREES)
GAIN (dB)
40
HA-2542
Typical Applications
(Continued)
+
OUT
-
50Ω
6
4
2
0
0
50Ω
-45
-90
-135
-180
Frequency (dB) = 56MHz, Phase Margin (3dB) = 40o
FREQUENCY RESPONSE
FIGURE 3. NONINVERTING CIRCUIT (AVCL = 2)
IN
75Ω
+
OUT
-
1kΩ
IN
75Ω
1kΩ
OUT
1V/Div.; 100ns/Div.
PULSE RESPONSE
FIGURE 4. VIDEO CABLE DRIVER (AVCL = 2)
RT
1
14
2
13
3
12
-
4
+
NOTES:
16. Suggested compensation scheme 5pF - 20pF.
CCOMP
11
V+
5
10
6
9
7
8
17. Tested Offset Adjustment Range is |VOS +1mV|
minimum referred to output.
18. Typical range is ±20mV with RT = 5kΩ.
FIGURE 5. SUGGESTED OFFSET VOLTAGE ADJUSTMENT AND FREQUENCY COMPENSATION
7
PHASE (DEGREES)
IN
GAIN (dB)
8
HA-2542
Typical Performance Curves
10
1000
100
INPUT NOISE VOLTAGE
10
10
INPUT NOISE CURRENT
1
10
100
1K
10K
6
4
2
0
-2
-4
-6
-8
1
100K
1
VS = ±12V
SIX REPRESENTATIVE UNITS
8
OFFSET VOLTAGE (mV)
100
INPUT NOISE CURRENT (pA/√Hz)
INPUT NOISE VOLTAGE (nV/√Hz)
1000
-10
-60
-40
-20
0
FIGURE 6. INPUT NOISE VOLTAGE AND INPUT NOISE
CURRENT vs FREQUENCY
BIAS CURRENT (µA)
INPUT RESISTANCE (Ω)
10K
V+
100
80
100
120
VS = ±12V
SIX REPRESENTATIVE UNITS
27
25
V-
60
29
100K
+
-
40
FIGURE 7. OFFSET VOLTAGE vs TEMPERATURE
TA = 25oC
VS = ±15V
1000
20
TEMPERATURE (oC)
FREQUENCY (Hz)
900Ω
23
21
19
17
15
13
11
100Ω
9
10
100K
1M
10M
FREQUENCY (Hz)
7
-60
100M
-20
0
20
40
60
80
100
120
TEMPERATURE (oC)
FIGURE 8. INPUT RESISTANCE vs FREQUENCY
FIGURE 9. BIAS CURRENT vs TEMPERATURE
18
120
TA = 25oC
17
VS = ±15V
SIX REPRESENTATIVE UNITS
16
110
CMRR
15
14
100
13
(dB)
BIAS CURRENT (µA)
-40
12
90
11
10
80
9
PSRR
8
7
5
7
9
11
SUPPLY VOLTAGE (±V)
13
FIGURE 10. BIAS CURRENT vs SUPPLY VOLTAGE
8
15
70
-60
-40
-20
0
20
40
60
80
100
TEMPERATURE (oC)
FIGURE 11. PSRR AND CMRR vs TEMPERATURE
120
HA-2542
Typical Performance Curves
(Continued)
32
VS = ±15V
TA = 25oC
RL = 2kΩ
120
28
22
40
18 25oC
20
0
14
125oC
4
6
8
10
12
SUPPLY VOLTAGE (±V)
100
14
10K
100K
1M
10M
FIGURE 13. PSRR AND CMRR vs FREQUENCY
500
55
RL = 100Ω
AV = 2
±15V
AV = 2
±10V
50
45
300
AV = 2
200
±5V
AV = 10
AV = 10
0
-50
-25
0
25
50
75
VS = ±7
30
±10V
20
±5V
15
100
VS = ±15
35
VS = ±8
25
±15V
AV = 10
100
VS = ±12
40
AVOL (kV/V)
400
10
-60
125
TEMPERATURE (oC)
FIGURE 14. SLEW RATE vs TEMPERATURE AT VARIOUS
SUPPLY VOLTAGES
-40
-20
0
20
40
60
TEMPERATURE (oC)
80
100
120
FIGURE 15. OPEN LOOP GAIN vs TEMPERATURE, AT
VARIOUS SUPPLY VOLTAGES
12.0
1.4
6.0
25oC
+VOUT
125oC
+VOUT
NORMALIZED TO VALUE AT 0pF
10.0 -55oC
8.0 +VOUT
4.0
2.0
0.0
-2.0
-4.0
-6.0
-8.0
-10.0 -55oC
-12.0 -VOUT
-14.0
1K
FREQUENCY (Hz)
FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE, AT
VARIOUS TEMPERATURES
SLEW RATE (V/µs)
-PSRR
60
20
16
OUTPUT VOLTAGE SWING (V)
+PSRR
80
24
12
CMRR
100
-55oC
26
(dB)
SUPPLY CURRENT (mA)
30
5
25oC
-VOUT
7
125oC
-VOUT
9
11
SUPPLY VOLTAGE (±V)
1.2
PHASE MARGIN
1.1
1.0
0.9
0.8
0.7
SLEW RATE
0.6
13
15
FIGURE 16. OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE,
AT VARIOUS TEMPERATURES
9
1.3
0.5
BANDWIDTH
0
5
10
15
20
COMPENSATION CAPACITANCE (pF)
FIGURE 17. NORMALIZED AC PARAMETERS vs
COMPENSATION CAPACITANCE
25
HA-2542
HA-2542
AV = 10
VS = ±15V
TA = 25oC
MAXIMUM SWING
RL = 1kΩ
10
8
4
UNDISTORTED
SWING
RL = 100Ω
MAXIMUM SWING
UNDISTORTED SWING
10
0
1
10
RL = 1kΩ
MAXIMUM SWING
8
UNDISTORTED SWING
6
4
2
2
0.1
HA-2542
AV = 10
VS = ±10V
TA = 25oC
12
RL = 100Ω
MAXIMUM SWING
UNDISTORTED SWING
0
0.1
100
1
FREQUENCY (Hz)
FIGURE 18. OUTPUT VOLTAGE SWING vs FREQUENCY
HA-2542
TA = 25oC
RL = 1kΩ
VS = ±15V
AV = 1000
GAIN (dB)
50
40
AV = 100
25oC
12
125oC
9
GAIN
6
-55oC
3
PHASE
0
+
-
AV = 10
V-
10
AV = 2
0
0.1
1
10
FREQUENCY (MHz)
FIGURE 20. FREQUENCY RESPONSE CURVES
10
100
100K
-55oC
V+
VIN
30
20
100
FIGURE 19. OUTPUT VOLTAGE SWING vs FREQUENCY
GAIN (dB)
70
60
10
FREQUENCY (Hz)
25oC
GAIN
=
+2
500Ω
VS = ±8V
RL = 1kΩ
500Ω CL ≤ 10pF
VIN ≤ 90mV
125oC
1M
10M
FREQUENCY (Hz)
0
-45
-90
-135
-180
PHASE (DEGREES)
OUTPUT VOLTAGE (V)
12
6
(Continued)
OUTPUT VOLTAGE (V)
Typical Performance Curves
100M
FIGURE 21. HA-2542 CLOSED LOOP GAIN vs TEMPERATURE
HA-2542
Die Characteristics
DIE DIMENSIONS:
SUBSTRATE POTENTIAL (POWERED UP):
106 mils x 73 mils x 19 mils
2700µm x 1850µm x 483µm
VTRANSISTOR COUNT:
METALLIZATION:
43
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
PROCESS:
Bipolar Dielectric Isolation
PASSIVATION
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
Metallization Mask Layout
HA-2542
-IN
+IN
BAL
BAL
V-
11
OUTPUT
V+
COMP
HA-2542
Dual-In-Line Plastic Packages (PDIP)
E14.3 (JEDEC MS-001-AA ISSUE D)
N
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AD
E
BASE
PLANE
-C-
SEATING
PLANE
A2
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M
C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8
eA
C
0.008
0.014
C
D
0.735
0.775
18.66
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
0.204
0.355
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
0.300 BSC
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
eB
-
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
L
0.115
N
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
14
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
14
6
10.92
7
3.81
4
9
Rev. 0 12/93
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 1.14mm).
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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