DATASHEET

ISL28146, ISL28246
®
Data Sheet
June 23, 2008
5MHz, Single and Dual Rail-to-Rail
Input-Output (RRIO) Op Amps
FN6321.3
Features
• 5MHz gain bandwidth product @ AV = 100
The ISL28146 and ISL28246 are low-power single and dual
operational amplifiers optimized for single supply operation
from 2.4V to 5.5V, allowing operation from one lithium cell or
two Ni-Cd batteries. They feature a gain-bandwidth product
of 5MHz and are unity-gain stable with a -3dB bandwidth of
13MHz.
These devices feature an Input Range Enhancement Circuit
(IREC) which enables them to maintain CMRR performance for
input voltages greater than the positive supply. The input signal
is capable of swinging 0.25V above a 5.0V supply and to within
10mV from ground. The output operation is rail-to-rail.
The parts draw minimal supply current while meeting
excellent DC accuracy, AC performance, noise and output
drive specifications. The ISL28146 features an enable pin
that can be used to turn the device off and reduce the supply
current to only 16µA. Operation is guaranteed over -40°C to
+125°C temperature range.
• 13MHz -3db unity gain bandwidth
• 1mA typical supply current (per amplifier)
• 650µV maximum offset voltage
• 16nA typical input bias current
• Down to 2.4V single supply voltage range
• Rail-to-rail input and output
• Enable pin (ISL28146 only)
• -40°C to +125°C operation
• Pb-free (RoHS compliant)
Applications
• Low-end audio
• 4mA to 20mA current loops
• Medical devices
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
• Sensor amplifiers
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL28146FHZ-T7*
GABS
6 Ld SOT-23
MDP0038
ISL28146FHZ-T7A*
GABS
6 Ld SOT-23
MDP0038
ISL28246FBZ
28246 FBZ
8 Ld SOIC
MDP0027
ISL28246FBZ-T7*
28246 FBZ
8 Ld SOIC
MDP0027
ISL28246FUZ
8246Z
8 Ld MSOP
MDP0043
ISL28246FUZ-T7*
8246Z
8 Ld MSOP
MDP0043
ISL28146EVAL1Z
Evaluation Board - 6 Ld SOT-23
ISL28246SOICEVAL1Z
Evaluation Board - 8 Ld SOIC
ISL28246MSOPEVAL1Z
Evaluation Board - 8 Ld MSOP
• ADC buffers
• DAC output amplifiers
Pinouts
OUT 1
V- 2
+ -
IN+ 3
6 V+
OUT_A 1
5 EN
IN-_A 2
4 IN-
IN+_A 3
8 V+
7 OUT_B
- +
V- 4
*Please refer to TB347 for details on reel specifications
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
+ -
6 IN-_B
5 IN+_B
ISL28246
(8 LD SOIC)
TOP VIEW
OUT_A 1
IN-_A 2
IN+_A 3
V- 4
1
ISL28246
(8 LD MSOP)
TOP VIEW
ISL28146
(6 LD SOT-23)
TOP VIEW
8 V+
7 OUT_B
- +
+ -
6 IN-_B
5 IN+_B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28146, ISL28246
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500V
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
230
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
120
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
160
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
Temperature data established by characterization.
DESCRIPTION
CONDITIONS
MIN
(Note 2)
TYP
MAX
(Note 2)
UNIT
DC SPECIFICATIONS
VOS
Input Offset Voltage
ΔV OS
--------------ΔT
Input Offset Voltage vs Temperature
IOS
Input Offset Current
-10
-15
0
10
15
nA
IB
Input Bias Current
-35
-40
16
35
40
nA
CMIR
Common-Mode Voltage Range
Guaranteed by CMRR
0
5
V
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
90
85
114
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5.5V
90
85
99
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4V, RL = 100kΩ to VCM
600
500
1770
V/mV
140
V/mV
-650
-750
Maximum Output Voltage Swing
IS,ON
Supply Current, Enabled
IS,OFF
Supply Current, Disabled
2
650
750
0.3
VO = 0.5V to 4V, RL = 1kΩ to VCM
VOUT
30
µV
µV/°C
Output low, RL = 100kΩ to VCM
3
6
10
mV
Output low, RL = 1kΩ to VCM
70
90
110
mV
Output high, RL = 100kΩ to VCM
4.99
4.98
4.994
mV
Output high, RL = 1kΩ to VCM
4.92
4.89
4.94
V
Per Amplifier
1
1.25
1.4
mA
10
14
16
µA
FN6321.3
June 23, 2008
ISL28146, ISL28246
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
Temperature data established by characterization. (Continued)
DESCRIPTION
CONDITIONS
IO+
Short-Circuit Output Source Current
RL = 10Ω to VCM
IO-
Short-Circuit Output Sink Current
RL = 10Ω to VCM
VSUPPLY
Supply Operating Range
V+ to V-
VENH
EN Pin High Level, ISL28146 Only
VENL
EN Pin Low Level, ISL28146 Only
IENH
EN Pin Input High Current, ISL28146
Only
VEN = V+
IENL
EN Pin Input Low Current, ISL28146
Only
MIN
(Note 2)
48
45
TYP
MAX
(Note 2)
56
-54
2.4
UNIT
mA
-48
-45
mA
5.5
V
2
V
0.8
V
1
1.5
1.6
µA
VEN = V-
16
25
30
nA
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
AV = 100, RF = 100kΩ, RG = 1kΩ
5
MHz
Unity Gain
Bandwidth
-3dB Bandwidth
AV =1, RF = 0Ω, RL = 10kΩ, VOUT = 10mVP-P
13
MHz
eN
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz
0.4
µVP-P
Input Noise Voltage Density
fO = 1kHz
12
nV/√Hz
iN
Input Noise Current Density
fO = 10kHz
0.35
pA/√Hz
CMRR
Input Common Mode Rejection Ratio
fO = to 120Hz; VCM = 1VP-P, RL = 1kΩ
-90
dB
PSRRto 120Hz
Power Supply Rejection Ratio (V-)
V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P,
RL = 1kΩ
-88
dB
PSRR+
to 120Hz
Power Supply Rejection Ratio (V+)
V+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P,
RL = 1kΩ
-105
dB
TRANSIENT RESPONSE
SR
Slew Rate
VOUT = ±1.5V, Rf = 50kΩ, RG = 50kΩ to VCM
±1.9
V/µs
tr, tf, Large
Signal
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ to VCM
0.6
µs
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 2VP-P, Rg = Rf = RL = 1kΩ to VCM
0.5
µs
tr, tf, Small
Signal
Rise Time, 10% to 90%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 1kΩ to VCM
65
nS
Fall Time, 90% to 10%, VOUT
AV = +2, VOUT = 10mVP-P,
Rg = Rf = RL = 1kΩ to VCM
62
nS
Enable to Output Turn-on Delay Time,
10% EN to 10% VOUT
VEN = 5V to 0V, AV = +2,
Rg = Rf = RL = 1kΩ to VCM
5
µs
Enable to Output Turn-off Delay Time,
10% EN to 10% VOUT
VEN = 0V to 5V, AV = +2,
Rg = Rf = RL = 1kΩ to VCM
0.3
µs
tEN
NOTE:
2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
3
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
1
10
Rf = Rg = 100k
5
Rf = Rg = 10k
0
V+ = 5V
RL = 1k
CL = 16.3pF
-10 AV = +2
VOUT = 10mVP-P
-15
100
1k
10k
-5
Rf = Rg = 1k
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
15
0
-1
VOUT = 1V
-2
VOUT = 100mV
-3
VOUT = 50mV
-4
VOUT = 10mV
-5
-6
-7
-8
100k
1M
10M
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100M
100k
1M
1
0
0
-1
VOUT = 1V
-2
VOUT = 100mV
-3
VOUT = 50mV
-4
VOUT = 10mV
-7
-8
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1
-6
V+ = 5V
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100k
-1
VOUT = 1V
-2
VOUT = 100mV
-3
VOUT = 50mV
-4
VOUT = 10mV
-5
-6
-7
-8
1M
10M
V+ = 5V
RL = 100k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100M
100k
1M
FREQUENCY (Hz)
AV = 1001, Rg = 1k, Rf = 1M
RL =100k
60
RL =10k
50 AV = 101, Rg = 1k,
Rf = 100k
40
-1
-2
RL =1k
-3
GAIN (dB)
NORMALIZED GAIN (dB)
70
0
-4
-5
-8
100M
FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k
1
-7
10M
FREQUENCY (Hz)
FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k
-6
100M
FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k
FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR
VALUES Rf/Rg
-5
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
V+ = 5V
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-9
10k
100k
V+ = 5V
CL = 16.3pF
RL = 10k
VOUT = 10mVP-P
30
20
AV = 10, Rg = 1k, Rf = 9.09k
10
0
1M
10M
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs RL
4
100M
-10
100
AV = 1, Rg = INF, Rf = 0
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
8
7
6
5
4
3
2
1
0
-1
-2
-3 V+ = 5V
-4 RL = 1k
-5 A = +1
V
-6
VOUT = 10mVP-P
-7
-8
10k
100k
V+ = 5V
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1
0
-1
-2
-3
V+ = 2.4V
-4
-5
RL = 10k
CL = 16.3pF
AV = +1
VOUT = 10mVP-P
-6
-7
-8
-9
10k
100k
1M
10M
(Continued)
100M
FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
20
0
0
-20
PSRR (dB)
CMRR (dB)
-20
-40
-100
10
V+ = 2.4V, 5V
RL = 1k
CL = 16.3pF
AV = +1
VCM = 1VP-P
100
1k
10k
100k
FREQUENCY (Hz)
1M
-40
100M
V+, V- = ±1.2V
RL = 1k
CL = 16.3pF
AV = +1
VSOURCE = 1VP-P
PSRR-
PSRR+
-60
-120
10
10M
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V
100
V+, V- = ±2.5V
RL = 1k
CL = 16.3pF
AV = +1
VSOURCE = 1VP-P
PSRRPSRR+
-60
-80
-100
-120
10
10M
INPUT VOLTAGE NOISE (nV/√Hz)
PSRR (dB)
-40
1M
-100
20
-20
CL = 4.7pF
-80
FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V and 5V
0
CL = 16.7pF
FIGURE 8. GAIN vs FREQUENCY vs CL
20
-80
CL = 26.7pF
FREQUENCY (Hz)
FREQUENCY (Hz)
-60
CL = 51.7pF
CL = 43.7pF
CL = 37.7pF
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 11. PSRR vs FREQUENCY, V, V+, V- = ±2.5V
5
1
10
100
1k
FREQUENCY (Hz)
10k
100k
FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
INPUT CURRENT NOISE (pA/√Hz)
10
(Continued)
0.5
V+ = 5V
RL = 10k
CL = 16.3pF
Rg = 10, Rf = 100k
AV = 10000
0.4
V+ = 5V
RL = 1k
CL = 16.3pF
AV = +1
INPUT NOISE (µV)
0.3
1
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
0.1
1
10
100
1k
10k
-0.5
100k
0
1
2
3
4
5
FREQUENCY (Hz)
6
7
8
9
10
TIME (s)
FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz to 10Hz
FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY
0.026
1.5
0.024
SMALL SIGNAL (V)
LARGE SIGNAL (V)
1.0
0.5
0
V+, V- = ±2.5V
RL = 1k
CL = 16.3pF
Rg = Rf = 10k
AV = 2
VOUT = 1.5VP-P
-0.5
-1.0
-1.5
0.022
0.020
0.018
0.016
0.014
0.012
0
1
2
3
4
5
6
TIME (µs)
7
8
9
0
10
1.3
6
V-ENABLE
V-OUT
3
2
1
0.7
0.5
0.3
0.1
0
0
10
20
30
40
50
60
TIME (µs)
70
80
90
FIGURE 17. ENABLE TO OUTPUT RESPONSE
6
-0.1
100
VOS (µV)
0.9
V+ = 5V
Rg = Rf = RL = 1k
CL = 16.3pF
AV = +2
VOUT = 1VP-P
1.5
2.0
2.5
TIME (µs)
3.0
3.5
4.0
80 V+ = 5V
RL = OPEN
60 R = 100k, R = 100
f
g
40 AV = +1000
1.1
4
1.0
100
OUTPUT (V)
V-ENABLE (V)
5
0.5
FIGURE 16. SMALL SIGNAL STEP RESPONSE
FIGURE 15. LARGE SIGNAL STEP RESPONSE
-1
V+, V- = ±2.5V
RL = 1k
CL = 16.3pF
Rg = Rf = 10k
AV = 2
VOUT = 10mVP-P
20
0
-20
-40
-60
-80
-100
-1
0
1
2
3
VCM (V)
4
5
6
FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
(Continued)
100
80
60
I-BIAS (nA)
40
20
0
-20
V+ = 5V
RL = OPEN
Rf = 100k, Rg = 100
AV = +1000
-40
-60
-80
-100
-1
0
1
2
3
VCM (V)
4
5
6
FIGURE 19. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE
1200
11
1100
10
MAX
CURRENT (µA)
CURRENT (µA)
MAX
1000
MEDIAN
900
MIN
800
MEDIAN
8
7
6
MIN
700
5
N = 1150
600
-40
9
-20
0
20
40
60
80
100
N = 1150
4
-40
120
-20
0
FIGURE 20. SUPPLY CURRENT ENABLED vs
TEMPERATURE, V+, V- = ±2.5V
40
60
80
120
750
550
550
MAX
350
MAX
350
VOS (µV)
150
MEDIAN
-50
-250
150
MEDIAN
-50
-250
-450
MIN
MIN
-450
-650
N = 1150
-850
-40
100
FIGURE 21. SUPPLY CURRENT DISABLED vs
TEMPERATURE, V+, V- = ±2.5V
750
VOS (µV)
20
TEMPERATURE (°C)
TEMPERATURE (°C)
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 22. VOS (SOT PKG) vs TEMPERATURE, V+, V- = ±2.5V
7
N = 1150
-650
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 23. VOS (SOT PKG) vs TEMPERATURE, V+, V- = ±1.2V
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
(Continued)
30
30
25
25
MAX
MAX
20
IBIAS- (nA)
IBIAS+ (nA)
20
15
10
MEDIAN
5
10
MEDIAN
5
0
0
-5
-10
-40
15
-5
MIN
-20
0
20
MIN
N = 1150
N = 1150
40
60
80
100
-10
-40
120
-20
0
20
15
MAX
IBIAS- (nA)
IBIAS+ (nA)
120
MAX
10
5
0
MEDIAN
-5
-10
-15
5
0
MEDIAN
-5
-10
-15
-20
-20
0
20
MIN
-20
MIN
N = 1150
40
60
80
100
N = 1150
-25
-40
120
-20
0
20
TEMPERATURE (°C)
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 26. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V
FIGURE 27. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V
12
10
10
8
MAX
8
6
MAX
6
IOS (nA)
4
IOS (nA)
100
20
10
MEDIAN
2
0
-2
4
2
MEDIAN
0
-2
-4
-4
MIN
-6
N = 1150
-8
-40
80
FIGURE 25. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V
15
-25
-40
60
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 24. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V
40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 28. IOS vs TEMPERATURE V+, V- = ±2.5V
8
MIN
-6
-8
-40
N = 1150
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 29. IOS vs TEMPERATURE V+, V- = ±1.2V
FN6321.3
June 23, 2008
ISL28146, ISL28246
Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
120
140
135
MAX
115
130
MAX
PSRR (dB)
125
CMRR (dB)
(Continued)
120
MEDIAN
115
110
110
105
MEDIAN
100
105
100
MIN
95
MIN
95
N = 1150
90
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
90
-40
120
-20
0
20
40
80
100
120
TEMPERATURE (°C)
FIGURE 30. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V,
V+, V- = ±2.5V
FIGURE 31. PSRR vs TEMPERATURE V+, V- = ±1.2V TO ±2.75V
4500
200
4000
180
MAX
MAX
3500
160
3000
AVOL (V/mV)
AVOL (V/mV)
N = 1150
60
2500
2000
MEDIAN
1500
MEDIAN
140
120
100
1000
MIN
MIN
80
500
0
-40
N = 1150
-20
0
20
40
60
80
100
N = 1150
60
-40
120
-20
0
TEMPERATURE (°C)
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 33. AVOL vs TEMPERATURE V+, V- = ±2.5V,
VO = +2V, RL = 1k
FIGURE 32. AVOL vs TEMPERATURE V+, V- = ±2.5V,
VO = +2V, RL= 100k
75
4.960
MAX
4.955
70
4.950
65
VOUT (mV)
VOUT (V)
MAX
MEDIAN
4.945
60
MEDIAN
55
4.940
MIN
MIN
4.935
50
N = 1150
4.930
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 34. VOUT HIGH vs TEMPERATURE V+, V- = ±2.5V,
RL = 1k
9
N = 1150
45
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 35. VOUT LOW vs TEMPERATURE V+, V- = ±2.5V,
RL = 1k
FN6321.3
June 23, 2008
ISL28146, ISL28246
Pin Descriptions
ISL28146
(6 Ld SOT-23)
ISL28246
(8 Ld SOIC)
(8 Ld MSOP)
PIN NAME
2 (A)
6 (B)
ININ-_A
IN-_B
4
FUNCTION
EQUIVALENT CIRCUIT
Inverting input
V+
IN-
IN+
VCircuit 1
3 (A)
5 (B)
IN+
IN+_A
IN-+_B
4
V-
3
2
Non-inverting input
Negative supply
See Circuit 1
V+
CAPACITIVELY
COUPLED
ESD CLAMP
VCircuit 2
1
1 (A)
7 (B)
OUT
OUT_A
OUT_B
Output
V+
OUT
VCircuit 3
6
8
5
V+
Positive supply
EN
Chip enable
See Circuit 2
V+
LOGIC
PIN
VCircuit 3
10
FN6321.3
June 23, 2008
ISL28146, ISL28246
Applications Information
Introduction
The ISL28146 and ISL28246 are single and dual channel
rail-to-rail input, output (RRIO) micropower precision
operational amplifiers. The parts are designed to operate
from single supply (2.4V to 5.0V) or dual supply (±1.2V to
±2.75V). The parts have an input common mode range that
extends 0.25V above the positive rail and down to the
negative supply rail. The output operation can swing within
about 3mV of the supply rails with a 100kΩ load.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs,
a long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the
input signal moves from one supply rail to another, the
operational amplifier switches from one input pair to the
other causing drastic changes in input offset voltage and an
undesired change in magnitude and polarity of input offset
current.
The ISL28146 and ISL28246 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
an undistorted behavior from typically down to the negative
rail and up to 0.25V higher than the V+ rail.
Rail-to-Rail Output
A pair of complementary MOS devices are used to achieve
the rail-to-rail output swing. The NMOS sinks current to
swing the output in the negative direction. The PMOS
sources current to swing the output in the positive direction.
The ISL28146 and ISL28246 with a 100kΩ load will swing to
within 3mV of the positive supply rail and within 3mV of the
negative supply rail.
Results of Over-Driving the Output
Caution should be used when over-driving the output for long
periods of time. Over-driving the output can occur in two ways:
1. The input voltage times the gain of the amplifier exceeds the
supply voltage by a large value.
2. The output current required is higher than the output stage
can deliver. These conditions can result in a shift in the Input
Offset Voltage (VOS) as much as 1µV/hr. of exposure under
these conditions.
IN+ and IN- Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals (“Pin
Descriptions” on page 10 - Circuit 1). For applications where
the input differential voltage is expected to exceed 0.5V, an
11
external series resistor must be used to ensure the input
currents never exceed 5mA (Figure 36).
VIN
VOUT
RIN
+
RL
FIGURE 36. INPUT CURRENT LIMITING
Enable/Disable Feature
The ISL28146 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically 10µA
at room temperature. The EN pin has an internal pull-down.
If left open, the EN pin will pull to the negative rail and the
device will be enabled by default. When not used, the EN pin
should either be left floating or connected directly to the -V
pin.
By disabling the part, multiple ISL28146 parts can be
connected together as a MUX. In this configuration, the
outputs are tied together in parallel and a channel can be
selected by the EN pin. The loading effects of the feedback
resistors of the disabled amplifier must be considered when
multiple amplifier outputs are connected together. Note that
feed through from the IN+ to IN- pins occurs on any Mux
Amp disabled channel where the input differential voltage
exceeds 0.5V (e.g., active channel VOUT = 1V, while
disabled channel VIN = GND), so the mux implementation is
best suited for small signal applications. If large signals are
required, use series IN+ resistors, or a large value RF, to
keep the feed through current low enough to minimize the
impact on the active channel. See “Limitations of the
Differential Input Protection” on page 11.
Limitations of the Differential Input Protection
If the input differential voltage is expected to exceed 0.5V, an
external current limiting resistor must be used to ensure the
input current never exceeds 5mA. For non-inverting unity gain
applications, the current limiting can be via a series IN+ resistor,
or via a feedback resistor of appropriate value. For other gain
configurations, the series IN+ resistor is the best choice, unless
the feedback (RF) and gain setting (RG) resistors are both
sufficiently large to limit the input current to 5mA.
Large differential input voltages can arise from several
sources:
1. During open loop (comparator) operation. Used this way,
the IN+ and IN- voltages don’t track, so differentials arise.
2. When the amplifier is disabled but an input signal is still
present. An RL or RG to GND keeps the IN- at GND, while
the varying IN+ signal creates a differential voltage. Mux
Amp applications are similar, except that the active
channel VOUT determines the voltage on the IN- terminal.
3. When the slew rate of the input pulse is considerably
faster than the op amp’s slew rate. If the VOUT can’t keep
FN6321.3
June 23, 2008
ISL28146, ISL28246
up with the IN+ signal, a differential voltage results, and
visible distortion occurs on the input and output signals.
To avoid this issue, keep the input slew rate below
1.9V/µs, or use appropriate current limiting resistors.
Large (>2V) differential input voltages can also cause an
increase in disabled ICC.
Using Only One Channel
The ISL28246 is a dual op amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (Figure 37).
+
FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
Current Limiting
These devices have no internal current-limiting circuitry. If
the output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated using
Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------R
L
(EQ. 2)
where:
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage (Magnitude of V+ and V-)
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
RL = Load resistance
ECG/EEG AMPLIFIER APPLICATION CIRCUIT
ECG and EEG amplifiers must extract millivolt low frequency
AC signals from the skin of the patient while rejecting AC
common mode interference and static DC potentials created
at the electrode-to-skin interface. In Figure 38, the EL8171
Instrumentation amplifier (U1) and the ISL28146 (U2) form a
differential input, high impedance high pass patient lead
amplifier. U2, RF1 and CF1 form a low pass active feedback
amplifier. Inserting this amplifier in the feedback loop results
in a high pass frequency response in the forward direction.
The corner frequency is given by Equation 3:
(EQ. 3)
f – HPF – 3dB = 1/[2*π*RF1*CF1
Voltage dividers R1 through R2 and R3 through R4 set the
overall amplifier pass-band gain. Unwanted DC offsets
appearing at the patient leads are cancelled by U2 at U1A’s
inverting input. Resistor divider pair, R3 through R4 define
the maximum input DC level that is cancelled, and is given
by Equation 4:
V IN DC = V + [R 4 ⁄ ( R 3 + R 4 ) ]
(EQ. 4)
In the passband range, U1B’s gain is +1 and the total signal
gain is defined by the divider ratios according to Equation 5:
V OUT U1 Gain = V OUT ⁄ V IN = [ ( R 1 + R 2 ) ⁄ R 2 ]∗ [ ( R 3 + R 4 ) ⁄ R 4 ]
(EQ. 5)
The gain bandwidth product of the differential amplifier U1
determines the frequency response limit. Reference
amplifiers U3A and U3B form a DC feedback loop that
supplies a reference voltage drive to the patient to establish
a common mode DC reference for the differential amplifiers.
The voltage at the VCM sense electrode is maintained at the
reference voltage set by RF1-RF2.
With the values shown in Figure 38, the performance
parameters are:
1. Supply Voltage range = +2.4V to +5.5V
2. Total supply current draw @ +5V = 1.3mA (typ)
3. Common-mode reference voltage (VCM) = V+/2
4. Max DC Input Offset Voltage = VCM ±0.18V to ±0.41V
5. Passband Gain = 425V/V
6. Lower -3dB Frequency = 0.05Hz
12
FN6321.3
June 23, 2008
ISL28146, ISL28246
PATIENT
LEAD
CONNECTOR
V+
R
VIN+
10k
V+
+
V+
Signal
VIN-
FB-
R
10k
0.082µF
C3
VDC
Offset
R
1k
U1
FB+ EL8171
VDC
Offset
R3
12.4k
PATIENT
ELECTRODE
PADS
R4
2.21k
Signal
V+
VCM
SENSE
R1
10k
V+
U2 +
ISL28146
-
CF1
4.7µF
VOUT+
C
0.01µF
VOUT-
V+
+2.4 TO 5.5V
SUPPLY
RFA
10k
R2
158Ω
RFB
10k
R
10k
V+
VCM
DRIVE
CA
R
10k
1nF
PROTECTION
CIRCUIT
R
500k
CB
V+
VCM REFERENCE
TO OTHER
CHANNELS
+
U3A 1/2
ISL28288
-
1nF
U3B 1/2
ISL28288
+
4.7µF
SUPPLY
COMMON
RF1
680k
V+
VCM
0.47µF
R
5k
FIGURE 38. ECG/EEG AMPLIFIER
13
FN6321.3
June 23, 2008
ISL28146, ISL28246
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
N
SYMBOL
4
E1
2
E
3
0.15 C D
1
2X
2
3
0.20 C
5
2X
e
0.20 M C A-B D
B
b
NX
0.15 C A-B
1
3
SOT23-5
SOT23-6
A
1.45
1.45
MAX
A1
0.10
0.10
±0.05
A2
1.14
1.14
±0.15
b
0.40
0.40
±0.05
c
0.14
0.14
±0.06
D
2.90
2.90
Basic
E
2.80
2.80
Basic
E1
1.60
1.60
Basic
e
0.95
0.95
Basic
e1
1.90
1.90
Basic
L
0.45
0.45
±0.10
L1
0.60
0.60
Reference
N
5
6
Reference
D
2X
TOLERANCE
Rev. F 2/07
NOTES:
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
SEATING
PLANE
A1
0.10 C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
6. SOT23-5 version has no center lead (shown as a dashed line).
H
A
GAUGE
PLANE
c
L
14
0.25
0° +3°
-0°
FN6321.3
June 23, 2008
ISL28146, ISL28246
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
15
FN6321.3
June 23, 2008
ISL28146, ISL28246
Mini SO Package Family (MSOP)
0.25 M C A B
D
MINI SO PACKAGE FAMILY
(N/2)+1
N
E
MDP0043
A
E1
MILLIMETERS
PIN #1
I.D.
1
B
(N/2)
e
H
C
SEATING
PLANE
0.10 C
N LEADS
SYMBOL
MSOP8
MSOP10
TOLERANCE
NOTES
A
1.10
1.10
Max.
-
A1
0.10
0.10
±0.05
-
A2
0.86
0.86
±0.09
-
b
0.33
0.23
+0.07/-0.08
-
c
0.18
0.18
±0.05
-
D
3.00
3.00
±0.10
1, 3
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
-
0.08 M C A B
b
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
L
A1
0.25
3° ±3°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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16
FN6321.3
June 23, 2008
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